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clk: qcom: Use parent rate when set rate to pixel RCG clock
Since the parent rate has been recalculated, pixel RCG clock
should rely on it to find the correct M/N values during set_rate,
instead of calling __clk_round_rate() to its parent again.
Signed-off-by: Hai Li <hali@codeaurora.org>
Tested-by: Archit Taneja <architt@codeaurora.org>
Fixes: 99cbd064b0
("clk: qcom: Support display RCG clocks")
[sboyd@codeaurora.org: Silenced unused parent variable warning]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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parent
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@ -530,19 +530,16 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate,
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struct clk_rcg2 *rcg = to_clk_rcg2(hw);
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struct freq_tbl f = *rcg->freq_tbl;
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const struct frac_entry *frac = frac_table_pixel;
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unsigned long request, src_rate;
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unsigned long request;
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int delta = 100000;
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u32 mask = BIT(rcg->hid_width) - 1;
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u32 hid_div;
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int index = qcom_find_src_index(hw, rcg->parent_map, f.src);
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struct clk *parent = clk_get_parent_by_index(hw->clk, index);
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for (; frac->num; frac++) {
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request = (rate * frac->den) / frac->num;
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src_rate = __clk_round_rate(parent, request);
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if ((src_rate < (request - delta)) ||
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(src_rate > (request + delta)))
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if ((parent_rate < (request - delta)) ||
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(parent_rate > (request + delta)))
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continue;
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regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG,
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