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tg3: Eliminate tg3_nvram_read_swab()
The remaining uses of tg3_nvram_read_swab() either intended to read the data from NVRAM exactly as tg3_nvram_read_be32() did or hide deeper interpretations of the data. For the former case, a direct replacement of tg3_nvram_read_swab() with tg3_nvram_read_be32() is in order. For the latter case, we remove tg3_nvram_read_swab() and document what the code is really doing. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Benjamin Li <benli@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -2283,16 +2283,6 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
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return ret;
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}
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static int tg3_nvram_read_swab(struct tg3 *tp, u32 offset, u32 *val)
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{
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int err;
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u32 tmp;
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err = tg3_nvram_read(tp, offset, &tmp);
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*val = swab32(tmp);
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return err;
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}
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/* Ensures NVRAM data is in bytestream format. */
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static int tg3_nvram_read_be32(struct tg3 *tp, u32 offset, __be32 *val)
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{
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@ -10195,9 +10185,20 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp)
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return;
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}
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if (tg3_nvram_read_swab(tp, 0xf0, &val) == 0) {
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if (tg3_nvram_read(tp, 0xf0, &val) == 0) {
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if (val != 0) {
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tp->nvram_size = (val >> 16) * 1024;
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/* This is confusing. We want to operate on the
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* 16-bit value at offset 0xf2. The tg3_nvram_read()
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* call will read from NVRAM and byteswap the data
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* according to the byteswapping settings for all
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* other register accesses. This ensures the data we
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* want will always reside in the lower 16-bits.
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* However, the data in NVRAM is in LE format, which
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* means the data from the NVRAM read will always be
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* opposite the endianness of the CPU. The 16-bit
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* byteswap then brings the data to CPU endianness.
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*/
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tp->nvram_size = swab16((u16)(val & 0x0000ffff)) * 1024;
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return;
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}
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}
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@ -11347,7 +11348,7 @@ skip_phy_reset:
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static void __devinit tg3_read_partno(struct tg3 *tp)
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{
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unsigned char vpd_data[256];
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unsigned char vpd_data[256]; /* in little-endian format */
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unsigned int i;
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u32 magic;
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@ -11358,13 +11359,14 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
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for (i = 0; i < 256; i += 4) {
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u32 tmp;
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if (tg3_nvram_read_swab(tp, 0x100 + i, &tmp))
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/* The data is in little-endian format in NVRAM.
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* Use the big-endian read routines to preserve
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* the byte order as it exists in NVRAM.
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*/
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if (tg3_nvram_read_be32(tp, 0x100 + i, &tmp))
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goto out_not_found;
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vpd_data[i + 0] = ((tmp >> 0) & 0xff);
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vpd_data[i + 1] = ((tmp >> 8) & 0xff);
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vpd_data[i + 2] = ((tmp >> 16) & 0xff);
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vpd_data[i + 3] = ((tmp >> 24) & 0xff);
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memcpy(&vpd_data[i], &tmp, sizeof(tmp));
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}
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} else {
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int vpd_cap;
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@ -11390,7 +11392,7 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
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pci_read_config_dword(tp->pdev, vpd_cap + PCI_VPD_DATA,
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&tmp);
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v = cpu_to_le32(tmp);
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memcpy(&vpd_data[i], &v, 4);
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memcpy(&vpd_data[i], &v, sizeof(v));
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}
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}
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@ -12358,14 +12360,10 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
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}
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if (!addr_ok) {
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/* Next, try NVRAM. */
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if (!tg3_nvram_read_swab(tp, mac_offset + 0, &hi) &&
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!tg3_nvram_read_swab(tp, mac_offset + 4, &lo)) {
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dev->dev_addr[0] = ((hi >> 16) & 0xff);
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dev->dev_addr[1] = ((hi >> 24) & 0xff);
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dev->dev_addr[2] = ((lo >> 0) & 0xff);
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dev->dev_addr[3] = ((lo >> 8) & 0xff);
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dev->dev_addr[4] = ((lo >> 16) & 0xff);
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dev->dev_addr[5] = ((lo >> 24) & 0xff);
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if (!tg3_nvram_read_be32(tp, mac_offset + 0, &hi) &&
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!tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) {
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memcpy(&dev->dev_addr[0], ((char *)&hi) + 2, 2);
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memcpy(&dev->dev_addr[2], (char *)&lo, sizeof(lo));
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}
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/* Finally just fetch it out of the MAC control regs. */
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else {
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