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powerpc/perf: Fix disabling BHRB and instruction sampling

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commit ea142e590a upstream.

When the PMU is disabled, MMCRA is not updated to disable BHRB and
instruction sampling. This can lead to those features remaining enabled,
which can slow down a real or emulated CPU.

Fixes: 1cade527f6 ("powerpc/perf: BHRB control to disable BHRB logic when not used")
Cc: stable@vger.kernel.org # v5.9+
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20231018153423.298373-1-npiggin@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Nicholas Piggin 2023-10-19 01:34:23 +10:00 committed by Greg Kroah-Hartman
parent 6066567c5b
commit 6cfee0c86e
1 changed files with 2 additions and 3 deletions
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5
arch/powerpc/perf/core-book3s.c
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@ -1371,8 +1371,7 @@ static void power_pmu_disable(struct pmu *pmu)
/* /*
* Disable instruction sampling if it was enabled * Disable instruction sampling if it was enabled
*/ */
if (cpuhw->mmcr.mmcra & MMCRA_SAMPLE_ENABLE) val &= ~MMCRA_SAMPLE_ENABLE;
val &= ~MMCRA_SAMPLE_ENABLE;
/* Disable BHRB via mmcra (BHRBRD) for p10 */ /* Disable BHRB via mmcra (BHRBRD) for p10 */
if (ppmu->flags & PPMU_ARCH_31) if (ppmu->flags & PPMU_ARCH_31)
@ -1383,7 +1382,7 @@ static void power_pmu_disable(struct pmu *pmu)
* instruction sampling or BHRB. * instruction sampling or BHRB.
*/ */
if (val != mmcra) { if (val != mmcra) {
mtspr(SPRN_MMCRA, mmcra); mtspr(SPRN_MMCRA, val);
mb(); mb();
isync(); isync();
} }