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ASoC: hda/tegra: Set buffer alignment to 128 bytes

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Set chip->align_buffer_size to 1 for Tegra platforms to make the buffer
alignment to be multiple of 128 bytes. This fix is applied as gstreamer
alsasink gets stuck with the default buffer-time and latency-time
parameters with 4 byte buffer alignment.

Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
Link: https://lore.kernel.org/r/20200805095221.5476-2-mkumard@nvidia.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Mohan Kumar 2020-08-05 15:22:19 +05:30 committed by Takashi Iwai
parent 80982c7e83
commit 6c17e9dd5c
1 changed files with 2 additions and 0 deletions
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2
sound/pci/hda/hda_tegra.c
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@ -333,6 +333,8 @@ static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
gcap = azx_readw(chip, GCAP);
dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
chip->align_buffer_size = 1;
/* read number of streams from GCAP register instead of using
* hardcoded value
*/