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tools headers UAPI: Update tools' copy of linux/coresight-pmu.h
To get the changes in these commits:88f11864cf
("coresight: etm-perf: Support PID tracing for kernel at EL2")53abf3fe83
("coresight: etm-perf: Clarify comment on perf options") This will possibly be used in patches lined up for v5.13. And silence this perf build warning: Warning: Kernel ABI header at 'tools/include/linux/coresight-pmu.h' differs from latest version at 'include/linux/coresight-pmu.h' diff -u tools/include/linux/coresight-pmu.h include/linux/coresight-pmu.h Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Leo Yan <leo.yan@linaro.org> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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@ -10,17 +10,27 @@
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#define CORESIGHT_ETM_PMU_NAME "cs_etm"
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#define CORESIGHT_ETM_PMU_SEED 0x10
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/* ETMv3.5/PTM's ETMCR config bit */
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#define ETM_OPT_CYCACC 12
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#define ETM_OPT_CTXTID 14
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#define ETM_OPT_TS 28
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#define ETM_OPT_RETSTK 29
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/*
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* Below are the definition of bit offsets for perf option, and works as
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* arbitrary values for all ETM versions.
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*
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* Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,
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* ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
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* directly use below macros as config bits.
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*/
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#define ETM_OPT_CYCACC 12
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#define ETM_OPT_CTXTID 14
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#define ETM_OPT_CTXTID2 15
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#define ETM_OPT_TS 28
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#define ETM_OPT_RETSTK 29
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/* ETMv4 CONFIGR programming bits for the ETM OPTs */
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#define ETM4_CFG_BIT_CYCACC 4
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#define ETM4_CFG_BIT_CTXTID 6
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#define ETM4_CFG_BIT_VMID 7
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#define ETM4_CFG_BIT_TS 11
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#define ETM4_CFG_BIT_RETSTK 12
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#define ETM4_CFG_BIT_VMID_OPT 15
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static inline int coresight_get_trace_id(int cpu)
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{
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