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RDMA/mlx5: Store in the cache mkeys instead of mrs
Currently, the driver stores mlx5_ib_mr struct in the cache entries, although the only use of the cached MR is the mkey. Store only the mkey in the cache. Link: https://lore.kernel.org/r/20220726071911.122765-5-michaelgur@nvidia.com Signed-off-by: Aharon Landau <aharonl@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
parent
19591f134c
commit
6b75338695
@ -619,6 +619,7 @@ struct mlx5_ib_mkey {
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unsigned int ndescs;
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struct wait_queue_head wait;
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refcount_t usecount;
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struct mlx5_cache_ent *cache_ent;
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};
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#define MLX5_IB_MTT_PRESENT (MLX5_IB_MTT_READ | MLX5_IB_MTT_WRITE)
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@ -641,18 +642,9 @@ struct mlx5_ib_mr {
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struct ib_mr ibmr;
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struct mlx5_ib_mkey mmkey;
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/* User MR data */
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struct mlx5_cache_ent *cache_ent;
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/* Everything after cache_ent is zero'd when MR allocated */
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struct ib_umem *umem;
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union {
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/* Used only while the MR is in the cache */
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struct {
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u32 out[MLX5_ST_SZ_DW(create_mkey_out)];
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struct mlx5_async_work cb_work;
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};
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/* Used only by kernel MRs (umem == NULL) */
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struct {
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void *descs;
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@ -692,12 +684,6 @@ struct mlx5_ib_mr {
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};
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};
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/* Zero the fields in the mr that are variant depending on usage */
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static inline void mlx5_clear_mr(struct mlx5_ib_mr *mr)
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{
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memset_after(mr, 0, cache_ent);
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}
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static inline bool is_odp_mr(struct mlx5_ib_mr *mr)
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{
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return IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING) && mr->umem &&
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@ -768,6 +754,16 @@ struct mlx5_cache_ent {
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struct delayed_work dwork;
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};
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struct mlx5r_async_create_mkey {
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union {
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u32 in[MLX5_ST_SZ_BYTES(create_mkey_in)];
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u32 out[MLX5_ST_SZ_DW(create_mkey_out)];
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};
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struct mlx5_async_work cb_work;
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struct mlx5_cache_ent *ent;
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u32 mkey;
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};
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struct mlx5_mr_cache {
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struct workqueue_struct *wq;
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struct mlx5_cache_ent ent[MAX_MR_CACHE_ENTRIES];
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@ -82,15 +82,14 @@ static void set_mkc_access_pd_addr_fields(void *mkc, int acc, u64 start_addr,
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MLX5_SET64(mkc, mkc, start_addr, start_addr);
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}
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static void assign_mkey_variant(struct mlx5_ib_dev *dev,
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struct mlx5_ib_mkey *mkey, u32 *in)
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static void assign_mkey_variant(struct mlx5_ib_dev *dev, u32 *mkey, u32 *in)
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{
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u8 key = atomic_inc_return(&dev->mkey_var);
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void *mkc;
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mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
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MLX5_SET(mkc, mkc, mkey_7_0, key);
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mkey->key = key;
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*mkey = key;
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}
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static int mlx5_ib_create_mkey(struct mlx5_ib_dev *dev,
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@ -98,7 +97,7 @@ static int mlx5_ib_create_mkey(struct mlx5_ib_dev *dev,
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{
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int ret;
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assign_mkey_variant(dev, mkey, in);
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assign_mkey_variant(dev, &mkey->key, in);
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ret = mlx5_core_create_mkey(dev->mdev, &mkey->key, in, inlen);
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if (!ret)
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init_waitqueue_head(&mkey->wait);
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@ -106,17 +105,18 @@ static int mlx5_ib_create_mkey(struct mlx5_ib_dev *dev,
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return ret;
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}
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static int
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mlx5_ib_create_mkey_cb(struct mlx5_ib_dev *dev,
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struct mlx5_ib_mkey *mkey,
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struct mlx5_async_ctx *async_ctx,
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u32 *in, int inlen, u32 *out, int outlen,
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struct mlx5_async_work *context)
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static int mlx5_ib_create_mkey_cb(struct mlx5r_async_create_mkey *async_create)
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{
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MLX5_SET(create_mkey_in, in, opcode, MLX5_CMD_OP_CREATE_MKEY);
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assign_mkey_variant(dev, mkey, in);
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return mlx5_cmd_exec_cb(async_ctx, in, inlen, out, outlen,
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create_mkey_callback, context);
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struct mlx5_ib_dev *dev = async_create->ent->dev;
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size_t inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
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size_t outlen = MLX5_ST_SZ_BYTES(create_mkey_out);
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MLX5_SET(create_mkey_in, async_create->in, opcode,
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MLX5_CMD_OP_CREATE_MKEY);
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assign_mkey_variant(dev, &async_create->mkey, async_create->in);
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return mlx5_cmd_exec_cb(&dev->async_ctx, async_create->in, inlen,
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async_create->out, outlen, create_mkey_callback,
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&async_create->cb_work);
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}
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static int mr_cache_max_order(struct mlx5_ib_dev *dev);
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@ -209,48 +209,47 @@ static void undo_push_reserve_mkey(struct mlx5_cache_ent *ent)
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WARN_ON(old);
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}
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static void push_to_reserved(struct mlx5_cache_ent *ent, struct mlx5_ib_mr *mr)
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static void push_to_reserved(struct mlx5_cache_ent *ent, u32 mkey)
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{
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void *old;
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old = __xa_store(&ent->mkeys, ent->stored, mr, 0);
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old = __xa_store(&ent->mkeys, ent->stored, xa_mk_value(mkey), 0);
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WARN_ON(old);
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ent->stored++;
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}
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static struct mlx5_ib_mr *pop_stored_mkey(struct mlx5_cache_ent *ent)
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static u32 pop_stored_mkey(struct mlx5_cache_ent *ent)
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{
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struct mlx5_ib_mr *mr;
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void *old;
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void *old, *xa_mkey;
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ent->stored--;
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ent->reserved--;
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if (ent->stored == ent->reserved) {
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mr = __xa_erase(&ent->mkeys, ent->stored);
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WARN_ON(!mr);
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return mr;
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xa_mkey = __xa_erase(&ent->mkeys, ent->stored);
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WARN_ON(!xa_mkey);
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return (u32)xa_to_value(xa_mkey);
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}
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mr = __xa_store(&ent->mkeys, ent->stored, XA_ZERO_ENTRY,
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GFP_KERNEL);
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WARN_ON(!mr || xa_is_err(mr));
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xa_mkey = __xa_store(&ent->mkeys, ent->stored, XA_ZERO_ENTRY,
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GFP_KERNEL);
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WARN_ON(!xa_mkey || xa_is_err(xa_mkey));
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old = __xa_erase(&ent->mkeys, ent->reserved);
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WARN_ON(old);
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return mr;
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return (u32)xa_to_value(xa_mkey);
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}
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static void create_mkey_callback(int status, struct mlx5_async_work *context)
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{
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struct mlx5_ib_mr *mr =
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container_of(context, struct mlx5_ib_mr, cb_work);
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struct mlx5_cache_ent *ent = mr->cache_ent;
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struct mlx5r_async_create_mkey *mkey_out =
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container_of(context, struct mlx5r_async_create_mkey, cb_work);
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struct mlx5_cache_ent *ent = mkey_out->ent;
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struct mlx5_ib_dev *dev = ent->dev;
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unsigned long flags;
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if (status) {
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create_mkey_warn(dev, status, mr->out);
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kfree(mr);
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create_mkey_warn(dev, status, mkey_out->out);
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kfree(mkey_out);
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xa_lock_irqsave(&ent->mkeys, flags);
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undo_push_reserve_mkey(ent);
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WRITE_ONCE(dev->fill_delay, 1);
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@ -259,18 +258,16 @@ static void create_mkey_callback(int status, struct mlx5_async_work *context)
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return;
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}
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mr->mmkey.type = MLX5_MKEY_MR;
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mr->mmkey.key |= mlx5_idx_to_mkey(
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MLX5_GET(create_mkey_out, mr->out, mkey_index));
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init_waitqueue_head(&mr->mmkey.wait);
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mkey_out->mkey |= mlx5_idx_to_mkey(
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MLX5_GET(create_mkey_out, mkey_out->out, mkey_index));
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WRITE_ONCE(dev->cache.last_add, jiffies);
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xa_lock_irqsave(&ent->mkeys, flags);
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push_to_reserved(ent, mr);
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push_to_reserved(ent, mkey_out->mkey);
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/* If we are doing fill_to_high_water then keep going. */
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queue_adjust_cache_locked(ent);
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xa_unlock_irqrestore(&ent->mkeys, flags);
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kfree(mkey_out);
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}
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static int get_mkc_octo_size(unsigned int access_mode, unsigned int ndescs)
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@ -292,15 +289,8 @@ static int get_mkc_octo_size(unsigned int access_mode, unsigned int ndescs)
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return ret;
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}
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static struct mlx5_ib_mr *alloc_cache_mr(struct mlx5_cache_ent *ent, void *mkc)
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static void set_cache_mkc(struct mlx5_cache_ent *ent, void *mkc)
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{
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struct mlx5_ib_mr *mr;
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mr = kzalloc(sizeof(*mr), GFP_KERNEL);
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if (!mr)
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return NULL;
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mr->cache_ent = ent;
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set_mkc_access_pd_addr_fields(mkc, 0, 0, ent->dev->umrc.pd);
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MLX5_SET(mkc, mkc, free, 1);
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MLX5_SET(mkc, mkc, umr_en, 1);
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@ -310,106 +300,82 @@ static struct mlx5_ib_mr *alloc_cache_mr(struct mlx5_cache_ent *ent, void *mkc)
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MLX5_SET(mkc, mkc, translations_octword_size,
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get_mkc_octo_size(ent->access_mode, ent->ndescs));
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MLX5_SET(mkc, mkc, log_page_size, ent->page);
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return mr;
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}
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/* Asynchronously schedule new MRs to be populated in the cache. */
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static int add_keys(struct mlx5_cache_ent *ent, unsigned int num)
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{
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size_t inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
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struct mlx5_ib_mr *mr;
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struct mlx5r_async_create_mkey *async_create;
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void *mkc;
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u32 *in;
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int err = 0;
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int i;
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in = kzalloc(inlen, GFP_KERNEL);
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if (!in)
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return -ENOMEM;
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mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
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for (i = 0; i < num; i++) {
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mr = alloc_cache_mr(ent, mkc);
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if (!mr) {
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err = -ENOMEM;
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goto free_in;
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}
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async_create = kzalloc(sizeof(struct mlx5r_async_create_mkey),
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GFP_KERNEL);
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if (!async_create)
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return -ENOMEM;
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mkc = MLX5_ADDR_OF(create_mkey_in, async_create->in,
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memory_key_mkey_entry);
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set_cache_mkc(ent, mkc);
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async_create->ent = ent;
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err = push_mkey(ent, true, NULL);
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if (err)
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goto free_mr;
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goto free_async_create;
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err = mlx5_ib_create_mkey_cb(ent->dev, &mr->mmkey,
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&ent->dev->async_ctx, in, inlen,
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mr->out, sizeof(mr->out),
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&mr->cb_work);
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err = mlx5_ib_create_mkey_cb(async_create);
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if (err) {
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mlx5_ib_warn(ent->dev, "create mkey failed %d\n", err);
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goto err_undo_reserve;
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}
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}
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kfree(in);
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return 0;
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err_undo_reserve:
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xa_lock_irq(&ent->mkeys);
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undo_push_reserve_mkey(ent);
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xa_unlock_irq(&ent->mkeys);
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free_mr:
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kfree(mr);
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free_in:
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kfree(in);
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free_async_create:
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kfree(async_create);
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return err;
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}
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/* Synchronously create a MR in the cache */
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static struct mlx5_ib_mr *create_cache_mr(struct mlx5_cache_ent *ent)
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static int create_cache_mkey(struct mlx5_cache_ent *ent, u32 *mkey)
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{
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size_t inlen = MLX5_ST_SZ_BYTES(create_mkey_in);
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struct mlx5_ib_mr *mr;
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void *mkc;
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u32 *in;
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int err;
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in = kzalloc(inlen, GFP_KERNEL);
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if (!in)
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return ERR_PTR(-ENOMEM);
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return -ENOMEM;
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mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
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set_cache_mkc(ent, mkc);
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mr = alloc_cache_mr(ent, mkc);
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if (!mr) {
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err = -ENOMEM;
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goto free_in;
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}
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err = mlx5_core_create_mkey(ent->dev->mdev, &mr->mmkey.key, in, inlen);
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err = mlx5_core_create_mkey(ent->dev->mdev, mkey, in, inlen);
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if (err)
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goto free_mr;
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goto free_in;
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init_waitqueue_head(&mr->mmkey.wait);
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mr->mmkey.type = MLX5_MKEY_MR;
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WRITE_ONCE(ent->dev->cache.last_add, jiffies);
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kfree(in);
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return mr;
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free_mr:
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kfree(mr);
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free_in:
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kfree(in);
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return ERR_PTR(err);
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return err;
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}
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static void remove_cache_mr_locked(struct mlx5_cache_ent *ent)
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{
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struct mlx5_ib_mr *mr;
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u32 mkey;
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lockdep_assert_held(&ent->mkeys.xa_lock);
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if (!ent->stored)
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return;
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mr = pop_stored_mkey(ent);
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mkey = pop_stored_mkey(ent);
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xa_unlock_irq(&ent->mkeys);
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mlx5_core_destroy_mkey(ent->dev->mdev, mr->mmkey.key);
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kfree(mr);
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mlx5_core_destroy_mkey(ent->dev->mdev, mkey);
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xa_lock_irq(&ent->mkeys);
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}
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@ -678,11 +644,15 @@ struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev,
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int access_flags)
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{
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struct mlx5_ib_mr *mr;
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int err;
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/* Matches access in alloc_cache_mr() */
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if (!mlx5r_umr_can_reconfig(dev, 0, access_flags))
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return ERR_PTR(-EOPNOTSUPP);
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mr = kzalloc(sizeof(*mr), GFP_KERNEL);
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if (!mr)
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return ERR_PTR(-ENOMEM);
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xa_lock_irq(&ent->mkeys);
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ent->in_use++;
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@ -690,20 +660,22 @@ struct mlx5_ib_mr *mlx5_mr_cache_alloc(struct mlx5_ib_dev *dev,
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queue_adjust_cache_locked(ent);
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ent->miss++;
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xa_unlock_irq(&ent->mkeys);
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mr = create_cache_mr(ent);
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if (IS_ERR(mr)) {
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err = create_cache_mkey(ent, &mr->mmkey.key);
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if (err) {
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xa_lock_irq(&ent->mkeys);
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ent->in_use--;
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xa_unlock_irq(&ent->mkeys);
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return mr;
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kfree(mr);
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return ERR_PTR(err);
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}
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} else {
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mr = pop_stored_mkey(ent);
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mr->mmkey.key = pop_stored_mkey(ent);
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queue_adjust_cache_locked(ent);
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xa_unlock_irq(&ent->mkeys);
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mlx5_clear_mr(mr);
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}
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mr->mmkey.cache_ent = ent;
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mr->mmkey.type = MLX5_MKEY_MR;
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init_waitqueue_head(&mr->mmkey.wait);
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return mr;
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}
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@ -711,15 +683,14 @@ static void clean_keys(struct mlx5_ib_dev *dev, int c)
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{
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struct mlx5_mr_cache *cache = &dev->cache;
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struct mlx5_cache_ent *ent = &cache->ent[c];
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struct mlx5_ib_mr *mr;
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u32 mkey;
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cancel_delayed_work(&ent->dwork);
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xa_lock_irq(&ent->mkeys);
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while (ent->stored) {
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mr = pop_stored_mkey(ent);
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mkey = pop_stored_mkey(ent);
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xa_unlock_irq(&ent->mkeys);
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mlx5_core_destroy_mkey(dev->mdev, mr->mmkey.key);
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kfree(mr);
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mlx5_core_destroy_mkey(dev->mdev, mkey);
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xa_lock_irq(&ent->mkeys);
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}
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xa_unlock_irq(&ent->mkeys);
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@ -1391,7 +1362,7 @@ static bool can_use_umr_rereg_pas(struct mlx5_ib_mr *mr,
|
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struct mlx5_ib_dev *dev = to_mdev(mr->ibmr.device);
|
||||
|
||||
/* We only track the allocated sizes of MRs from the cache */
|
||||
if (!mr->cache_ent)
|
||||
if (!mr->mmkey.cache_ent)
|
||||
return false;
|
||||
if (!mlx5r_umr_can_load_pas(dev, new_umem->length))
|
||||
return false;
|
||||
@ -1400,7 +1371,7 @@ static bool can_use_umr_rereg_pas(struct mlx5_ib_mr *mr,
|
||||
mlx5_umem_find_best_pgsz(new_umem, mkc, log_page_size, 0, iova);
|
||||
if (WARN_ON(!*page_size))
|
||||
return false;
|
||||
return (1ULL << mr->cache_ent->order) >=
|
||||
return (1ULL << mr->mmkey.cache_ent->order) >=
|
||||
ib_umem_num_dma_blocks(new_umem, *page_size);
|
||||
}
|
||||
|
||||
@ -1641,16 +1612,17 @@ int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
|
||||
}
|
||||
|
||||
/* Stop DMA */
|
||||
if (mr->cache_ent) {
|
||||
xa_lock_irq(&mr->cache_ent->mkeys);
|
||||
mr->cache_ent->in_use--;
|
||||
xa_unlock_irq(&mr->cache_ent->mkeys);
|
||||
if (mr->mmkey.cache_ent) {
|
||||
xa_lock_irq(&mr->mmkey.cache_ent->mkeys);
|
||||
mr->mmkey.cache_ent->in_use--;
|
||||
xa_unlock_irq(&mr->mmkey.cache_ent->mkeys);
|
||||
|
||||
if (mlx5r_umr_revoke_mr(mr) ||
|
||||
push_mkey(mr->cache_ent, false, mr))
|
||||
mr->cache_ent = NULL;
|
||||
push_mkey(mr->mmkey.cache_ent, false,
|
||||
xa_mk_value(mr->mmkey.key)))
|
||||
mr->mmkey.cache_ent = NULL;
|
||||
}
|
||||
if (!mr->cache_ent) {
|
||||
if (!mr->mmkey.cache_ent) {
|
||||
rc = destroy_mkey(to_mdev(mr->ibmr.device), mr);
|
||||
if (rc)
|
||||
return rc;
|
||||
@ -1667,10 +1639,10 @@ int mlx5_ib_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata)
|
||||
mlx5_ib_free_odp_mr(mr);
|
||||
}
|
||||
|
||||
if (!mr->cache_ent) {
|
||||
if (!mr->mmkey.cache_ent)
|
||||
mlx5_free_priv_descs(mr);
|
||||
kfree(mr);
|
||||
}
|
||||
|
||||
kfree(mr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user