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[MTD] [CHIPS] cfi_cmdset_0001.c: Fix a bug in inval_cache_and_wait_for_operation().
If the inval_cache_and_wait_for_operation() is re-entered by write operation when erase operation is in progress, the chip->erase_suspended will be cleared, this cause the erase timeo is not reset and will result time out error for erase. Signed-off-by: Graff Yang <graff.yang@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -1236,10 +1236,14 @@ static int inval_cache_and_wait_for_operation(
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remove_wait_queue(&chip->wq, &wait);
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spin_lock(chip->mutex);
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}
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if (chip->erase_suspended || chip->write_suspended) {
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/* Suspend has occured while sleep: reset timeout */
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if (chip->erase_suspended && chip_state == FL_ERASING) {
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/* Erase suspend occured while sleep: reset timeout */
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timeo = reset_timeo;
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chip->erase_suspended = 0;
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}
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if (chip->write_suspended && chip_state == FL_WRITING) {
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/* Write suspend occured while sleep: reset timeout */
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timeo = reset_timeo;
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chip->write_suspended = 0;
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}
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}
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