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Merge branches 'acpi-processor' and 'acpi-cppc'
* acpi-processor: ACPI / sleep: move acpi_processor_sleep to sleep.c ACPI / processor : add support for ACPI0010 processor container ACPI / processor_idle: replace PREFIX with pr_fmt * acpi-cppc: ACPI / CPPC: use MRTT/MPAR to decide if/when a req can be sent ACPI / CPPC: replace writeX/readX to PCC with relaxed version mailbox: pcc: optimized pcc_send_data ACPI / CPPC: optimized cpc_read and cpc_write ACPI / CPPC: Optimize PCC Read Write operations
This commit is contained in:
Rafael J. Wysocki
commit
6a8ccb1dfd
@ -514,7 +514,24 @@ static struct acpi_scan_handler processor_handler = {
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},
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};
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static int acpi_processor_container_attach(struct acpi_device *dev,
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const struct acpi_device_id *id)
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{
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return 1;
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}
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static const struct acpi_device_id processor_container_ids[] = {
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{ ACPI_PROCESSOR_CONTAINER_HID, },
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{ }
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};
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static struct acpi_scan_handler processor_container_handler = {
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.ids = processor_container_ids,
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.attach = acpi_processor_container_attach,
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};
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void __init acpi_processor_init(void)
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{
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acpi_scan_add_handler_with_hotplug(&processor_handler, "processor");
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acpi_scan_add_handler(&processor_container_handler);
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}
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@ -39,6 +39,7 @@
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#include <linux/cpufreq.h>
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#include <linux/delay.h>
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#include <linux/ktime.h>
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#include <acpi/cppc_acpi.h>
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/*
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@ -63,58 +64,140 @@ static struct mbox_chan *pcc_channel;
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static void __iomem *pcc_comm_addr;
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static u64 comm_base_addr;
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static int pcc_subspace_idx = -1;
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static u16 pcc_cmd_delay;
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static bool pcc_channel_acquired;
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static ktime_t deadline;
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static unsigned int pcc_mpar, pcc_mrtt;
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/* pcc mapped address + header size + offset within PCC subspace */
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#define GET_PCC_VADDR(offs) (pcc_comm_addr + 0x8 + (offs))
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/*
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* Arbitrary Retries in case the remote processor is slow to respond
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* to PCC commands.
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* to PCC commands. Keeping it high enough to cover emulators where
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* the processors run painfully slow.
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*/
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#define NUM_RETRIES 500
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static int send_pcc_cmd(u16 cmd)
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static int check_pcc_chan(void)
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{
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int retries, result = -EIO;
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struct acpi_pcct_hw_reduced *pcct_ss = pcc_channel->con_priv;
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struct acpi_pcct_shared_memory *generic_comm_base =
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(struct acpi_pcct_shared_memory *) pcc_comm_addr;
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u32 cmd_latency = pcct_ss->latency;
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/* Min time OS should wait before sending next command. */
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udelay(pcc_cmd_delay);
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/* Write to the shared comm region. */
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writew(cmd, &generic_comm_base->command);
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/* Flip CMD COMPLETE bit */
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writew(0, &generic_comm_base->status);
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/* Ring doorbell */
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result = mbox_send_message(pcc_channel, &cmd);
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if (result < 0) {
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pr_err("Err sending PCC mbox message. cmd:%d, ret:%d\n",
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cmd, result);
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return result;
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}
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/* Wait for a nominal time to let platform process command. */
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udelay(cmd_latency);
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int ret = -EIO;
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struct acpi_pcct_shared_memory __iomem *generic_comm_base = pcc_comm_addr;
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ktime_t next_deadline = ktime_add(ktime_get(), deadline);
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/* Retry in case the remote processor was too slow to catch up. */
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for (retries = NUM_RETRIES; retries > 0; retries--) {
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while (!ktime_after(ktime_get(), next_deadline)) {
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/*
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* Per spec, prior to boot the PCC space wil be initialized by
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* platform and should have set the command completion bit when
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* PCC can be used by OSPM
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*/
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if (readw_relaxed(&generic_comm_base->status) & PCC_CMD_COMPLETE) {
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result = 0;
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ret = 0;
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break;
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}
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/*
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* Reducing the bus traffic in case this loop takes longer than
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* a few retries.
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*/
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udelay(3);
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}
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mbox_client_txdone(pcc_channel, result);
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return result;
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return ret;
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}
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static int send_pcc_cmd(u16 cmd)
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{
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int ret = -EIO;
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struct acpi_pcct_shared_memory *generic_comm_base =
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(struct acpi_pcct_shared_memory *) pcc_comm_addr;
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static ktime_t last_cmd_cmpl_time, last_mpar_reset;
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static int mpar_count;
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unsigned int time_delta;
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/*
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* For CMD_WRITE we know for a fact the caller should have checked
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* the channel before writing to PCC space
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*/
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if (cmd == CMD_READ) {
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ret = check_pcc_chan();
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if (ret)
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return ret;
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}
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/*
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* Handle the Minimum Request Turnaround Time(MRTT)
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* "The minimum amount of time that OSPM must wait after the completion
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* of a command before issuing the next command, in microseconds"
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*/
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if (pcc_mrtt) {
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time_delta = ktime_us_delta(ktime_get(), last_cmd_cmpl_time);
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if (pcc_mrtt > time_delta)
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udelay(pcc_mrtt - time_delta);
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}
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/*
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* Handle the non-zero Maximum Periodic Access Rate(MPAR)
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* "The maximum number of periodic requests that the subspace channel can
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* support, reported in commands per minute. 0 indicates no limitation."
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*
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* This parameter should be ideally zero or large enough so that it can
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* handle maximum number of requests that all the cores in the system can
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* collectively generate. If it is not, we will follow the spec and just
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* not send the request to the platform after hitting the MPAR limit in
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* any 60s window
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*/
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if (pcc_mpar) {
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if (mpar_count == 0) {
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time_delta = ktime_ms_delta(ktime_get(), last_mpar_reset);
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if (time_delta < 60 * MSEC_PER_SEC) {
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pr_debug("PCC cmd not sent due to MPAR limit");
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return -EIO;
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}
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last_mpar_reset = ktime_get();
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mpar_count = pcc_mpar;
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}
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mpar_count--;
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}
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/* Write to the shared comm region. */
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writew_relaxed(cmd, &generic_comm_base->command);
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/* Flip CMD COMPLETE bit */
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writew_relaxed(0, &generic_comm_base->status);
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/* Ring doorbell */
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ret = mbox_send_message(pcc_channel, &cmd);
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if (ret < 0) {
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pr_err("Err sending PCC mbox message. cmd:%d, ret:%d\n",
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cmd, ret);
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return ret;
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}
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/*
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* For READs we need to ensure the cmd completed to ensure
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* the ensuing read()s can proceed. For WRITEs we dont care
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* because the actual write()s are done before coming here
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* and the next READ or WRITE will check if the channel
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* is busy/free at the entry of this call.
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*
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* If Minimum Request Turnaround Time is non-zero, we need
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* to record the completion time of both READ and WRITE
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* command for proper handling of MRTT, so we need to check
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* for pcc_mrtt in addition to CMD_READ
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*/
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if (cmd == CMD_READ || pcc_mrtt) {
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ret = check_pcc_chan();
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if (pcc_mrtt)
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last_cmd_cmpl_time = ktime_get();
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}
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mbox_client_txdone(pcc_channel, ret);
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return ret;
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}
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static void cppc_chan_tx_done(struct mbox_client *cl, void *msg, int ret)
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{
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if (ret)
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if (ret < 0)
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pr_debug("TX did not complete: CMD sent:%x, ret:%d\n",
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*(u16 *)msg, ret);
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else
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@ -306,6 +389,7 @@ static int register_pcc_channel(int pcc_subspace_idx)
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{
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struct acpi_pcct_hw_reduced *cppc_ss;
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unsigned int len;
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u64 usecs_lat;
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if (pcc_subspace_idx >= 0) {
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pcc_channel = pcc_mbox_request_channel(&cppc_mbox_cl,
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@ -335,7 +419,16 @@ static int register_pcc_channel(int pcc_subspace_idx)
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*/
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comm_base_addr = cppc_ss->base_address;
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len = cppc_ss->length;
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pcc_cmd_delay = cppc_ss->min_turnaround_time;
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/*
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* cppc_ss->latency is just a Nominal value. In reality
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* the remote processor could be much slower to reply.
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* So add an arbitrary amount of wait on top of Nominal.
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*/
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usecs_lat = NUM_RETRIES * cppc_ss->latency;
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deadline = ns_to_ktime(usecs_lat * NSEC_PER_USEC);
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pcc_mrtt = cppc_ss->min_turnaround_time;
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pcc_mpar = cppc_ss->max_access_rate;
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pcc_comm_addr = acpi_os_ioremap(comm_base_addr, len);
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if (!pcc_comm_addr) {
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@ -546,29 +639,74 @@ void acpi_cppc_processor_exit(struct acpi_processor *pr)
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}
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EXPORT_SYMBOL_GPL(acpi_cppc_processor_exit);
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static u64 get_phys_addr(struct cpc_reg *reg)
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/*
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* Since cpc_read and cpc_write are called while holding pcc_lock, it should be
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* as fast as possible. We have already mapped the PCC subspace during init, so
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* we can directly write to it.
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*/
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static int cpc_read(struct cpc_reg *reg, u64 *val)
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{
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/* PCC communication addr space begins at byte offset 0x8. */
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if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM)
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return (u64)comm_base_addr + 0x8 + reg->address;
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else
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return reg->address;
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int ret_val = 0;
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*val = 0;
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if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {
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void __iomem *vaddr = GET_PCC_VADDR(reg->address);
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switch (reg->bit_width) {
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case 8:
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*val = readb_relaxed(vaddr);
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break;
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case 16:
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*val = readw_relaxed(vaddr);
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break;
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case 32:
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*val = readl_relaxed(vaddr);
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break;
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case 64:
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*val = readq_relaxed(vaddr);
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break;
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default:
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pr_debug("Error: Cannot read %u bit width from PCC\n",
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reg->bit_width);
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ret_val = -EFAULT;
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}
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} else
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ret_val = acpi_os_read_memory((acpi_physical_address)reg->address,
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val, reg->bit_width);
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return ret_val;
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}
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static void cpc_read(struct cpc_reg *reg, u64 *val)
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static int cpc_write(struct cpc_reg *reg, u64 val)
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{
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u64 addr = get_phys_addr(reg);
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int ret_val = 0;
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acpi_os_read_memory((acpi_physical_address)addr,
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val, reg->bit_width);
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if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {
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void __iomem *vaddr = GET_PCC_VADDR(reg->address);
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switch (reg->bit_width) {
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case 8:
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writeb_relaxed(val, vaddr);
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break;
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case 16:
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writew_relaxed(val, vaddr);
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break;
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case 32:
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writel_relaxed(val, vaddr);
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break;
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case 64:
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writeq_relaxed(val, vaddr);
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break;
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default:
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pr_debug("Error: Cannot write %u bit width to PCC\n",
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reg->bit_width);
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ret_val = -EFAULT;
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break;
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}
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static void cpc_write(struct cpc_reg *reg, u64 val)
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{
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u64 addr = get_phys_addr(reg);
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acpi_os_write_memory((acpi_physical_address)addr,
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} else
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ret_val = acpi_os_write_memory((acpi_physical_address)reg->address,
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val, reg->bit_width);
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return ret_val;
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}
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/**
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@ -604,7 +742,7 @@ int cppc_get_perf_caps(int cpunum, struct cppc_perf_caps *perf_caps)
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(ref_perf->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
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(nom_perf->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM)) {
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/* Ring doorbell once to update PCC subspace */
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if (send_pcc_cmd(CMD_READ)) {
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if (send_pcc_cmd(CMD_READ) < 0) {
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ret = -EIO;
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goto out_err;
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}
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@ -662,7 +800,7 @@ int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
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if ((delivered_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
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(reference_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM)) {
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/* Ring doorbell once to update PCC subspace */
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if (send_pcc_cmd(CMD_READ)) {
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if (send_pcc_cmd(CMD_READ) < 0) {
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ret = -EIO;
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goto out_err;
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}
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@ -713,6 +851,13 @@ int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
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spin_lock(&pcc_lock);
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/* If this is PCC reg, check if channel is free before writing */
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if (desired_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {
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ret = check_pcc_chan();
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if (ret)
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goto busy_channel;
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}
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/*
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* Skip writing MIN/MAX until Linux knows how to come up with
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* useful values.
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@ -722,10 +867,10 @@ int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
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/* Is this a PCC reg ?*/
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if (desired_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {
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/* Ring doorbell so Remote can get our perf request. */
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if (send_pcc_cmd(CMD_WRITE))
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if (send_pcc_cmd(CMD_WRITE) < 0)
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ret = -EIO;
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}
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busy_channel:
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spin_unlock(&pcc_lock);
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return ret;
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@ -314,7 +314,6 @@ static int __init acpi_processor_driver_init(void)
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if (result < 0)
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return result;
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acpi_processor_syscore_init();
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register_hotcpu_notifier(&acpi_cpu_notifier);
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acpi_thermal_cpufreq_init();
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acpi_processor_ppc_init();
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@ -330,7 +329,6 @@ static void __exit acpi_processor_driver_exit(void)
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acpi_processor_ppc_exit();
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acpi_thermal_cpufreq_exit();
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unregister_hotcpu_notifier(&acpi_cpu_notifier);
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acpi_processor_syscore_exit();
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driver_unregister(&acpi_processor_driver);
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}
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@ -23,6 +23,7 @@
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#define pr_fmt(fmt) "ACPI: " fmt
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#include <linux/module.h>
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#include <linux/acpi.h>
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@ -30,7 +31,6 @@
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#include <linux/sched.h> /* need_resched() */
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#include <linux/tick.h>
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#include <linux/cpuidle.h>
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#include <linux/syscore_ops.h>
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#include <acpi/processor.h>
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|
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/*
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@ -43,8 +43,6 @@
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#include <asm/apic.h>
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#endif
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|
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#define PREFIX "ACPI: "
|
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|
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#define ACPI_PROCESSOR_CLASS "processor"
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#define _COMPONENT ACPI_PROCESSOR_COMPONENT
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ACPI_MODULE_NAME("processor_idle");
|
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@ -81,7 +79,7 @@ static int set_max_cstate(const struct dmi_system_id *id)
|
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if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
|
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return 0;
|
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|
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printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
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pr_notice("%s detected - limiting to C%ld max_cstate."
|
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" Override with \"processor.max_cstate=%d\"\n", id->ident,
|
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(long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
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|
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@ -194,42 +192,6 @@ static void lapic_timer_state_broadcast(struct acpi_processor *pr,
|
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|
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#endif
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|
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#ifdef CONFIG_PM_SLEEP
|
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static u32 saved_bm_rld;
|
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|
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static int acpi_processor_suspend(void)
|
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{
|
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acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
|
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return 0;
|
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}
|
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|
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static void acpi_processor_resume(void)
|
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{
|
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u32 resumed_bm_rld = 0;
|
||||
|
||||
acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
|
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if (resumed_bm_rld == saved_bm_rld)
|
||||
return;
|
||||
|
||||
acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
|
||||
}
|
||||
|
||||
static struct syscore_ops acpi_processor_syscore_ops = {
|
||||
.suspend = acpi_processor_suspend,
|
||||
.resume = acpi_processor_resume,
|
||||
};
|
||||
|
||||
void acpi_processor_syscore_init(void)
|
||||
{
|
||||
register_syscore_ops(&acpi_processor_syscore_ops);
|
||||
}
|
||||
|
||||
void acpi_processor_syscore_exit(void)
|
||||
{
|
||||
unregister_syscore_ops(&acpi_processor_syscore_ops);
|
||||
}
|
||||
#endif /* CONFIG_PM_SLEEP */
|
||||
|
||||
#if defined(CONFIG_X86)
|
||||
static void tsc_check_state(int state)
|
||||
{
|
||||
@ -351,7 +313,7 @@ static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
|
||||
|
||||
/* There must be at least 2 elements */
|
||||
if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
|
||||
printk(KERN_ERR PREFIX "not enough elements in _CST\n");
|
||||
pr_err("not enough elements in _CST\n");
|
||||
ret = -EFAULT;
|
||||
goto end;
|
||||
}
|
||||
@ -360,7 +322,7 @@ static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
|
||||
|
||||
/* Validate number of power states. */
|
||||
if (count < 1 || count != cst->package.count - 1) {
|
||||
printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
|
||||
pr_err("count given by _CST is not valid\n");
|
||||
ret = -EFAULT;
|
||||
goto end;
|
||||
}
|
||||
@ -469,11 +431,9 @@ static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
|
||||
* (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
|
||||
*/
|
||||
if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
|
||||
printk(KERN_WARNING
|
||||
"Limiting number of power states to max (%d)\n",
|
||||
pr_warn("Limiting number of power states to max (%d)\n",
|
||||
ACPI_PROCESSOR_MAX_POWER);
|
||||
printk(KERN_WARNING
|
||||
"Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
|
||||
pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -1097,7 +1057,7 @@ int acpi_processor_power_init(struct acpi_processor *pr)
|
||||
retval = cpuidle_register_driver(&acpi_idle_driver);
|
||||
if (retval)
|
||||
return retval;
|
||||
printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
|
||||
pr_debug("%s registered with cpuidle\n",
|
||||
acpi_idle_driver.name);
|
||||
}
|
||||
|
||||
|
||||
@ -19,6 +19,7 @@
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/syscore_ops.h>
|
||||
#include <asm/io.h>
|
||||
#include <trace/events/power.h>
|
||||
|
||||
@ -677,6 +678,39 @@ static void acpi_sleep_suspend_setup(void)
|
||||
static inline void acpi_sleep_suspend_setup(void) {}
|
||||
#endif /* !CONFIG_SUSPEND */
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
static u32 saved_bm_rld;
|
||||
|
||||
static int acpi_save_bm_rld(void)
|
||||
{
|
||||
acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void acpi_restore_bm_rld(void)
|
||||
{
|
||||
u32 resumed_bm_rld = 0;
|
||||
|
||||
acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
|
||||
if (resumed_bm_rld == saved_bm_rld)
|
||||
return;
|
||||
|
||||
acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
|
||||
}
|
||||
|
||||
static struct syscore_ops acpi_sleep_syscore_ops = {
|
||||
.suspend = acpi_save_bm_rld,
|
||||
.resume = acpi_restore_bm_rld,
|
||||
};
|
||||
|
||||
void acpi_sleep_syscore_init(void)
|
||||
{
|
||||
register_syscore_ops(&acpi_sleep_syscore_ops);
|
||||
}
|
||||
#else
|
||||
static inline void acpi_sleep_syscore_init(void) {}
|
||||
#endif /* CONFIG_PM_SLEEP */
|
||||
|
||||
#ifdef CONFIG_HIBERNATION
|
||||
static unsigned long s4_hardware_signature;
|
||||
static struct acpi_table_facs *facs;
|
||||
@ -839,6 +873,7 @@ int __init acpi_sleep_init(void)
|
||||
|
||||
sleep_states[ACPI_STATE_S0] = 1;
|
||||
|
||||
acpi_sleep_syscore_init();
|
||||
acpi_sleep_suspend_setup();
|
||||
acpi_sleep_hibernate_setup();
|
||||
|
||||
|
||||
@ -63,6 +63,7 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mailbox_controller.h>
|
||||
#include <linux/mailbox_client.h>
|
||||
#include <linux/io-64-nonatomic-lo-hi.h>
|
||||
|
||||
#include "mailbox.h"
|
||||
|
||||
@ -70,6 +71,9 @@
|
||||
|
||||
static struct mbox_chan *pcc_mbox_channels;
|
||||
|
||||
/* Array of cached virtual address for doorbell registers */
|
||||
static void __iomem **pcc_doorbell_vaddr;
|
||||
|
||||
static struct mbox_controller pcc_mbox_ctrl = {};
|
||||
/**
|
||||
* get_pcc_channel - Given a PCC subspace idx, get
|
||||
@ -160,6 +164,66 @@ void pcc_mbox_free_channel(struct mbox_chan *chan)
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pcc_mbox_free_channel);
|
||||
|
||||
/*
|
||||
* PCC can be used with perf critical drivers such as CPPC
|
||||
* So it makes sense to locally cache the virtual address and
|
||||
* use it to read/write to PCC registers such as doorbell register
|
||||
*
|
||||
* The below read_register and write_registers are used to read and
|
||||
* write from perf critical registers such as PCC doorbell register
|
||||
*/
|
||||
static int read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width)
|
||||
{
|
||||
int ret_val = 0;
|
||||
|
||||
switch (bit_width) {
|
||||
case 8:
|
||||
*val = readb(vaddr);
|
||||
break;
|
||||
case 16:
|
||||
*val = readw(vaddr);
|
||||
break;
|
||||
case 32:
|
||||
*val = readl(vaddr);
|
||||
break;
|
||||
case 64:
|
||||
*val = readq(vaddr);
|
||||
break;
|
||||
default:
|
||||
pr_debug("Error: Cannot read register of %u bit width",
|
||||
bit_width);
|
||||
ret_val = -EFAULT;
|
||||
break;
|
||||
}
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
static int write_register(void __iomem *vaddr, u64 val, unsigned int bit_width)
|
||||
{
|
||||
int ret_val = 0;
|
||||
|
||||
switch (bit_width) {
|
||||
case 8:
|
||||
writeb(val, vaddr);
|
||||
break;
|
||||
case 16:
|
||||
writew(val, vaddr);
|
||||
break;
|
||||
case 32:
|
||||
writel(val, vaddr);
|
||||
break;
|
||||
case 64:
|
||||
writeq(val, vaddr);
|
||||
break;
|
||||
default:
|
||||
pr_debug("Error: Cannot write register of %u bit width",
|
||||
bit_width);
|
||||
ret_val = -EFAULT;
|
||||
break;
|
||||
}
|
||||
return ret_val;
|
||||
}
|
||||
|
||||
/**
|
||||
* pcc_send_data - Called from Mailbox Controller code. Used
|
||||
* here only to ring the channel doorbell. The PCC client
|
||||
@ -175,21 +239,39 @@ EXPORT_SYMBOL_GPL(pcc_mbox_free_channel);
|
||||
static int pcc_send_data(struct mbox_chan *chan, void *data)
|
||||
{
|
||||
struct acpi_pcct_hw_reduced *pcct_ss = chan->con_priv;
|
||||
struct acpi_generic_address doorbell;
|
||||
struct acpi_generic_address *doorbell;
|
||||
u64 doorbell_preserve;
|
||||
u64 doorbell_val;
|
||||
u64 doorbell_write;
|
||||
u32 id = chan - pcc_mbox_channels;
|
||||
int ret = 0;
|
||||
|
||||
doorbell = pcct_ss->doorbell_register;
|
||||
if (id >= pcc_mbox_ctrl.num_chans) {
|
||||
pr_debug("pcc_send_data: Invalid mbox_chan passed\n");
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
doorbell = &pcct_ss->doorbell_register;
|
||||
doorbell_preserve = pcct_ss->preserve_mask;
|
||||
doorbell_write = pcct_ss->write_mask;
|
||||
|
||||
/* Sync notification from OS to Platform. */
|
||||
acpi_read(&doorbell_val, &doorbell);
|
||||
acpi_write((doorbell_val & doorbell_preserve) | doorbell_write,
|
||||
&doorbell);
|
||||
|
||||
return 0;
|
||||
if (pcc_doorbell_vaddr[id]) {
|
||||
ret = read_register(pcc_doorbell_vaddr[id], &doorbell_val,
|
||||
doorbell->bit_width);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = write_register(pcc_doorbell_vaddr[id],
|
||||
(doorbell_val & doorbell_preserve) | doorbell_write,
|
||||
doorbell->bit_width);
|
||||
} else {
|
||||
ret = acpi_read(&doorbell_val, doorbell);
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = acpi_write((doorbell_val & doorbell_preserve) | doorbell_write,
|
||||
doorbell);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct mbox_chan_ops pcc_chan_ops = {
|
||||
@ -265,14 +347,29 @@ static int __init acpi_pcc_probe(void)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
pcc_doorbell_vaddr = kcalloc(count, sizeof(void *), GFP_KERNEL);
|
||||
if (!pcc_doorbell_vaddr) {
|
||||
kfree(pcc_mbox_channels);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* Point to the first PCC subspace entry */
|
||||
pcct_entry = (struct acpi_subtable_header *) (
|
||||
(unsigned long) pcct_tbl + sizeof(struct acpi_table_pcct));
|
||||
|
||||
for (i = 0; i < count; i++) {
|
||||
struct acpi_generic_address *db_reg;
|
||||
struct acpi_pcct_hw_reduced *pcct_ss;
|
||||
pcc_mbox_channels[i].con_priv = pcct_entry;
|
||||
pcct_entry = (struct acpi_subtable_header *)
|
||||
((unsigned long) pcct_entry + pcct_entry->length);
|
||||
|
||||
/* If doorbell is in system memory cache the virt address */
|
||||
pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;
|
||||
db_reg = &pcct_ss->doorbell_register;
|
||||
if (db_reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY)
|
||||
pcc_doorbell_vaddr[i] = acpi_os_ioremap(db_reg->address,
|
||||
db_reg->bit_width/8);
|
||||
}
|
||||
|
||||
pcc_mbox_ctrl.num_chans = count;
|
||||
|
||||
@ -9,6 +9,7 @@
|
||||
#define ACPI_PROCESSOR_CLASS "processor"
|
||||
#define ACPI_PROCESSOR_DEVICE_NAME "Processor"
|
||||
#define ACPI_PROCESSOR_DEVICE_HID "ACPI0007"
|
||||
#define ACPI_PROCESSOR_CONTAINER_HID "ACPI0010"
|
||||
|
||||
#define ACPI_PROCESSOR_BUSY_METRIC 10
|
||||
|
||||
@ -394,14 +395,6 @@ static inline int acpi_processor_hotplug(struct acpi_processor *pr)
|
||||
}
|
||||
#endif /* CONFIG_ACPI_PROCESSOR_IDLE */
|
||||
|
||||
#if defined(CONFIG_PM_SLEEP) & defined(CONFIG_ACPI_PROCESSOR_IDLE)
|
||||
void acpi_processor_syscore_init(void);
|
||||
void acpi_processor_syscore_exit(void);
|
||||
#else
|
||||
static inline void acpi_processor_syscore_init(void) {}
|
||||
static inline void acpi_processor_syscore_exit(void) {}
|
||||
#endif
|
||||
|
||||
/* in processor_thermal.c */
|
||||
int acpi_processor_get_limit_info(struct acpi_processor *pr);
|
||||
extern const struct thermal_cooling_device_ops processor_cooling_ops;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user