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Merge branch 'mlx5-fixes'
Saeed Mahameed says: ==================== Mellanox 100G mlx5 fixes 2016-11-04 This series contains six hot fixes of the mlx5 core and mlx5e driver. Huy fixed an invalid pointer dereference on initialization flow for when the selected mlx5 load profile is out of range. Or provided three eswitch offloads related fixes - Prevent changing NS of a VF representor. - Handle matching on vlan priority for offloaded TC rules - Set the actions for offloaded rules properly On my part I here addressed the error flow related issues in mlx5e_open_channel reported by Jesper just this week. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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6a0c9f6888
@ -1445,6 +1445,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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c->netdev = priv->netdev;
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c->mkey_be = cpu_to_be32(priv->mdev->mlx5e_res.mkey.key);
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c->num_tc = priv->params.num_tc;
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c->xdp = !!priv->xdp_prog;
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if (priv->params.rx_am_enabled)
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rx_cq_profile = mlx5e_am_get_def_profile(priv->params.rx_cq_period_mode);
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@ -1468,6 +1469,12 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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if (err)
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goto err_close_tx_cqs;
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/* XDP SQ CQ params are same as normal TXQ sq CQ params */
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err = c->xdp ? mlx5e_open_cq(c, &cparam->tx_cq, &c->xdp_sq.cq,
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priv->params.tx_cq_moderation) : 0;
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if (err)
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goto err_close_rx_cq;
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napi_enable(&c->napi);
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err = mlx5e_open_sq(c, 0, &cparam->icosq, &c->icosq);
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@ -1488,21 +1495,10 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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}
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}
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if (priv->xdp_prog) {
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/* XDP SQ CQ params are same as normal TXQ sq CQ params */
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err = mlx5e_open_cq(c, &cparam->tx_cq, &c->xdp_sq.cq,
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priv->params.tx_cq_moderation);
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err = c->xdp ? mlx5e_open_sq(c, 0, &cparam->xdp_sq, &c->xdp_sq) : 0;
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if (err)
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goto err_close_sqs;
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err = mlx5e_open_sq(c, 0, &cparam->xdp_sq, &c->xdp_sq);
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if (err) {
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mlx5e_close_cq(&c->xdp_sq.cq);
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goto err_close_sqs;
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}
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}
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c->xdp = !!priv->xdp_prog;
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err = mlx5e_open_rq(c, &cparam->rq, &c->rq);
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if (err)
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goto err_close_xdp_sq;
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@ -1512,6 +1508,7 @@ static int mlx5e_open_channel(struct mlx5e_priv *priv, int ix,
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return 0;
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err_close_xdp_sq:
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if (c->xdp)
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mlx5e_close_sq(&c->xdp_sq);
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err_close_sqs:
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@ -1522,6 +1519,10 @@ err_close_icosq:
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err_disable_napi:
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napi_disable(&c->napi);
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if (c->xdp)
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mlx5e_close_cq(&c->xdp_sq.cq);
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err_close_rx_cq:
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mlx5e_close_cq(&c->rq.cq);
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err_close_tx_cqs:
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@ -308,7 +308,7 @@ static void mlx5e_build_rep_netdev(struct net_device *netdev)
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netdev->switchdev_ops = &mlx5e_rep_switchdev_ops;
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#endif
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netdev->features |= NETIF_F_VLAN_CHALLENGED | NETIF_F_HW_TC;
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netdev->features |= NETIF_F_VLAN_CHALLENGED | NETIF_F_HW_TC | NETIF_F_NETNS_LOCAL;
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netdev->hw_features |= NETIF_F_HW_TC;
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eth_hw_addr_random(netdev);
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@ -237,12 +237,15 @@ static int parse_cls_flower(struct mlx5e_priv *priv, struct mlx5_flow_spec *spec
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skb_flow_dissector_target(f->dissector,
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FLOW_DISSECTOR_KEY_VLAN,
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f->mask);
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if (mask->vlan_id) {
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if (mask->vlan_id || mask->vlan_priority) {
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MLX5_SET(fte_match_set_lyr_2_4, headers_c, vlan_tag, 1);
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MLX5_SET(fte_match_set_lyr_2_4, headers_v, vlan_tag, 1);
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MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id);
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MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id);
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MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority);
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MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority);
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}
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}
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@ -57,7 +57,8 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
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if (esw->mode != SRIOV_OFFLOADS)
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return ERR_PTR(-EOPNOTSUPP);
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action = attr->action;
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/* per flow vlan pop/push is emulated, don't set that into the firmware */
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action = attr->action & ~(MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH | MLX5_FLOW_CONTEXT_ACTION_VLAN_POP);
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if (action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
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dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
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@ -1226,6 +1226,9 @@ static int init_one(struct pci_dev *pdev,
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pci_set_drvdata(pdev, dev);
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dev->pdev = pdev;
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dev->event = mlx5_core_event;
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if (prof_sel < 0 || prof_sel >= ARRAY_SIZE(profile)) {
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mlx5_core_warn(dev,
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"selected profile out of range, selecting default (%d)\n",
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@ -1233,8 +1236,6 @@ static int init_one(struct pci_dev *pdev,
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prof_sel = MLX5_DEFAULT_PROF;
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}
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dev->profile = &profile[prof_sel];
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dev->pdev = pdev;
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dev->event = mlx5_core_event;
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INIT_LIST_HEAD(&priv->ctx_list);
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spin_lock_init(&priv->ctx_lock);
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