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nvmem: stm32: add OP-TEE support for STM32MP13x
For boot with OP-TEE on STM32MP13, the communication with the secure world no more use STMicroelectronics SMC but communication with the STM32MP BSEC TA, for data access (read/write) or lock operation: - all the request are sent to OP-TEE trusted application, - for upper OTP with ECC protection and with word programming only each OTP are permanently locked when programmed to avoid ECC error on the second write operation Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20230206134356.839737-18-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Patrick Delaunay
Greg Kroah-Hartman
parent
50014d6596
commit
6a0bc3522e
@ -290,9 +290,20 @@ config NVMEM_SPRD_EFUSE
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This driver can also be built as a module. If so, the module
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will be called nvmem-sprd-efuse.
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config NVMEM_STM32_BSEC_OPTEE_TA
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bool "STM32MP BSEC OP-TEE TA support for nvmem-stm32-romem driver"
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depends on OPTEE
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help
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Say y here to enable the accesses to STM32MP SoC OTPs by the OP-TEE
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trusted application STM32MP BSEC.
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This library is a used by stm32-romem driver or included in the module
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called nvmem-stm32-romem.
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config NVMEM_STM32_ROMEM
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tristate "STMicroelectronics STM32 factory-programmed memory support"
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depends on ARCH_STM32 || COMPILE_TEST
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imply NVMEM_STM32_BSEC_OPTEE_TA
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help
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Say y here to enable read-only access for STMicroelectronics STM32
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factory-programmed memory area.
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@ -61,6 +61,7 @@ obj-$(CONFIG_NVMEM_SPRD_EFUSE) += nvmem_sprd_efuse.o
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nvmem_sprd_efuse-y := sprd-efuse.o
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obj-$(CONFIG_NVMEM_STM32_ROMEM) += nvmem_stm32_romem.o
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nvmem_stm32_romem-y := stm32-romem.o
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nvmem_stm32_romem-$(CONFIG_NVMEM_STM32_BSEC_OPTEE_TA) += stm32-bsec-optee-ta.o
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obj-$(CONFIG_NVMEM_SUNPLUS_OCOTP) += nvmem_sunplus_ocotp.o
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nvmem_sunplus_ocotp-y := sunplus-ocotp.o
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obj-$(CONFIG_NVMEM_SUNXI_SID) += nvmem_sunxi_sid.o
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298
drivers/nvmem/stm32-bsec-optee-ta.c
Normal file
298
drivers/nvmem/stm32-bsec-optee-ta.c
Normal file
@ -0,0 +1,298 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* OP-TEE STM32MP BSEC PTA interface, used by STM32 ROMEM driver
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*
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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*/
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#include <linux/tee_drv.h>
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#include "stm32-bsec-optee-ta.h"
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/*
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* Read OTP memory
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*
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* [in] value[0].a OTP start offset in byte
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* [in] value[0].b Access type (0:shadow, 1:fuse, 2:lock)
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* [out] memref[1].buffer Output buffer to store read values
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* [out] memref[1].size Size of OTP to be read
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*
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* Return codes:
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* TEE_SUCCESS - Invoke command success
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* TEE_ERROR_BAD_PARAMETERS - Incorrect input param
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* TEE_ERROR_ACCESS_DENIED - OTP not accessible by caller
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*/
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#define PTA_BSEC_READ_MEM 0x0
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/*
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* Write OTP memory
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*
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* [in] value[0].a OTP start offset in byte
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* [in] value[0].b Access type (0:shadow, 1:fuse, 2:lock)
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* [in] memref[1].buffer Input buffer to read values
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* [in] memref[1].size Size of OTP to be written
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*
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* Return codes:
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* TEE_SUCCESS - Invoke command success
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* TEE_ERROR_BAD_PARAMETERS - Incorrect input param
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* TEE_ERROR_ACCESS_DENIED - OTP not accessible by caller
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*/
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#define PTA_BSEC_WRITE_MEM 0x1
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/* value of PTA_BSEC access type = value[in] b */
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#define SHADOW_ACCESS 0
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#define FUSE_ACCESS 1
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#define LOCK_ACCESS 2
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/* Bitfield definition for LOCK status */
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#define LOCK_PERM BIT(30)
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/* OP-TEE STM32MP BSEC TA UUID */
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static const uuid_t stm32mp_bsec_ta_uuid =
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UUID_INIT(0x94cf71ad, 0x80e6, 0x40b5,
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0xa7, 0xc6, 0x3d, 0xc5, 0x01, 0xeb, 0x28, 0x03);
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/*
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* Check whether this driver supports the BSEC TA in the TEE instance
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* represented by the params (ver/data) to this function.
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*/
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static int stm32_bsec_optee_ta_match(struct tee_ioctl_version_data *ver,
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const void *data)
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{
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/* Currently this driver only supports GP compliant, OP-TEE based TA */
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if ((ver->impl_id == TEE_IMPL_ID_OPTEE) &&
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(ver->gen_caps & TEE_GEN_CAP_GP))
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return 1;
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else
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return 0;
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}
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/* Open a session to OP-TEE for STM32MP BSEC TA */
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static int stm32_bsec_ta_open_session(struct tee_context *ctx, u32 *id)
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{
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struct tee_ioctl_open_session_arg sess_arg;
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int rc;
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memset(&sess_arg, 0, sizeof(sess_arg));
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export_uuid(sess_arg.uuid, &stm32mp_bsec_ta_uuid);
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sess_arg.clnt_login = TEE_IOCTL_LOGIN_REE_KERNEL;
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sess_arg.num_params = 0;
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rc = tee_client_open_session(ctx, &sess_arg, NULL);
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if ((rc < 0) || (sess_arg.ret != 0)) {
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pr_err("%s: tee_client_open_session failed err:%#x, ret:%#x\n",
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__func__, sess_arg.ret, rc);
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if (!rc)
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rc = -EINVAL;
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} else {
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*id = sess_arg.session;
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}
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return rc;
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}
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/* close a session to OP-TEE for STM32MP BSEC TA */
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static void stm32_bsec_ta_close_session(void *ctx, u32 id)
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{
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tee_client_close_session(ctx, id);
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}
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/* stm32_bsec_optee_ta_open() - initialize the STM32MP BSEC TA */
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int stm32_bsec_optee_ta_open(struct tee_context **ctx)
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{
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struct tee_context *tee_ctx;
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u32 session_id;
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int rc;
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/* Open context with TEE driver */
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tee_ctx = tee_client_open_context(NULL, stm32_bsec_optee_ta_match, NULL, NULL);
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if (IS_ERR(tee_ctx)) {
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rc = PTR_ERR(tee_ctx);
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if (rc == -ENOENT)
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return -EPROBE_DEFER;
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pr_err("%s: tee_client_open_context failed (%d)\n", __func__, rc);
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return rc;
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}
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/* Check STM32MP BSEC TA presence */
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rc = stm32_bsec_ta_open_session(tee_ctx, &session_id);
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if (rc) {
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tee_client_close_context(tee_ctx);
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return rc;
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}
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stm32_bsec_ta_close_session(tee_ctx, session_id);
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*ctx = tee_ctx;
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return 0;
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}
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/* stm32_bsec_optee_ta_open() - release the PTA STM32MP BSEC TA */
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void stm32_bsec_optee_ta_close(void *ctx)
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{
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tee_client_close_context(ctx);
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}
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/* stm32_bsec_optee_ta_read() - nvmem read access using PTA client driver */
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int stm32_bsec_optee_ta_read(struct tee_context *ctx, unsigned int offset,
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void *buf, size_t bytes)
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{
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struct tee_shm *shm;
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struct tee_ioctl_invoke_arg arg;
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struct tee_param param[2];
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u8 *shm_buf;
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u32 start, num_bytes;
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int ret;
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u32 session_id;
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ret = stm32_bsec_ta_open_session(ctx, &session_id);
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if (ret)
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return ret;
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memset(&arg, 0, sizeof(arg));
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memset(¶m, 0, sizeof(param));
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arg.func = PTA_BSEC_READ_MEM;
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arg.session = session_id;
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arg.num_params = 2;
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/* align access on 32bits */
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start = ALIGN_DOWN(offset, 4);
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num_bytes = round_up(offset + bytes - start, 4);
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param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT;
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param[0].u.value.a = start;
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param[0].u.value.b = SHADOW_ACCESS;
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shm = tee_shm_alloc_kernel_buf(ctx, num_bytes);
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if (IS_ERR(shm)) {
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ret = PTR_ERR(shm);
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goto out_tee_session;
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}
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param[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT;
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param[1].u.memref.shm = shm;
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param[1].u.memref.size = num_bytes;
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ret = tee_client_invoke_func(ctx, &arg, param);
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if (ret < 0 || arg.ret != 0) {
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pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n",
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arg.ret, ret);
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if (!ret)
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ret = -EIO;
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}
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if (!ret) {
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shm_buf = tee_shm_get_va(shm, 0);
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if (IS_ERR(shm_buf)) {
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ret = PTR_ERR(shm_buf);
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pr_err("tee_shm_get_va failed for transmit (%d)\n", ret);
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} else {
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/* read data from 32 bits aligned buffer */
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memcpy(buf, &shm_buf[offset % 4], bytes);
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}
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}
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tee_shm_free(shm);
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out_tee_session:
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stm32_bsec_ta_close_session(ctx, session_id);
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return ret;
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}
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/* stm32_bsec_optee_ta_write() - nvmem write access using PTA client driver */
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int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower,
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unsigned int offset, void *buf, size_t bytes)
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{ struct tee_shm *shm;
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struct tee_ioctl_invoke_arg arg;
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struct tee_param param[2];
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u8 *shm_buf;
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int ret;
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u32 session_id;
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ret = stm32_bsec_ta_open_session(ctx, &session_id);
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if (ret)
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return ret;
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/* Allow only writing complete 32-bits aligned words */
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if ((bytes % 4) || (offset % 4))
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return -EINVAL;
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memset(&arg, 0, sizeof(arg));
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memset(¶m, 0, sizeof(param));
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arg.func = PTA_BSEC_WRITE_MEM;
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arg.session = session_id;
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arg.num_params = 2;
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param[0].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT;
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param[0].u.value.a = offset;
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param[0].u.value.b = FUSE_ACCESS;
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shm = tee_shm_alloc_kernel_buf(ctx, bytes);
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if (IS_ERR(shm)) {
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ret = PTR_ERR(shm);
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goto out_tee_session;
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}
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param[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT;
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param[1].u.memref.shm = shm;
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param[1].u.memref.size = bytes;
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shm_buf = tee_shm_get_va(shm, 0);
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if (IS_ERR(shm_buf)) {
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ret = PTR_ERR(shm_buf);
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pr_err("tee_shm_get_va failed for transmit (%d)\n", ret);
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tee_shm_free(shm);
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goto out_tee_session;
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}
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memcpy(shm_buf, buf, bytes);
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ret = tee_client_invoke_func(ctx, &arg, param);
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if (ret < 0 || arg.ret != 0) {
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pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n", arg.ret, ret);
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if (!ret)
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ret = -EIO;
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}
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pr_debug("Write OTPs %d to %zu, ret=%d\n", offset / 4, (offset + bytes) / 4, ret);
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/* Lock the upper OTPs with ECC protection, word programming only */
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if (!ret && ((offset + bytes) >= (lower * 4))) {
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u32 start, nb_lock;
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u32 *lock = (u32 *)shm_buf;
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int i;
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/*
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* don't lock the lower OTPs, no ECC protection and incremental
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* bit programming, a second write is allowed
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*/
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start = max_t(u32, offset, lower * 4);
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nb_lock = (offset + bytes - start) / 4;
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param[0].u.value.a = start;
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param[0].u.value.b = LOCK_ACCESS;
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param[1].u.memref.size = nb_lock * 4;
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for (i = 0; i < nb_lock; i++)
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lock[i] = LOCK_PERM;
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ret = tee_client_invoke_func(ctx, &arg, param);
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if (ret < 0 || arg.ret != 0) {
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pr_err("TA_BSEC invoke failed TEE err:%#x, ret:%#x\n", arg.ret, ret);
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if (!ret)
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ret = -EIO;
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}
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pr_debug("Lock upper OTPs %d to %d, ret=%d\n",
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start / 4, start / 4 + nb_lock, ret);
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}
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tee_shm_free(shm);
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out_tee_session:
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stm32_bsec_ta_close_session(ctx, session_id);
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return ret;
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}
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80
drivers/nvmem/stm32-bsec-optee-ta.h
Normal file
80
drivers/nvmem/stm32-bsec-optee-ta.h
Normal file
@ -0,0 +1,80 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* OP-TEE STM32MP BSEC PTA interface, used by STM32 ROMEM driver
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*
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* Copyright (C) 2022, STMicroelectronics - All Rights Reserved
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*/
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#if IS_ENABLED(CONFIG_NVMEM_STM32_BSEC_OPTEE_TA)
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/**
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* stm32_bsec_optee_ta_open() - initialize the STM32 BSEC TA
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* @ctx: the OP-TEE context on success
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*
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* Return:
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* On success, 0. On failure, -errno.
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*/
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int stm32_bsec_optee_ta_open(struct tee_context **ctx);
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/**
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* stm32_bsec_optee_ta_close() - release the STM32 BSEC TA
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* @ctx: the OP-TEE context
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*
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* This function used to clean the OP-TEE resources initialized in
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* stm32_bsec_optee_ta_open(); it can be used as callback to
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* devm_add_action_or_reset()
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*/
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void stm32_bsec_optee_ta_close(void *ctx);
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/**
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* stm32_bsec_optee_ta_read() - nvmem read access using TA client driver
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* @ctx: the OP-TEE context provided by stm32_bsec_optee_ta_open
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* @offset: nvmem offset
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* @buf: buffer to fill with nvem values
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* @bytes: number of bytes to read
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*
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* Return:
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* On success, 0. On failure, -errno.
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*/
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int stm32_bsec_optee_ta_read(struct tee_context *ctx, unsigned int offset,
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void *buf, size_t bytes);
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/**
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* stm32_bsec_optee_ta_write() - nvmem write access using TA client driver
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* @ctx: the OP-TEE context provided by stm32_bsec_optee_ta_open
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* @lower: number of lower OTP, not protected by ECC
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* @offset: nvmem offset
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* @buf: buffer with nvem values
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* @bytes: number of bytes to write
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*
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* Return:
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* On success, 0. On failure, -errno.
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*/
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int stm32_bsec_optee_ta_write(struct tee_context *ctx, unsigned int lower,
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unsigned int offset, void *buf, size_t bytes);
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#else
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static inline int stm32_bsec_optee_ta_open(struct tee_context **ctx)
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{
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return -EOPNOTSUPP;
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}
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static inline void stm32_bsec_optee_ta_close(void *ctx)
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{
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}
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static inline int stm32_bsec_optee_ta_read(struct tee_context *ctx,
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unsigned int offset, void *buf,
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size_t bytes)
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{
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return -EOPNOTSUPP;
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}
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static inline int stm32_bsec_optee_ta_write(struct tee_context *ctx,
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unsigned int lower,
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unsigned int offset, void *buf,
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size_t bytes)
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{
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return -EOPNOTSUPP;
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}
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#endif /* CONFIG_NVMEM_STM32_BSEC_OPTEE_TA */
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@ -11,6 +11,9 @@
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#include <linux/module.h>
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#include <linux/nvmem-provider.h>
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#include <linux/of_device.h>
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#include <linux/tee_drv.h>
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#include "stm32-bsec-optee-ta.h"
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/* BSEC secure service access from non-secure */
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#define STM32_SMC_BSEC 0x82001003
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@ -25,12 +28,14 @@
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struct stm32_romem_cfg {
|
||||
int size;
|
||||
u8 lower;
|
||||
bool ta;
|
||||
};
|
||||
|
||||
struct stm32_romem_priv {
|
||||
void __iomem *base;
|
||||
struct nvmem_config cfg;
|
||||
u8 lower;
|
||||
struct tee_context *ctx;
|
||||
};
|
||||
|
||||
static int stm32_romem_read(void *context, unsigned int offset, void *buf,
|
||||
@ -138,12 +143,29 @@ static int stm32_bsec_write(void *context, unsigned int offset, void *buf,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int stm32_bsec_pta_read(void *context, unsigned int offset, void *buf,
|
||||
size_t bytes)
|
||||
{
|
||||
struct stm32_romem_priv *priv = context;
|
||||
|
||||
return stm32_bsec_optee_ta_read(priv->ctx, offset, buf, bytes);
|
||||
}
|
||||
|
||||
static int stm32_bsec_pta_write(void *context, unsigned int offset, void *buf,
|
||||
size_t bytes)
|
||||
{
|
||||
struct stm32_romem_priv *priv = context;
|
||||
|
||||
return stm32_bsec_optee_ta_write(priv->ctx, priv->lower, offset, buf, bytes);
|
||||
}
|
||||
|
||||
static int stm32_romem_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct stm32_romem_cfg *cfg;
|
||||
struct device *dev = &pdev->dev;
|
||||
struct stm32_romem_priv *priv;
|
||||
struct resource *res;
|
||||
int rc;
|
||||
|
||||
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
@ -173,15 +195,31 @@ static int stm32_romem_probe(struct platform_device *pdev)
|
||||
} else {
|
||||
priv->cfg.size = cfg->size;
|
||||
priv->lower = cfg->lower;
|
||||
priv->cfg.reg_read = stm32_bsec_read;
|
||||
priv->cfg.reg_write = stm32_bsec_write;
|
||||
if (cfg->ta) {
|
||||
rc = stm32_bsec_optee_ta_open(&priv->ctx);
|
||||
/* wait for OP-TEE client driver to be up and ready */
|
||||
if (rc)
|
||||
return rc;
|
||||
}
|
||||
if (priv->ctx) {
|
||||
rc = devm_add_action_or_reset(dev, stm32_bsec_optee_ta_close, priv->ctx);
|
||||
if (rc) {
|
||||
dev_err(dev, "devm_add_action_or_reset() failed (%d)\n", rc);
|
||||
return rc;
|
||||
}
|
||||
priv->cfg.reg_read = stm32_bsec_pta_read;
|
||||
priv->cfg.reg_write = stm32_bsec_pta_write;
|
||||
} else {
|
||||
priv->cfg.reg_read = stm32_bsec_read;
|
||||
priv->cfg.reg_write = stm32_bsec_write;
|
||||
}
|
||||
}
|
||||
|
||||
return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &priv->cfg));
|
||||
}
|
||||
|
||||
/*
|
||||
* STM32MP15 BSEC OTP regions: 4096 OTP bits (with 3072 effective bits)
|
||||
* STM32MP15/13 BSEC OTP regions: 4096 OTP bits (with 3072 effective bits)
|
||||
* => 96 x 32-bits data words
|
||||
* - Lower: 1K bits, 2:1 redundancy, incremental bit programming
|
||||
* => 32 (x 32-bits) lower shadow registers = words 0 to 31
|
||||
@ -191,6 +229,13 @@ static int stm32_romem_probe(struct platform_device *pdev)
|
||||
static const struct stm32_romem_cfg stm32mp15_bsec_cfg = {
|
||||
.size = 384,
|
||||
.lower = 32,
|
||||
.ta = false,
|
||||
};
|
||||
|
||||
static const struct stm32_romem_cfg stm32mp13_bsec_cfg = {
|
||||
.size = 384,
|
||||
.lower = 32,
|
||||
.ta = true,
|
||||
};
|
||||
|
||||
static const struct of_device_id stm32_romem_of_match[] = {
|
||||
@ -198,7 +243,10 @@ static const struct of_device_id stm32_romem_of_match[] = {
|
||||
.compatible = "st,stm32mp15-bsec",
|
||||
.data = (void *)&stm32mp15_bsec_cfg,
|
||||
}, {
|
||||
.compatible = "st,stm32mp13-bsec",
|
||||
.data = (void *)&stm32mp13_bsec_cfg,
|
||||
},
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, stm32_romem_of_match);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user