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m68k/m68knommu: merge MMU and non-MMU atomic.h
The only difference between the MMU and non-MMU versions of atomic.h is some extra support needed by ColdFire family processors. So merge this into the MMU version of atomic.h. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
This commit is contained in:
Greg Ungerer
Geert Uytterhoeven
parent
138ff3462f
commit
69f99746a2
@ -1,7 +1,211 @@
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#ifdef __uClinux__
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#include "atomic_no.h"
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#ifndef __ARCH_M68K_ATOMIC__
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#define __ARCH_M68K_ATOMIC__
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#include <linux/types.h>
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#include <asm/system.h>
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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/*
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* We do not have SMP m68k systems, so we don't have to deal with that.
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*/
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) (*(volatile int *)&(v)->counter)
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#define atomic_set(v, i) (((v)->counter) = i)
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/*
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* The ColdFire parts cannot do some immediate to memory operations,
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* so for them we do not specify the "i" asm constraint.
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*/
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#ifdef CONFIG_COLDFIRE
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#define ASM_DI "d"
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#else
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#include "atomic_mm.h"
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#define ASM_DI "di"
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#endif
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static inline void atomic_add(int i, atomic_t *v)
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{
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__asm__ __volatile__("addl %1,%0" : "+m" (*v) : ASM_DI (i));
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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__asm__ __volatile__("subl %1,%0" : "+m" (*v) : ASM_DI (i));
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}
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static inline void atomic_inc(atomic_t *v)
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{
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__asm__ __volatile__("addql #1,%0" : "+m" (*v));
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}
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static inline void atomic_dec(atomic_t *v)
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{
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__asm__ __volatile__("subql #1,%0" : "+m" (*v));
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}
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static inline int atomic_dec_and_test(atomic_t *v)
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{
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char c;
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__asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
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return c != 0;
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}
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static inline int atomic_inc_and_test(atomic_t *v)
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{
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char c;
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__asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
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return c != 0;
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}
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#ifdef CONFIG_RMW_INSNS
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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int t, tmp;
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__asm__ __volatile__(
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"1: movel %2,%1\n"
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" addl %3,%1\n"
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" casl %2,%1,%0\n"
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" jne 1b"
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: "+m" (*v), "=&d" (t), "=&d" (tmp)
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: "g" (i), "2" (atomic_read(v)));
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return t;
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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int t, tmp;
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__asm__ __volatile__(
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"1: movel %2,%1\n"
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" subl %3,%1\n"
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" casl %2,%1,%0\n"
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" jne 1b"
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: "+m" (*v), "=&d" (t), "=&d" (tmp)
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: "g" (i), "2" (atomic_read(v)));
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return t;
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}
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#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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#else /* !CONFIG_RMW_INSNS */
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static inline int atomic_add_return(int i, atomic_t * v)
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{
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unsigned long flags;
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int t;
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local_irq_save(flags);
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t = atomic_read(v);
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t += i;
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atomic_set(v, t);
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local_irq_restore(flags);
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return t;
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}
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static inline int atomic_sub_return(int i, atomic_t * v)
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{
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unsigned long flags;
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int t;
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local_irq_save(flags);
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t = atomic_read(v);
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t -= i;
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atomic_set(v, t);
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local_irq_restore(flags);
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return t;
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}
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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unsigned long flags;
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int prev;
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local_irq_save(flags);
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prev = atomic_read(v);
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if (prev == old)
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atomic_set(v, new);
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local_irq_restore(flags);
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return prev;
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}
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static inline int atomic_xchg(atomic_t *v, int new)
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{
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unsigned long flags;
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int prev;
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local_irq_save(flags);
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prev = atomic_read(v);
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atomic_set(v, new);
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local_irq_restore(flags);
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return prev;
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}
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#endif /* !CONFIG_RMW_INSNS */
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#define atomic_dec_return(v) atomic_sub_return(1, (v))
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#define atomic_inc_return(v) atomic_add_return(1, (v))
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static inline int atomic_sub_and_test(int i, atomic_t *v)
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{
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char c;
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__asm__ __volatile__("subl %2,%1; seq %0"
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: "=d" (c), "+m" (*v)
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: ASM_DI (i));
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return c != 0;
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}
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static inline int atomic_add_negative(int i, atomic_t *v)
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{
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char c;
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__asm__ __volatile__("addl %2,%1; smi %0"
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: "=d" (c), "+m" (*v)
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: "id" (i));
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return c != 0;
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}
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static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
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{
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__asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
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}
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static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
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{
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__asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
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}
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static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c != (u);
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}
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#include <asm-generic/atomic-long.h>
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#include <asm-generic/atomic64.h>
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#endif /* __ARCH_M68K_ATOMIC __ */
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@ -1,200 +0,0 @@
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#ifndef __ARCH_M68K_ATOMIC__
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#define __ARCH_M68K_ATOMIC__
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#include <linux/types.h>
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#include <asm/system.h>
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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/*
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* We do not have SMP m68k systems, so we don't have to deal with that.
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*/
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) (*(volatile int *)&(v)->counter)
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#define atomic_set(v, i) (((v)->counter) = i)
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static inline void atomic_add(int i, atomic_t *v)
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{
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__asm__ __volatile__("addl %1,%0" : "+m" (*v) : "id" (i));
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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__asm__ __volatile__("subl %1,%0" : "+m" (*v) : "id" (i));
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}
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static inline void atomic_inc(atomic_t *v)
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{
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__asm__ __volatile__("addql #1,%0" : "+m" (*v));
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}
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static inline void atomic_dec(atomic_t *v)
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{
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__asm__ __volatile__("subql #1,%0" : "+m" (*v));
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}
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static inline int atomic_dec_and_test(atomic_t *v)
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{
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char c;
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__asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
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return c != 0;
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}
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static inline int atomic_inc_and_test(atomic_t *v)
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{
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char c;
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__asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
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return c != 0;
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}
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#ifdef CONFIG_RMW_INSNS
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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int t, tmp;
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__asm__ __volatile__(
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"1: movel %2,%1\n"
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" addl %3,%1\n"
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" casl %2,%1,%0\n"
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" jne 1b"
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: "+m" (*v), "=&d" (t), "=&d" (tmp)
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: "g" (i), "2" (atomic_read(v)));
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return t;
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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int t, tmp;
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__asm__ __volatile__(
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"1: movel %2,%1\n"
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" subl %3,%1\n"
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" casl %2,%1,%0\n"
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" jne 1b"
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: "+m" (*v), "=&d" (t), "=&d" (tmp)
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: "g" (i), "2" (atomic_read(v)));
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return t;
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}
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#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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#else /* !CONFIG_RMW_INSNS */
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static inline int atomic_add_return(int i, atomic_t * v)
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{
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unsigned long flags;
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int t;
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local_irq_save(flags);
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t = atomic_read(v);
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t += i;
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atomic_set(v, t);
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local_irq_restore(flags);
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return t;
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}
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static inline int atomic_sub_return(int i, atomic_t * v)
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{
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unsigned long flags;
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int t;
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local_irq_save(flags);
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t = atomic_read(v);
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t -= i;
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atomic_set(v, t);
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local_irq_restore(flags);
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return t;
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}
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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unsigned long flags;
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int prev;
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local_irq_save(flags);
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prev = atomic_read(v);
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if (prev == old)
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atomic_set(v, new);
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local_irq_restore(flags);
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return prev;
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}
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static inline int atomic_xchg(atomic_t *v, int new)
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{
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unsigned long flags;
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int prev;
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local_irq_save(flags);
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prev = atomic_read(v);
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atomic_set(v, new);
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local_irq_restore(flags);
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return prev;
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}
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#endif /* !CONFIG_RMW_INSNS */
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#define atomic_dec_return(v) atomic_sub_return(1, (v))
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#define atomic_inc_return(v) atomic_add_return(1, (v))
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static inline int atomic_sub_and_test(int i, atomic_t *v)
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{
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char c;
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__asm__ __volatile__("subl %2,%1; seq %0"
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: "=d" (c), "+m" (*v)
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: "id" (i));
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return c != 0;
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}
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static inline int atomic_add_negative(int i, atomic_t *v)
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{
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char c;
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__asm__ __volatile__("addl %2,%1; smi %0"
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: "=d" (c), "+m" (*v)
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: "id" (i));
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return c != 0;
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}
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static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
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{
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__asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
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}
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static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
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{
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__asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
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}
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static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c != (u);
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}
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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/* Atomic operations are already serializing */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#include <asm-generic/atomic-long.h>
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#endif /* __ARCH_M68K_ATOMIC __ */
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@ -1,155 +0,0 @@
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#ifndef __ARCH_M68KNOMMU_ATOMIC__
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#define __ARCH_M68KNOMMU_ATOMIC__
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#include <linux/types.h>
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#include <asm/system.h>
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|
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
|
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|
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/*
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* We do not have SMP m68k systems, so we don't have to deal with that.
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*/
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#define ATOMIC_INIT(i) { (i) }
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#define atomic_read(v) (*(volatile int *)&(v)->counter)
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#define atomic_set(v, i) (((v)->counter) = i)
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static __inline__ void atomic_add(int i, atomic_t *v)
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{
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__("addl %1,%0" : "+m" (*v) : "d" (i));
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#else
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__asm__ __volatile__("addl %1,%0" : "+m" (*v) : "di" (i));
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#endif
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}
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static __inline__ void atomic_sub(int i, atomic_t *v)
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{
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__("subl %1,%0" : "+m" (*v) : "d" (i));
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#else
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__asm__ __volatile__("subl %1,%0" : "+m" (*v) : "di" (i));
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#endif
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}
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static __inline__ int atomic_sub_and_test(int i, atomic_t * v)
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{
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char c;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__("subl %2,%1; seq %0"
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: "=d" (c), "+m" (*v)
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: "d" (i));
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#else
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__asm__ __volatile__("subl %2,%1; seq %0"
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: "=d" (c), "+m" (*v)
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: "di" (i));
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#endif
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return c != 0;
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}
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static __inline__ void atomic_inc(volatile atomic_t *v)
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{
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__asm__ __volatile__("addql #1,%0" : "+m" (*v));
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}
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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static __inline__ int atomic_inc_and_test(volatile atomic_t *v)
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{
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char c;
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__asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
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return c != 0;
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}
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static __inline__ void atomic_dec(volatile atomic_t *v)
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{
|
||||
__asm__ __volatile__("subql #1,%0" : "+m" (*v));
|
||||
}
|
||||
|
||||
static __inline__ int atomic_dec_and_test(volatile atomic_t *v)
|
||||
{
|
||||
char c;
|
||||
__asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
|
||||
return c != 0;
|
||||
}
|
||||
|
||||
static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v)
|
||||
{
|
||||
__asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
|
||||
}
|
||||
|
||||
static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v)
|
||||
{
|
||||
__asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
|
||||
}
|
||||
|
||||
/* Atomic operations are already serializing */
|
||||
#define smp_mb__before_atomic_dec() barrier()
|
||||
#define smp_mb__after_atomic_dec() barrier()
|
||||
#define smp_mb__before_atomic_inc() barrier()
|
||||
#define smp_mb__after_atomic_inc() barrier()
|
||||
|
||||
static inline int atomic_add_return(int i, atomic_t * v)
|
||||
{
|
||||
unsigned long temp, flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
temp = *(long *)v;
|
||||
temp += i;
|
||||
*(long *)v = temp;
|
||||
local_irq_restore(flags);
|
||||
|
||||
return temp;
|
||||
}
|
||||
|
||||
#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
|
||||
|
||||
static inline int atomic_sub_return(int i, atomic_t * v)
|
||||
{
|
||||
unsigned long temp, flags;
|
||||
|
||||
local_irq_save(flags);
|
||||
temp = *(long *)v;
|
||||
temp -= i;
|
||||
*(long *)v = temp;
|
||||
local_irq_restore(flags);
|
||||
|
||||
return temp;
|
||||
}
|
||||
|
||||
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
|
||||
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
|
||||
|
||||
static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
|
||||
{
|
||||
int c, old;
|
||||
c = atomic_read(v);
|
||||
for (;;) {
|
||||
if (unlikely(c == (u)))
|
||||
break;
|
||||
old = atomic_cmpxchg((v), c, c + (a));
|
||||
if (likely(old == c))
|
||||
break;
|
||||
c = old;
|
||||
}
|
||||
return c != (u);
|
||||
}
|
||||
|
||||
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
|
||||
|
||||
#define atomic_dec_return(v) atomic_sub_return(1,(v))
|
||||
#define atomic_inc_return(v) atomic_add_return(1,(v))
|
||||
|
||||
#include <asm-generic/atomic-long.h>
|
||||
#endif /* __ARCH_M68KNOMMU_ATOMIC __ */
|
||||
Loading…
Reference in New Issue
Block a user