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mmc: sdhci-esdhc-imx: separate transfer mode from command write for usdhc
The combining of SDHCI_TRANSFER_MODE and SDHCI_COMMAND writes is only required for esdhc, but not necessarily for usdhc. Different from esdhc where the bits for transfer mode and command are all in the same register CMD_XFR_TYP, usdhc has a newly introduced register MIX_CTRL to hold transfer mode bits. So it makes more sense to separate transfer mode from command write for usdhc. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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@ -239,10 +239,6 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
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switch (reg) {
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switch (reg) {
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case SDHCI_TRANSFER_MODE:
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case SDHCI_TRANSFER_MODE:
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/*
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* Postpone this write, we must do it together with a
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* command write that is down below.
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*/
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if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
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if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)
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&& (host->cmd->opcode == SD_IO_RW_EXTENDED)
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&& (host->cmd->opcode == SD_IO_RW_EXTENDED)
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&& (host->cmd->data->blocks > 1)
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&& (host->cmd->data->blocks > 1)
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@ -252,7 +248,18 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
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v |= ESDHC_VENDOR_SPEC_SDIO_QUIRK;
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v |= ESDHC_VENDOR_SPEC_SDIO_QUIRK;
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writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
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writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
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}
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}
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imx_data->scratchpad = val;
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if (is_imx6q_usdhc(imx_data)) {
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u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
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m = val | (m & 0xffff0000);
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writel(m, host->ioaddr + ESDHC_MIX_CTRL);
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} else {
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/*
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* Postpone this write, we must do it together with a
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* command write that is down below.
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*/
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imx_data->scratchpad = val;
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}
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return;
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return;
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case SDHCI_COMMAND:
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case SDHCI_COMMAND:
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if ((host->cmd->opcode == MMC_STOP_TRANSMISSION ||
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if ((host->cmd->opcode == MMC_STOP_TRANSMISSION ||
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@ -260,16 +267,12 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
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(imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
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(imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))
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val |= SDHCI_CMD_ABORTCMD;
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val |= SDHCI_CMD_ABORTCMD;
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if (is_imx6q_usdhc(imx_data)) {
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if (is_imx6q_usdhc(imx_data))
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u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
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m = imx_data->scratchpad | (m & 0xffff0000);
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writel(m, host->ioaddr + ESDHC_MIX_CTRL);
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writel(val << 16,
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writel(val << 16,
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host->ioaddr + SDHCI_TRANSFER_MODE);
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host->ioaddr + SDHCI_TRANSFER_MODE);
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} else {
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else
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writel(val << 16 | imx_data->scratchpad,
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writel(val << 16 | imx_data->scratchpad,
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host->ioaddr + SDHCI_TRANSFER_MODE);
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host->ioaddr + SDHCI_TRANSFER_MODE);
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}
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return;
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return;
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case SDHCI_BLOCK_SIZE:
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case SDHCI_BLOCK_SIZE:
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val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
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val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
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