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drm/amd/powerplay: delete dead code in powerplay
delete functiontable related codes Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
cf2623d951
commit
698f88e697
@ -2,7 +2,7 @@
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# Makefile for the 'hw manager' sub-component of powerplay.
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# It provides the hardware management services for the driver.
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HARDWARE_MGR = hwmgr.o processpptables.o functiontables.o \
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HARDWARE_MGR = hwmgr.o processpptables.o \
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hardwaremanager.o pp_acpi.o cz_hwmgr.o \
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cz_clockpowergating.o pppcielanes.o\
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process_pptables_v1_0.o ppatomctrl.o ppatomfwctrl.o \
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@ -1142,8 +1142,7 @@ static int cz_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
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return -ENOMEM;
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hwmgr->backend = data;
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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result = cz_initialize_dpm_defaults(hwmgr);
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if (result != 0) {
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pr_err("cz_initialize_dpm_defaults failed\n");
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@ -1,161 +0,0 @@
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/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include "hwmgr.h"
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static int phm_run_table(struct pp_hwmgr *hwmgr,
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struct phm_runtime_table_header *rt_table,
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void *input,
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void *output,
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void *temp_storage)
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{
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int result = 0;
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phm_table_function *function;
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if (rt_table->function_list == NULL) {
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pr_debug("this function not implement!\n");
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return 0;
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}
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for (function = rt_table->function_list; NULL != *function; function++) {
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int tmp = (*function)(hwmgr, input, output, temp_storage, result);
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if (tmp == PP_Result_TableImmediateExit)
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break;
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if (tmp) {
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if (0 == result)
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result = tmp;
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if (rt_table->exit_error)
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break;
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}
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}
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return result;
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}
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int phm_dispatch_table(struct pp_hwmgr *hwmgr,
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struct phm_runtime_table_header *rt_table,
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void *input, void *output)
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{
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int result;
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void *temp_storage;
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if (hwmgr == NULL || rt_table == NULL) {
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pr_err("Invalid Parameter!\n");
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return -EINVAL;
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}
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if (0 != rt_table->storage_size) {
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temp_storage = kzalloc(rt_table->storage_size, GFP_KERNEL);
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if (temp_storage == NULL) {
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pr_err("Could not allocate table temporary storage\n");
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return -ENOMEM;
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}
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} else {
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temp_storage = NULL;
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}
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result = phm_run_table(hwmgr, rt_table, input, output, temp_storage);
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kfree(temp_storage);
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return result;
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}
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int phm_construct_table(struct pp_hwmgr *hwmgr,
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const struct phm_master_table_header *master_table,
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struct phm_runtime_table_header *rt_table)
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{
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uint32_t function_count = 0;
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const struct phm_master_table_item *table_item;
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uint32_t size;
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phm_table_function *run_time_list;
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phm_table_function *rtf;
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if (hwmgr == NULL || master_table == NULL || rt_table == NULL) {
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pr_err("Invalid Parameter!\n");
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return -EINVAL;
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}
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for (table_item = master_table->master_list;
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NULL != table_item->tableFunction; table_item++) {
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if ((NULL == table_item->isFunctionNeededInRuntimeTable) ||
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(table_item->isFunctionNeededInRuntimeTable(hwmgr)))
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function_count++;
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}
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size = (function_count + 1) * sizeof(phm_table_function);
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run_time_list = kzalloc(size, GFP_KERNEL);
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if (NULL == run_time_list)
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return -ENOMEM;
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rtf = run_time_list;
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for (table_item = master_table->master_list;
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NULL != table_item->tableFunction; table_item++) {
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if ((rtf - run_time_list) > function_count) {
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pr_err("Check function results have changed\n");
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kfree(run_time_list);
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return -EINVAL;
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}
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if ((NULL == table_item->isFunctionNeededInRuntimeTable) ||
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(table_item->isFunctionNeededInRuntimeTable(hwmgr))) {
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*(rtf++) = table_item->tableFunction;
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}
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}
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if ((rtf - run_time_list) > function_count) {
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pr_err("Check function results have changed\n");
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kfree(run_time_list);
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return -EINVAL;
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}
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*rtf = NULL;
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rt_table->function_list = run_time_list;
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rt_table->exit_error = (0 != (master_table->flags & PHM_MasterTableFlag_ExitOnError));
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rt_table->storage_size = master_table->storage_size;
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return 0;
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}
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int phm_destroy_table(struct pp_hwmgr *hwmgr,
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struct phm_runtime_table_header *rt_table)
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{
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if (hwmgr == NULL || rt_table == NULL) {
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pr_err("Invalid Parameter\n");
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return -EINVAL;
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}
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if (NULL == rt_table->function_list)
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return 0;
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kfree(rt_table->function_list);
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rt_table->function_list = NULL;
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rt_table->storage_size = 0;
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rt_table->exit_error = false;
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return 0;
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}
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@ -36,29 +36,12 @@
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return -EINVAL; \
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} while (0)
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bool phm_is_hw_access_blocked(struct pp_hwmgr *hwmgr)
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{
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return hwmgr->block_hw_access;
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}
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int phm_block_hw_access(struct pp_hwmgr *hwmgr, bool block)
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{
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hwmgr->block_hw_access = block;
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return 0;
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}
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int phm_setup_asic(struct pp_hwmgr *hwmgr)
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{
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PHM_FUNC_CHECK(hwmgr);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface)) {
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if (NULL != hwmgr->hwmgr_func->asic_setup)
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return hwmgr->hwmgr_func->asic_setup(hwmgr);
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} else {
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return phm_dispatch_table(hwmgr, &(hwmgr->setup_asic),
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NULL, NULL);
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}
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if (NULL != hwmgr->hwmgr_func->asic_setup)
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return hwmgr->hwmgr_func->asic_setup(hwmgr);
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return 0;
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}
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@ -67,14 +50,8 @@ int phm_power_down_asic(struct pp_hwmgr *hwmgr)
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{
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PHM_FUNC_CHECK(hwmgr);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface)) {
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if (NULL != hwmgr->hwmgr_func->power_off_asic)
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return hwmgr->hwmgr_func->power_off_asic(hwmgr);
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} else {
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return phm_dispatch_table(hwmgr, &(hwmgr->power_down_asic),
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NULL, NULL);
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}
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if (NULL != hwmgr->hwmgr_func->power_off_asic)
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return hwmgr->hwmgr_func->power_off_asic(hwmgr);
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return 0;
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}
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@ -90,13 +67,8 @@ int phm_set_power_state(struct pp_hwmgr *hwmgr,
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states.pcurrent_state = pcurrent_state;
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states.pnew_state = pnew_power_state;
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface)) {
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if (NULL != hwmgr->hwmgr_func->power_state_set)
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return hwmgr->hwmgr_func->power_state_set(hwmgr, &states);
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} else {
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return phm_dispatch_table(hwmgr, &(hwmgr->set_power_state), &states, NULL);
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}
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if (NULL != hwmgr->hwmgr_func->power_state_set)
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return hwmgr->hwmgr_func->power_state_set(hwmgr, &states);
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return 0;
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}
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@ -107,15 +79,8 @@ int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr)
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bool enabled;
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PHM_FUNC_CHECK(hwmgr);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface)) {
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if (NULL != hwmgr->hwmgr_func->dynamic_state_management_enable)
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ret = hwmgr->hwmgr_func->dynamic_state_management_enable(hwmgr);
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} else {
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ret = phm_dispatch_table(hwmgr,
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&(hwmgr->enable_dynamic_state_management),
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NULL, NULL);
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}
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if (NULL != hwmgr->hwmgr_func->dynamic_state_management_enable)
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ret = hwmgr->hwmgr_func->dynamic_state_management_enable(hwmgr);
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enabled = ret == 0;
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@ -131,15 +96,8 @@ int phm_disable_dynamic_state_management(struct pp_hwmgr *hwmgr)
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PHM_FUNC_CHECK(hwmgr);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface)) {
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if (hwmgr->hwmgr_func->dynamic_state_management_disable)
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ret = hwmgr->hwmgr_func->dynamic_state_management_disable(hwmgr);
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} else {
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ret = phm_dispatch_table(hwmgr,
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&(hwmgr->disable_dynamic_state_management),
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NULL, NULL);
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}
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if (hwmgr->hwmgr_func->dynamic_state_management_disable)
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ret = hwmgr->hwmgr_func->dynamic_state_management_disable(hwmgr);
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enabled = ret == 0 ? false : true;
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@ -219,13 +177,9 @@ int phm_enable_clock_power_gatings(struct pp_hwmgr *hwmgr)
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{
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PHM_FUNC_CHECK(hwmgr);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface)) {
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if (NULL != hwmgr->hwmgr_func->enable_clock_power_gating)
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return hwmgr->hwmgr_func->enable_clock_power_gating(hwmgr);
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} else {
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return phm_dispatch_table(hwmgr, &(hwmgr->enable_clock_power_gatings), NULL, NULL);
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}
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if (NULL != hwmgr->hwmgr_func->enable_clock_power_gating)
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return hwmgr->hwmgr_func->enable_clock_power_gating(hwmgr);
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return 0;
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}
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@ -233,11 +187,9 @@ int phm_disable_clock_power_gatings(struct pp_hwmgr *hwmgr)
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{
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PHM_FUNC_CHECK(hwmgr);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface)) {
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if (NULL != hwmgr->hwmgr_func->disable_clock_power_gating)
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return hwmgr->hwmgr_func->disable_clock_power_gating(hwmgr);
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}
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if (NULL != hwmgr->hwmgr_func->disable_clock_power_gating)
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return hwmgr->hwmgr_func->disable_clock_power_gating(hwmgr);
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return 0;
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}
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@ -246,12 +198,9 @@ int phm_display_configuration_changed(struct pp_hwmgr *hwmgr)
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{
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PHM_FUNC_CHECK(hwmgr);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface)) {
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if (NULL != hwmgr->hwmgr_func->display_config_changed)
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hwmgr->hwmgr_func->display_config_changed(hwmgr);
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} else
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return phm_dispatch_table(hwmgr, &hwmgr->display_configuration_changed, NULL, NULL);
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if (NULL != hwmgr->hwmgr_func->display_config_changed)
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hwmgr->hwmgr_func->display_config_changed(hwmgr);
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return 0;
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}
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@ -259,9 +208,7 @@ int phm_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr)
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{
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PHM_FUNC_CHECK(hwmgr);
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if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface))
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if (NULL != hwmgr->hwmgr_func->notify_smc_display_config_after_ps_adjustment)
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if (NULL != hwmgr->hwmgr_func->notify_smc_display_config_after_ps_adjustment)
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hwmgr->hwmgr_func->notify_smc_display_config_after_ps_adjustment(hwmgr);
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return 0;
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@ -852,10 +852,6 @@ int polaris_set_asic_special_caps(struct pp_hwmgr *hwmgr)
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_AutomaticDCTransition);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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if (hwmgr->chip_id != CHIP_POLARIS10)
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_SPLLShutdownSupport);
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@ -882,9 +878,6 @@ int fiji_set_asic_special_caps(struct pp_hwmgr *hwmgr)
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TCPRamping);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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return 0;
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}
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@ -904,9 +897,6 @@ int tonga_set_asic_special_caps(struct pp_hwmgr *hwmgr)
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_VCEPowerGating);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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return 0;
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}
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@ -920,8 +910,6 @@ int topaz_set_asic_special_caps(struct pp_hwmgr *hwmgr)
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PHM_PlatformCaps_TDRamping);
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TCPRamping);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_EVV);
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return 0;
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@ -435,9 +435,6 @@ static int rv_hwmgr_backend_init(struct pp_hwmgr *hwmgr)
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hwmgr->backend = data;
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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result = rv_initialize_dpm_defaults(hwmgr);
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if (result != 0) {
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pr_err("rv_initialize_dpm_defaults failed\n");
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@ -3854,9 +3854,6 @@ static int smu7_set_max_fan_pwm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_f
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hwmgr->thermal_controller.
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advanceFanControlParameters.usMaxFanPWM = us_max_fan_pwm;
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if (phm_is_hw_access_blocked(hwmgr))
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return 0;
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return smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
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PPSMC_MSG_SetFanPwmMax, us_max_fan_pwm);
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}
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@ -3959,9 +3956,6 @@ static int smu7_set_max_fan_rpm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_f
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hwmgr->thermal_controller.
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advanceFanControlParameters.usMaxFanRPM = us_max_fan_rpm;
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if (phm_is_hw_access_blocked(hwmgr))
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return 0;
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return smum_send_msg_to_smc_with_parameter(hwmgr->smumgr,
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PPSMC_MSG_SetFanRpmMax, us_max_fan_rpm);
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}
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@ -200,9 +200,6 @@ static int vega10_set_features_platform_caps(struct pp_hwmgr *hwmgr)
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phm_cap_unset(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_ControlVDDCI);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_TablelessHardwareInterface);
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phm_cap_set(hwmgr->platform_descriptor.platformCaps,
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PHM_PlatformCaps_EnableSMU7ThermalManagement);
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||||
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||||
|
@ -109,10 +109,6 @@ enum PHM_BackEnd_Magic {
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#define PHM_PCIE_POWERGATING_TARGET_PLLCASCADE 2
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||||
#define PHM_PCIE_POWERGATING_TARGET_PHY 3
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||||
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typedef int (*phm_table_function)(struct pp_hwmgr *hwmgr, void *input,
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||||
void *output, void *storage, int result);
|
||||
|
||||
typedef bool (*phm_check_function)(struct pp_hwmgr *hwmgr);
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||||
|
||||
struct phm_set_power_state_input {
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||||
const struct pp_hw_power_state *pcurrent_state;
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||||
@ -149,30 +145,6 @@ struct phm_gfx_arbiter {
|
||||
uint32_t fclk;
|
||||
};
|
||||
|
||||
/* Entries in the master tables */
|
||||
struct phm_master_table_item {
|
||||
phm_check_function isFunctionNeededInRuntimeTable;
|
||||
phm_table_function tableFunction;
|
||||
};
|
||||
|
||||
enum phm_master_table_flag {
|
||||
PHM_MasterTableFlag_None = 0,
|
||||
PHM_MasterTableFlag_ExitOnError = 1,
|
||||
};
|
||||
|
||||
/* The header of the master tables */
|
||||
struct phm_master_table_header {
|
||||
uint32_t storage_size;
|
||||
uint32_t flags;
|
||||
const struct phm_master_table_item *master_list;
|
||||
};
|
||||
|
||||
struct phm_runtime_table_header {
|
||||
uint32_t storage_size;
|
||||
bool exit_error;
|
||||
phm_table_function *function_list;
|
||||
};
|
||||
|
||||
struct phm_clock_array {
|
||||
uint32_t count;
|
||||
uint32_t values[1];
|
||||
@ -216,19 +188,6 @@ struct phm_phase_shedding_limits_record {
|
||||
uint32_t Mclk;
|
||||
};
|
||||
|
||||
|
||||
extern int phm_dispatch_table(struct pp_hwmgr *hwmgr,
|
||||
struct phm_runtime_table_header *rt_table,
|
||||
void *input, void *output);
|
||||
|
||||
extern int phm_construct_table(struct pp_hwmgr *hwmgr,
|
||||
const struct phm_master_table_header *master_table,
|
||||
struct phm_runtime_table_header *rt_table);
|
||||
|
||||
extern int phm_destroy_table(struct pp_hwmgr *hwmgr,
|
||||
struct phm_runtime_table_header *rt_table);
|
||||
|
||||
|
||||
struct phm_uvd_clock_voltage_dependency_record {
|
||||
uint32_t vclk;
|
||||
uint32_t dclk;
|
||||
@ -749,7 +708,6 @@ struct pp_hwmgr {
|
||||
enum amd_dpm_forced_level dpm_level;
|
||||
enum amd_dpm_forced_level saved_dpm_level;
|
||||
enum amd_dpm_forced_level request_dpm_level;
|
||||
bool block_hw_access;
|
||||
struct phm_gfx_arbiter gfx_arbiter;
|
||||
struct phm_acp_arbiter acp_arbiter;
|
||||
struct phm_uvd_arbiter uvd_arbiter;
|
||||
@ -760,13 +718,6 @@ struct pp_hwmgr {
|
||||
void *backend;
|
||||
enum PP_DAL_POWERLEVEL dal_power_level;
|
||||
struct phm_dynamic_state_info dyn_state;
|
||||
struct phm_runtime_table_header setup_asic;
|
||||
struct phm_runtime_table_header power_down_asic;
|
||||
struct phm_runtime_table_header disable_dynamic_state_management;
|
||||
struct phm_runtime_table_header enable_dynamic_state_management;
|
||||
struct phm_runtime_table_header set_power_state;
|
||||
struct phm_runtime_table_header enable_clock_power_gatings;
|
||||
struct phm_runtime_table_header display_configuration_changed;
|
||||
const struct pp_hwmgr_func *hwmgr_func;
|
||||
const struct pp_table_func *pptable_func;
|
||||
struct pp_power_state *ps;
|
||||
|
Loading…
Reference in New Issue
Block a user