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Device tree changes for omaps. Mostly to add support for new
am437x-idk and update am437x-sk boards. Also enabling new devices for multiple boards. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUuZwkAAoJEBvUPslcq6VzHkMP/1Q1jQxiwUTpXLDxLZRjIGrh g6b3sHoGJT9U0zcRydH6dv/BlYelmu2xUZ0s1Gvz1xjwA00jwPqccgeybul3z+pZ bc3CUpRBIOJNR0SD1BxBRs5HsBviEuHlysNOgsGyXyr1S6AtfrA9tkDB4XBw3ukz uBmudWhvgHKUzZQfoMJxi2R4aNYUUp5Ibew4m9Hl8I3ftwn1eYQqrSy+zQhq1uXl QWw2kixgCDcP/yRPIcKXKz5pbbxiBL2WqVnNxKOuUjOhikV8+79QOpwjQibxKNou ID9CWvE9+qGmylhrEforrnVgr73KYcSXsjgLTtzb/3ZV2/OP2rY7oeemOvto9AI5 N/FRjTeJWk5vdiavu44rT+SwIZE/Uf32rCpQWLdvJRG9B24LtHp9oZohfqyjOF8/ 7IkbrwEE1sxwJXUTkCXKKjTTu1+CQ87426QZErLeLj0kP3DbO87GOoGXC5m8LudO CfnuWS9O6FkIga/JXorPvYJkw57SJWtWBgDcnBXnyWx7OVWzHTqAcZuHuQyAd1AP AdbB45MjgJIzi7tZ9jV4yGkxfCwst5ZuXUix8Lzy4YdfmctjFgNeqHULtkgSJZCq icOHYJakrdtX/miap/op8qov6B/AlUwZid7cd+Vh5jxDvJwSRG7ReEi/1AU3E/h8 9hAihXZ0Ukt2ED2dpRo9 =LFft -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.20/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Merge "omap device tree changes for v3.20" from Tony Lindgren: Device tree changes for omaps. Mostly to add support for new am437x-idk and update am437x-sk boards. Also enabling new devices for multiple boards. * tag 'omap-for-v3.20/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits) ARM: dts: omap3-gta04: Add handling for tv output ARM: dts: cm-t3x: add NAND support ARM: dts: am57xx-beagle-x15: Add GPIO controlled fan node ARM: dts: am437x-idk: add gpio-based power key ARM: dts: N950/N9: add twl_power ARM: dts: am437x-sk: add power button binding ARM: dts: add support for AM437x IDK ARM: dts: am437x-gp-evm: add VPFE device tree data ARM: dts: am437x-sk-evm: add VPFE device tree data ARM: dts: am43x-epos-evm: add VPFE device tree data ARM: dts: am4372: add VPFE DT node entries ARM: dts: DRA7X: drop id property in pcie_phy ARM: dts: omap3-n900: cleanup english ARM: dts: am57xx-beagle-x15: Add dual ethernet ARM: dts: am437x-sk: remove DSS pulls ARM: dts: am437x-sk: remove internal i2c pullups ARM: dts: am437x-sk: add explicit pinmux for both USB instances ARM: dts: am437x-sk: remove ethernet pulls ARM: dts: am437x-sk: add explicit MMC0 pinmux ARM: dts: am437x-sk: remove internal pulls from QSPI ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
6937dbffc7
@ -414,6 +414,7 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
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dtb-$(CONFIG_SOC_AM43XX) += \
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am43x-epos-evm.dtb \
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am437x-sk-evm.dtb \
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am437x-idk-evm.dtb \
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am437x-gp-evm.dtb
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dtb-$(CONFIG_SOC_OMAP5) += \
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omap5-cm-t54.dtb \
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@ -948,6 +948,22 @@
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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vpfe0: vpfe@48326000 {
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compatible = "ti,am437x-vpfe";
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reg = <0x48326000 0x2000>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "vpfe0";
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status = "disabled";
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};
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vpfe1: vpfe@48328000 {
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compatible = "ti,am437x-vpfe";
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reg = <0x48328000 0x2000>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "vpfe1";
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status = "disabled";
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};
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};
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};
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@ -268,6 +268,78 @@
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0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.d_can1_rx */
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>;
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};
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vpfe0_pins_default: vpfe0_pins_default {
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pinctrl-single,pins = <
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0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
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0x1B4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
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0x1C0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
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0x1C4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
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0x1C8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
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0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
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0x20C (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
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0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
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0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
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0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
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0x21C (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
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0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
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0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
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>;
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};
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vpfe0_pins_sleep: vpfe0_pins_sleep {
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pinctrl-single,pins = <
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0x1B0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_hd mode 0*/
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0x1B4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_vd mode 0*/
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0x1C0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_pclk mode 0*/
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0x1C4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data8 mode 0*/
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0x1C8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data9 mode 0*/
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0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data0 mode 0*/
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0x20C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data1 mode 0*/
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0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data2 mode 0*/
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0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data3 mode 0*/
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0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data4 mode 0*/
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0x21C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data5 mode 0*/
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0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data6 mode 0*/
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0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data7 mode 0*/
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>;
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};
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vpfe1_pins_default: vpfe1_pins_default {
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pinctrl-single,pins = <
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0x1CC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0*/
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0x1D0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0*/
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0x1D4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0*/
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0x1D8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0*/
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0x1DC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0*/
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0x1E8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0*/
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0x1EC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0*/
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0x1F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0*/
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0x1F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0*/
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0x1F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0*/
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0x1FC (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0*/
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0x200 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0*/
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0x204 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0*/
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>;
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};
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vpfe1_pins_sleep: vpfe1_pins_sleep {
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pinctrl-single,pins = <
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0x1CC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data9 mode 0*/
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0x1D0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data8 mode 0*/
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0x1D4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_hd mode 0*/
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0x1D8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_vd mode 0*/
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0x1DC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_pclk mode 0*/
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0x1E8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data0 mode 0*/
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0x1EC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data1 mode 0*/
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0x1F0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data2 mode 0*/
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0x1F4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data3 mode 0*/
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0x1F8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data4 mode 0*/
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0x1FC (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data5 mode 0*/
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0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data6 mode 0*/
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0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam1_data7 mode 0*/
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>;
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};
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};
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&i2c0 {
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@ -545,3 +617,37 @@
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pinctrl-0 = <&dcan1_default>;
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status = "okay";
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};
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&vpfe0 {
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status = "okay";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&vpfe0_pins_default>;
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pinctrl-1 = <&vpfe0_pins_sleep>;
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port {
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vpfe0_ep: endpoint {
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/* remote-endpoint = <&sensor>; add once we have it */
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ti,am437x-vpfe-interface = <0>;
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bus-width = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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};
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};
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};
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&vpfe1 {
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status = "okay";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&vpfe1_pins_default>;
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pinctrl-1 = <&vpfe1_pins_sleep>;
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port {
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vpfe1_ep: endpoint {
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/* remote-endpoint = <&sensor>; add once we have it */
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ti,am437x-vpfe-interface = <0>;
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bus-width = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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};
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};
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};
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405
arch/arm/boot/dts/am437x-idk-evm.dts
Normal file
405
arch/arm/boot/dts/am437x-idk-evm.dts
Normal file
@ -0,0 +1,405 @@
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/*
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* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am4372.dtsi"
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#include <dt-bindings/pinctrl/am43xx.h>
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#include <dt-bindings/pwm/pwm.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "TI AM437x Industrial Development Kit";
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compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
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v24_0d: fixed-regulator-v24_0d {
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compatible = "regulator-fixed";
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regulator-name = "V24_0D";
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regulator-min-microvolt = <24000000>;
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regulator-max-microvolt = <24000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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v3_3d: fixed-regulator-v3_3d {
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compatible = "regulator-fixed";
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regulator-name = "V3_3D";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&v24_0d>;
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};
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vdd_corereg: fixed-regulator-vdd_corereg {
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compatible = "regulator-fixed";
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regulator-name = "VDD_COREREG";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&v24_0d>;
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};
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vdd_core: fixed-regulator-vdd_core {
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compatible = "regulator-fixed";
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regulator-name = "VDD_CORE";
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&vdd_corereg>;
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};
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v1_8dreg: fixed-regulator-v1_8dreg{
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compatible = "regulator-fixed";
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regulator-name = "V1_8DREG";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&v24_0d>;
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};
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v1_8d: fixed-regulator-v1_8d{
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compatible = "regulator-fixed";
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regulator-name = "V1_8D";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&v1_8dreg>;
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};
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v1_5dreg: fixed-regulator-v1_5dreg{
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compatible = "regulator-fixed";
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regulator-name = "V1_5DREG";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&v24_0d>;
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};
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v1_5d: fixed-regulator-v1_5d{
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compatible = "regulator-fixed";
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regulator-name = "V1_5D";
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-always-on;
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regulator-boot-on;
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vin-supply = <&v1_5dreg>;
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};
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gpio_keys: gpio_keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&gpio_keys_pins_default>;
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#address-cells = <1>;
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#size-cells = <0>;
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switch@0 {
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label = "power-button";
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linux,code = <KEY_POWER>;
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gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&am43xx_pinmux {
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gpio_keys_pins_default: gpio_keys_pins_default {
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pinctrl-single,pins = <
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0x1b8 (PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */
|
||||
>;
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};
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i2c0_pins_default: i2c0_pins_default {
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||||
pinctrl-single,pins = <
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0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
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||||
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||||
i2c0_pins_sleep: i2c0_pins_sleep {
|
||||
pinctrl-single,pins = <
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||||
0x188 (PIN_INPUT_PULLDOWN | MUX_MODE7)
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0x18c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_default: i2c1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_sleep: i2c1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: pinmux_mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x1f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x1f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0x1f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0x1fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1f0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1f4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
ecap0_pins_default: backlight_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x164 (PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
|
||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
qspi_pins_default: qspi_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
||||
0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
||||
0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
||||
0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
||||
0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
||||
>;
|
||||
};
|
||||
|
||||
qspi_pins_sleep: qspi_pins_sleep{
|
||||
pinctrl-single,pins = <
|
||||
0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c0_pins_default>;
|
||||
pinctrl-1 = <&i2c0_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c256";
|
||||
pagesize = <64>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c1_pins_default>;
|
||||
pinctrl-1 = <&i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps62362@60 {
|
||||
compatible = "ti,tps62362";
|
||||
regulator-name = "VDD_MPU";
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1330000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
ti,vsel0-state-high;
|
||||
ti,vsel1-state-high;
|
||||
vin-supply = <&v3_3d>;
|
||||
};
|
||||
};
|
||||
|
||||
&epwmss0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ecap0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ecap0_pins_default>;
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
pinctrl-1 = <&mmc1_pins_sleep>;
|
||||
vmmc-supply = <&v3_3d>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&qspi {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&qspi_pins_default>;
|
||||
pinctrl-1 = <&qspi_pins_sleep>;
|
||||
|
||||
spi-max-frequency = <48000000>;
|
||||
m25p80@0 {
|
||||
compatible = "mx66l51235l";
|
||||
spi-max-frequency = <48000000>;
|
||||
reg = <0>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/*
|
||||
* MTD partition table. The ROM checks the first 512KiB for a
|
||||
* valid file to boot(XIP).
|
||||
*/
|
||||
partition@0 {
|
||||
label = "QSPI.U_BOOT";
|
||||
reg = <0x00000000 0x000080000>;
|
||||
};
|
||||
partition@1 {
|
||||
label = "QSPI.U_BOOT.backup";
|
||||
reg = <0x00080000 0x00080000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "QSPI.U-BOOT-SPL_OS";
|
||||
reg = <0x00100000 0x00010000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "QSPI.U_BOOT_ENV";
|
||||
reg = <0x00110000 0x00010000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "QSPI.U-BOOT-ENV.backup";
|
||||
reg = <0x00120000 0x00010000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "QSPI.KERNEL";
|
||||
reg = <0x00130000 0x0800000>;
|
||||
};
|
||||
partition@6 {
|
||||
label = "QSPI.FILESYSTEM";
|
||||
reg = <0x00930000 0x36D0000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wdt {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu {
|
||||
cpu0-supply = <&tps>;
|
||||
};
|
||||
@ -153,20 +153,26 @@
|
||||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
|
||||
>;
|
||||
};
|
||||
@ -184,35 +190,75 @@
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe0_pins_default: vpfe0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
|
||||
0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
|
||||
0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
|
||||
0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
|
||||
0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
|
||||
0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
|
||||
0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
|
||||
0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
|
||||
0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
|
||||
0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
|
||||
0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
|
||||
0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
|
||||
0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
|
||||
0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
|
||||
0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe0_pins_sleep: vpfe0_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
|
||||
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
|
||||
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
|
||||
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
|
||||
0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
|
||||
0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
|
||||
0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
|
||||
0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
|
||||
0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
|
||||
0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
|
||||
0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
|
||||
0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
|
||||
0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
|
||||
0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
|
||||
0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
|
||||
0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
|
||||
|
||||
/* Slave 2 */
|
||||
0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
|
||||
0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
|
||||
0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
|
||||
0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
|
||||
0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
|
||||
0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
|
||||
0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
|
||||
0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
|
||||
0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
|
||||
0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
|
||||
0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
|
||||
0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
|
||||
0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -251,8 +297,8 @@
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -266,46 +312,46 @@
|
||||
|
||||
dss_pins: dss_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
|
||||
0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
|
||||
0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
|
||||
0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
|
||||
0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
|
||||
0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
|
||||
0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
|
||||
0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
|
||||
0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
|
||||
0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
|
||||
0x024 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x028 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x02c (PIN_OUTPUT | MUX_MODE1)
|
||||
0x030 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x034 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x038 (PIN_OUTPUT | MUX_MODE1)
|
||||
0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
|
||||
0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
|
||||
0x0a4 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0a8 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0ac (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0b0 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0b4 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0b8 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0bc (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0c0 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0c4 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0c8 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0cc (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0d0 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0d8 (PIN_OUTPUT | MUX_MODE0)
|
||||
0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
|
||||
0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
|
||||
0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
|
||||
0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
|
||||
0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
|
||||
|
||||
>;
|
||||
};
|
||||
|
||||
qspi_pins: qspi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
||||
0x90 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
||||
0x94 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
||||
0x98 (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
||||
0x9c (PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
|
||||
0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
|
||||
0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
|
||||
0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
|
||||
0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
|
||||
>;
|
||||
};
|
||||
|
||||
@ -323,6 +369,18 @@
|
||||
0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: usb1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
||||
>;
|
||||
};
|
||||
|
||||
usb2_pins: usb2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
@ -386,6 +444,11 @@
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
power-button {
|
||||
compatible = "ti,tps65218-pwrbutton";
|
||||
status = "okay";
|
||||
interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
|
||||
};
|
||||
};
|
||||
|
||||
at24@50 {
|
||||
@ -479,6 +542,8 @@
|
||||
&usb1 {
|
||||
dr_mode = "peripheral";
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
@ -488,6 +553,8 @@
|
||||
&usb2 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb2_pins>;
|
||||
};
|
||||
|
||||
&qspi {
|
||||
@ -610,3 +677,25 @@
|
||||
&wdt {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu {
|
||||
cpu0-supply = <&dcdc2>;
|
||||
};
|
||||
|
||||
&vpfe0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&vpfe0_pins_default>;
|
||||
pinctrl-1 = <&vpfe0_pins_sleep>;
|
||||
|
||||
/* Camera port */
|
||||
port {
|
||||
vpfe0_ep: endpoint {
|
||||
/* remote-endpoint = <&sensor>; add once we have it */
|
||||
ti,am437x-vpfe-interface = <0>;
|
||||
bus-width = <8>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -243,6 +243,42 @@
|
||||
0x08C (PIN_OUTPUT_PULLUP | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe1_pins_default: vpfe1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x1cc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data9 mode 0 */
|
||||
0x1d0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data8 mode 0 */
|
||||
0x1d4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_hd mode 0 */
|
||||
0x1d8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_vd mode 0 */
|
||||
0x1dc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_pclk mode 0 */
|
||||
0x1e8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data0 mode 0 */
|
||||
0x1ec (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data1 mode 0 */
|
||||
0x1f0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data2 mode 0 */
|
||||
0x1f4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data3 mode 0 */
|
||||
0x1f8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data4 mode 0 */
|
||||
0x1fc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data5 mode 0 */
|
||||
0x200 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data6 mode 0 */
|
||||
0x204 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam1_data7 mode 0 */
|
||||
>;
|
||||
};
|
||||
|
||||
vpfe1_pins_sleep: vpfe1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x1cc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1d0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1d4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1d8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1dc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1e8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1ec (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1f0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1f4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1f8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x1fc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
@ -634,3 +670,20 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&vpfe1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&vpfe1_pins_default>;
|
||||
pinctrl-1 = <&vpfe1_pins_sleep>;
|
||||
|
||||
port {
|
||||
vpfe1_ep: endpoint {
|
||||
/* remote-endpoint = <&sensor>; add once we have it */
|
||||
ti,am437x-vpfe-interface = <0>;
|
||||
bus-width = <8>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -80,6 +80,14 @@
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
gpio_fan: gpio_fan {
|
||||
/* Based on 5v 500mA AFB02505HHB */
|
||||
compatible = "gpio-fan";
|
||||
gpios = <&tps659038_gpio 1 GPIO_ACTIVE_HIGH>;
|
||||
gpio-fan,speed-map = <0 0>,
|
||||
<13000 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&dra7_pmx_core {
|
||||
@ -140,6 +148,86 @@
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_pins_default: cpsw_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
|
||||
0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
|
||||
0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
|
||||
0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
|
||||
0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
|
||||
0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
|
||||
0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
|
||||
0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
|
||||
0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
|
||||
0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
|
||||
0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
|
||||
0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
|
||||
|
||||
/* Slave 2 */
|
||||
0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
|
||||
0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
|
||||
0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
|
||||
0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
|
||||
0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
|
||||
0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
|
||||
0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
|
||||
0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
|
||||
0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
|
||||
0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
|
||||
0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
|
||||
0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
|
||||
>;
|
||||
|
||||
};
|
||||
|
||||
cpsw_pins_sleep: cpsw_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x250 (PIN_INPUT | MUX_MODE15)
|
||||
0x254 (PIN_INPUT | MUX_MODE15)
|
||||
0x258 (PIN_INPUT | MUX_MODE15)
|
||||
0x25c (PIN_INPUT | MUX_MODE15)
|
||||
0x260 (PIN_INPUT | MUX_MODE15)
|
||||
0x264 (PIN_INPUT | MUX_MODE15)
|
||||
0x268 (PIN_INPUT | MUX_MODE15)
|
||||
0x26c (PIN_INPUT | MUX_MODE15)
|
||||
0x270 (PIN_INPUT | MUX_MODE15)
|
||||
0x274 (PIN_INPUT | MUX_MODE15)
|
||||
0x278 (PIN_INPUT | MUX_MODE15)
|
||||
0x27c (PIN_INPUT | MUX_MODE15)
|
||||
|
||||
/* Slave 2 */
|
||||
0x198 (PIN_INPUT | MUX_MODE15)
|
||||
0x19c (PIN_INPUT | MUX_MODE15)
|
||||
0x1a0 (PIN_INPUT | MUX_MODE15)
|
||||
0x1a4 (PIN_INPUT | MUX_MODE15)
|
||||
0x1a8 (PIN_INPUT | MUX_MODE15)
|
||||
0x1ac (PIN_INPUT | MUX_MODE15)
|
||||
0x1b0 (PIN_INPUT | MUX_MODE15)
|
||||
0x1b4 (PIN_INPUT | MUX_MODE15)
|
||||
0x1b8 (PIN_INPUT | MUX_MODE15)
|
||||
0x1bc (PIN_INPUT | MUX_MODE15)
|
||||
0x1c0 (PIN_INPUT | MUX_MODE15)
|
||||
0x1c4 (PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_pins_default: davinci_mdio_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
|
||||
0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x23c (PIN_INPUT | MUX_MODE15)
|
||||
0x240 (PIN_INPUT | MUX_MODE15)
|
||||
>;
|
||||
};
|
||||
|
||||
tps659038_pins_default: tps659038_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
|
||||
@ -314,6 +402,12 @@
|
||||
wakeup-source;
|
||||
ti,palmas-long-press-seconds = <12>;
|
||||
};
|
||||
|
||||
tps659038_gpio: tps659038_gpio {
|
||||
compatible = "ti,palmas-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
tmp102: tmp102@48 {
|
||||
@ -365,6 +459,32 @@
|
||||
pinctrl-0 = <&uart3_pins_default>;
|
||||
};
|
||||
|
||||
&mac {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_pins_default>;
|
||||
pinctrl-1 = <&cpsw_pins_sleep>;
|
||||
dual_emac;
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <2>;
|
||||
phy-mode = "rgmii";
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_pins_default>;
|
||||
pinctrl-1 = <&davinci_mdio_pins_sleep>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
|
||||
|
||||
@ -1111,7 +1111,6 @@
|
||||
"wkupclk", "refclk",
|
||||
"div-clk", "phy-div";
|
||||
#phy-cells = <0>;
|
||||
id = <1>;
|
||||
ti,hwmods = "pcie1-phy";
|
||||
};
|
||||
|
||||
@ -1132,7 +1131,6 @@
|
||||
"div-clk", "phy-div";
|
||||
#phy-cells = <0>;
|
||||
ti,hwmods = "pcie2-phy";
|
||||
id = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
@ -259,3 +259,61 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcbsp2_pins>;
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x00000000 0x01000000>;
|
||||
|
||||
nand@0,0 {
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
nand-bus-width = <8>;
|
||||
gpmc,device-width = <1>;
|
||||
ti,nand-ecc-opt = "sw";
|
||||
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <120>;
|
||||
gpmc,cs-wr-off-ns = <120>;
|
||||
|
||||
gpmc,adv-on-ns = <0>;
|
||||
gpmc,adv-rd-off-ns = <120>;
|
||||
gpmc,adv-wr-off-ns = <120>;
|
||||
|
||||
gpmc,we-on-ns = <6>;
|
||||
gpmc,we-off-ns = <90>;
|
||||
|
||||
gpmc,oe-on-ns = <6>;
|
||||
gpmc,oe-off-ns = <90>;
|
||||
|
||||
gpmc,page-burst-access-ns = <6>;
|
||||
gpmc,access-ns = <72>;
|
||||
gpmc,cycle2cycle-delay-ns = <60>;
|
||||
|
||||
gpmc,rd-cycle-ns = <120>;
|
||||
gpmc,wr-cycle-ns = <120>;
|
||||
gpmc,wr-access-ns = <186>;
|
||||
gpmc,wr-data-mux-bus-ns = <90>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "xloader";
|
||||
reg = <0 0x80000>;
|
||||
};
|
||||
partition@0x80000 {
|
||||
label = "uboot";
|
||||
reg = <0x80000 0x1e0000>;
|
||||
};
|
||||
partition@0x260000 {
|
||||
label = "uboot environment";
|
||||
reg = <0x260000 0x40000>;
|
||||
};
|
||||
partition@0x2a0000 {
|
||||
label = "linux";
|
||||
reg = <0x2a0000 0x400000>;
|
||||
};
|
||||
partition@0x6a0000 {
|
||||
label = "rootfs";
|
||||
reg = <0x6a0000 0x1f880000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -50,7 +50,8 @@
|
||||
#include "omap-gpmc-smsc911x.dtsi"
|
||||
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x01000000>;
|
||||
ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
|
||||
<0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
|
||||
|
||||
smsc1: ethernet@gpmc {
|
||||
compatible = "smsc,lan9221", "smsc,lan9115";
|
||||
|
||||
@ -83,6 +83,41 @@
|
||||
compatible = "usb-nop-xceiv";
|
||||
reset-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
tv0: connector@1 {
|
||||
compatible = "svideo-connector";
|
||||
label = "tv";
|
||||
|
||||
port {
|
||||
tv_connector_in: endpoint {
|
||||
remote-endpoint = <&opa_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tv_amp: opa362 {
|
||||
compatible = "ti,opa362";
|
||||
enable-gpios = <&gpio1 23 0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
opa_in: endpoint@0 {
|
||||
remote-endpoint = <&venc_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
opa_out: endpoint@0 {
|
||||
remote-endpoint = <&tv_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
@ -396,6 +431,20 @@
|
||||
};
|
||||
};
|
||||
|
||||
&venc {
|
||||
status = "okay";
|
||||
|
||||
vdda-supply = <&vdac>;
|
||||
|
||||
port {
|
||||
venc_out: endpoint {
|
||||
remote-endpoint = <&opa_in>;
|
||||
ti,channels = <2>;
|
||||
ti,invert-polarity;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
|
||||
|
||||
|
||||
@ -307,7 +307,7 @@
|
||||
regulator-name = "V28";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on; /* due battery cover sensor */
|
||||
regulator-always-on; /* due to battery cover sensor */
|
||||
};
|
||||
|
||||
&vaux2 {
|
||||
@ -365,7 +365,6 @@
|
||||
regulator-name = "VIO";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
};
|
||||
|
||||
&vintana1 {
|
||||
|
||||
@ -60,6 +60,11 @@
|
||||
|
||||
&twl {
|
||||
compatible = "ti,twl5031";
|
||||
|
||||
twl_power: power {
|
||||
compatible = "ti,twl4030-power";
|
||||
ti,use_poweroff;
|
||||
};
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
|
||||
@ -69,3 +69,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
|
||||
<0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
|
||||
};
|
||||
|
||||
@ -26,14 +26,10 @@
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* The following ranges correspond to SMSC9x eth chips on CM-T3530 CoM and
|
||||
* SB-T35 baseboard respectively.
|
||||
* This setting includes both chips in SBC-T3530 board device tree.
|
||||
*/
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x01000000>,
|
||||
<4 0 0x2d000000 0x01000000>;
|
||||
ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
|
||||
<4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
|
||||
<0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
|
||||
@ -27,8 +27,9 @@
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <5 0 0x2c000000 0x01000000>,
|
||||
<4 0 0x2d000000 0x01000000>;
|
||||
ranges = <5 0 0x2c000000 0x01000000>, /* CM-T3x30 SMSC9x Eth */
|
||||
<4 0 0x2d000000 0x01000000>, /* SB-T35 SMSC9x Eth */
|
||||
<0 0 0x00000000 0x01000000>; /* CM-T3x NAND */
|
||||
};
|
||||
|
||||
&dss {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user