clk: samsung: exynos5410: do not define number of clocks in bindings

Number of clocks supported by Linux drivers might vary - sometimes we
add new clocks, not exposed previously.  Therefore these numbers of
clocks should not be in the bindings, as that prevents changing them.

Define number of clocks per each clock controller inside the driver
directly.

Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20230808082738.122804-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Krzysztof Kozlowski 2023-08-08 10:27:32 +02:00
parent 727d0f0640
commit 678417694b

View File

@ -56,6 +56,9 @@
#define SRC_KFC 0x28200
#define DIV_KFC0 0x28500
/* NOTE: Must be equal to the last clock ID increased by one */
#define CLKS_NR 512
/* list of PLLs */
enum exynos5410_plls {
apll, cpll, epll, mpll,
@ -260,7 +263,7 @@ static const struct samsung_cmu_info cmu __initconst = {
.nr_div_clks = ARRAY_SIZE(exynos5410_div_clks),
.gate_clks = exynos5410_gate_clks,
.nr_gate_clks = ARRAY_SIZE(exynos5410_gate_clks),
.nr_clk_ids = CLK_NR_CLKS,
.nr_clk_ids = CLKS_NR,
};
/* register exynos5410 clocks */