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Merge branch 'hirschmann-hellcreek-dsa-driver'

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Kurt Kanzenbach says:

====================
Hirschmann Hellcreek DSA driver

this series adds a DSA driver for the Hirschmann Hellcreek TSN switch
IP. Characteristics of that IP:

 * Full duplex Ethernet interface at 100/1000 Mbps on three ports
 * IEEE 802.1Q-compliant Ethernet Switch
 * IEEE 802.1Qbv Time-Aware scheduling support
 * IEEE 1588 and IEEE 802.1AS support

That IP is used e.g. in

 https://www.arrow.com/en/campaigns/arrow-kairos

Due to the hardware setup the switch driver is implemented using DSA. A special
tagging protocol is leveraged. Furthermore, this driver supports PTP and
hardware timestamping.

This work is part of the AccessTSN project: https://www.accesstsn.com/

The previous versions can be found here:

 * https://lkml.kernel.org/netdev/20200618064029.32168-1-kurt@linutronix.de/
 * https://lkml.kernel.org/netdev/20200710113611.3398-1-kurt@linutronix.de/
 * https://lkml.kernel.org/netdev/20200723081714.16005-1-kurt@linutronix.de/
 * https://lkml.kernel.org/netdev/20200820081118.10105-1-kurt@linutronix.de/
 * https://lkml.kernel.org/netdev/20200901125014.17801-1-kurt@linutronix.de/
 * https://lkml.kernel.org/netdev/20200904062739.3540-1-kurt@linutronix.de/
 * https://lkml.kernel.org/netdev/20201004112911.25085-1-kurt@linutronix.de/
 * https://lkml.kernel.org/netdev/20201028074221.29326-1-kurt@linutronix.de/

Changes since v7:

 * Simplify tagging code (rebase to net-next)
 * Pass info instead of ptr (Florian Fainelli)
 * Fix yamllint warnings (Rob Herring)

Changes since v6:

 * Add .tail_tag = true (Vladimir Oltean)
 * Fix vlan_filtering=0 bridges (Vladimir Oltean)
 * Enforce restrictions (Vladimir Oltean)
 * Sort stuff alphabetically (Vladimir Oltean)
 * Rename hellcreek.yaml to hirschmann,hellcreek.yaml
 * Typo fixes

Changes since v5:

 * Implement configure_vlan_while_not_filtering behavior (Vladimir Oltean)
 * Minor cleanups

Changes since v4:

 * Fix W=1 compiler warnings (kernel test robot)
 * Add tags

Changes since v3:

 * Drop TAPRIO support (David Miller)
   => Switch to mutexes due to the lack of hrtimers
 * Use more specific compatible strings and add platform data (Andrew Lunn)
 * Fix Kconfig ordering (Andrew Lunn)

Changes since v2:

 * Make it compile by getting all requirements merged first (Jakub Kicinski, David Miller)
 * Use "tsn" for TSN register set (Rob Herring)
 * Fix DT binding issues (Rob Herring)

Changes since v1:

 * Code simplifications (Florian Fainelli, Vladimir Oltean)
 * Fix issues with hellcreek.yaml bindings (Florian Fainelli)
 * Clear reserved field in ptp v2 event messages (Richard Cochran)
 * Make use of generic ptp parsing function (Richard Cochran, Vladimir Oltean)
 * Fix Kconfig (Florian Fainelli)
 * Add tags (Florian Fainelli, Rob Herring, Richard Cochran)

Changes since RFC ordered by reviewers:

 * Andrew Lunn
   * Use dev_dbg for debug messages
   * Get rid of __ function names where possible
   * Use reverse xmas tree variable ordering
   * Remove redundant/useless checks
   * Improve comments e.g. for PTP
   * Fix Kconfig ordering
   * Make LED handling more generic and provide info via DT
   * Setup advertisement of PHYs according to hardware
   * Drop debugfs patch
 * Jakub Kicinski
   * Fix compiler warnings
 * Florian Fainelli
   * Switch to YAML DT bindings
 * Richard Cochran
   * Fix typo
   * Add missing NULL checks
====================

Link: https://lore.kernel.org/r/20201103071101.3222-1-kurt@linutronix.de
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2020-11-05 14:07:51 -08:00
commit 67438feb2b
18 changed files with 2952 additions and 0 deletions
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127
Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml Normal file
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@ -0,0 +1,127 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/hirschmann,hellcreek.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Hirschmann Hellcreek TSN Switch Device Tree Bindings
allOf:
- $ref: dsa.yaml#
maintainers:
- Andrew Lunn <andrew@lunn.ch>
- Florian Fainelli <f.fainelli@gmail.com>
- Vivien Didelot <vivien.didelot@gmail.com>
- Kurt Kanzenbach <kurt@linutronix.de>
description:
The Hellcreek TSN Switch IP is a 802.1Q Ethernet compliant switch. It supports
the Precision Time Protocol, Hardware Timestamping as well the Time Aware
Shaper.
properties:
compatible:
items:
- const: hirschmann,hellcreek-de1soc-r1
reg:
description:
The physical base address and size of TSN and PTP memory base
minItems: 2
maxItems: 2
reg-names:
items:
- const: tsn
- const: ptp
leds:
type: object
properties:
'#address-cells':
const: 1
'#size-cells':
const: 0
patternProperties:
"^led@[01]$":
type: object
description: Hellcreek leds
$ref: ../../leds/common.yaml#
properties:
reg:
items:
- enum: [0, 1]
description: Led number
label: true
default-state: true
required:
- reg
additionalProperties: false
additionalProperties: false
required:
- compatible
- reg
- reg-names
- ethernet-ports
- leds
unevaluatedProperties: false
examples:
- |
switch0: switch@ff240000 {
compatible = "hirschmann,hellcreek-de1soc-r1";
reg = <0xff240000 0x1000>,
<0xff250000 0x1000>;
reg-names = "tsn", "ptp";
dsa,member = <0 0>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
ethernet = <&gmac0>;
};
port@2 {
reg = <2>;
label = "lan0";
phy-handle = <&phy1>;
};
port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&phy2>;
};
};
leds {
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
label = "sync_good";
default-state = "on";
};
led@1 {
reg = <1>;
label = "is_gm";
default-state = "off";
};
};
};

2
Documentation/devicetree/bindings/vendor-prefixes.yaml
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@ -441,6 +441,8 @@ patternProperties:
description: HiDeep Inc.
"^himax,.*":
description: Himax Technologies, Inc.
"^hirschmann,.*":
description: Hirschmann Automation and Control GmbH
"^hisilicon,.*":
description: Hisilicon Limited.
"^hit,.*":

2
drivers/net/dsa/Kconfig
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@ -24,6 +24,8 @@ config NET_DSA_LOOP
This enables support for a fake mock-up switch chip which
exercises the DSA APIs.
source "drivers/net/dsa/hirschmann/Kconfig"
config NET_DSA_LANTIQ_GSWIP
tristate "Lantiq / Intel GSWIP"
depends on HAS_IOMEM && NET_DSA

1
drivers/net/dsa/Makefile
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@ -18,6 +18,7 @@ obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX) += vitesse-vsc73xx-core.o
obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM) += vitesse-vsc73xx-platform.o
obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_SPI) += vitesse-vsc73xx-spi.o
obj-y += b53/
obj-y += hirschmann/
obj-y += microchip/
obj-y += mv88e6xxx/
obj-y += ocelot/

9
drivers/net/dsa/hirschmann/Kconfig Normal file
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@ -0,0 +1,9 @@
# SPDX-License-Identifier: GPL-2.0
config NET_DSA_HIRSCHMANN_HELLCREEK
tristate "Hirschmann Hellcreek TSN Switch support"
depends on HAS_IOMEM
depends on NET_DSA
depends on PTP_1588_CLOCK
select NET_DSA_TAG_HELLCREEK
help
This driver adds support for Hirschmann Hellcreek TSN switches.

5
drivers/net/dsa/hirschmann/Makefile Normal file
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# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_NET_DSA_HIRSCHMANN_HELLCREEK) += hellcreek_sw.o
hellcreek_sw-objs := hellcreek.o
hellcreek_sw-objs += hellcreek_ptp.o
hellcreek_sw-objs += hellcreek_hwtstamp.o

1339
drivers/net/dsa/hirschmann/hellcreek.c Normal file
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286
drivers/net/dsa/hirschmann/hellcreek.h Normal file
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/* SPDX-License-Identifier: (GPL-2.0 or MIT) */
/*
* DSA driver for:
* Hirschmann Hellcreek TSN switch.
*
* Copyright (C) 2019,2020 Linutronix GmbH
* Author Kurt Kanzenbach <kurt@linutronix.de>
*/
#ifndef _HELLCREEK_H_
#define _HELLCREEK_H_
#include <linux/bitmap.h>
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/mutex.h>
#include <linux/workqueue.h>
#include <linux/leds.h>
#include <linux/platform_data/hirschmann-hellcreek.h>
#include <linux/ptp_clock_kernel.h>
#include <linux/timecounter.h>
#include <net/dsa.h>
/* Ports:
* - 0: CPU
* - 1: Tunnel
* - 2: TSN front port 1
* - 3: TSN front port 2
* - ...
*/
#define CPU_PORT 0
#define TUNNEL_PORT 1
#define HELLCREEK_VLAN_NO_MEMBER 0x0
#define HELLCREEK_VLAN_UNTAGGED_MEMBER 0x1
#define HELLCREEK_VLAN_TAGGED_MEMBER 0x3
#define HELLCREEK_NUM_EGRESS_QUEUES 8
/* Register definitions */
#define HR_MODID_C (0 * 2)
#define HR_REL_L_C (1 * 2)
#define HR_REL_H_C (2 * 2)
#define HR_BLD_L_C (3 * 2)
#define HR_BLD_H_C (4 * 2)
#define HR_CTRL_C (5 * 2)
#define HR_CTRL_C_READY BIT(14)
#define HR_CTRL_C_TRANSITION BIT(13)
#define HR_CTRL_C_ENABLE BIT(0)
#define HR_PSEL (0xa6 * 2)
#define HR_PSEL_PTWSEL_SHIFT 4
#define HR_PSEL_PTWSEL_MASK GENMASK(5, 4)
#define HR_PSEL_PRTCWSEL_SHIFT 0
#define HR_PSEL_PRTCWSEL_MASK GENMASK(2, 0)
#define HR_PTCFG (0xa7 * 2)
#define HR_PTCFG_MLIMIT_EN BIT(13)
#define HR_PTCFG_UMC_FLT BIT(10)
#define HR_PTCFG_UUC_FLT BIT(9)
#define HR_PTCFG_UNTRUST BIT(8)
#define HR_PTCFG_TAG_REQUIRED BIT(7)
#define HR_PTCFG_PPRIO_SHIFT 4
#define HR_PTCFG_PPRIO_MASK GENMASK(6, 4)
#define HR_PTCFG_INGRESSFLT BIT(3)
#define HR_PTCFG_BLOCKED BIT(2)
#define HR_PTCFG_LEARNING_EN BIT(1)
#define HR_PTCFG_ADMIN_EN BIT(0)
#define HR_PRTCCFG (0xa8 * 2)
#define HR_PRTCCFG_PCP_TC_MAP_SHIFT 0
#define HR_PRTCCFG_PCP_TC_MAP_MASK GENMASK(2, 0)
#define HR_CSEL (0x8d * 2)
#define HR_CSEL_SHIFT 0
#define HR_CSEL_MASK GENMASK(7, 0)
#define HR_CRDL (0x8e * 2)
#define HR_CRDH (0x8f * 2)
#define HR_SWTRC_CFG (0x90 * 2)
#define HR_SWTRC0 (0x91 * 2)
#define HR_SWTRC1 (0x92 * 2)
#define HR_PFREE (0x93 * 2)
#define HR_MFREE (0x94 * 2)
#define HR_FDBAGE (0x97 * 2)
#define HR_FDBMAX (0x98 * 2)
#define HR_FDBRDL (0x99 * 2)
#define HR_FDBRDM (0x9a * 2)
#define HR_FDBRDH (0x9b * 2)
#define HR_FDBMDRD (0x9c * 2)
#define HR_FDBMDRD_PORTMASK_SHIFT 0
#define HR_FDBMDRD_PORTMASK_MASK GENMASK(3, 0)
#define HR_FDBMDRD_AGE_SHIFT 4
#define HR_FDBMDRD_AGE_MASK GENMASK(7, 4)
#define HR_FDBMDRD_OBT BIT(8)
#define HR_FDBMDRD_PASS_BLOCKED BIT(9)
#define HR_FDBMDRD_STATIC BIT(11)
#define HR_FDBMDRD_REPRIO_TC_SHIFT 12
#define HR_FDBMDRD_REPRIO_TC_MASK GENMASK(14, 12)
#define HR_FDBMDRD_REPRIO_EN BIT(15)
#define HR_FDBWDL (0x9d * 2)
#define HR_FDBWDM (0x9e * 2)
#define HR_FDBWDH (0x9f * 2)
#define HR_FDBWRM0 (0xa0 * 2)
#define HR_FDBWRM0_PORTMASK_SHIFT 0
#define HR_FDBWRM0_PORTMASK_MASK GENMASK(3, 0)
#define HR_FDBWRM0_OBT BIT(8)
#define HR_FDBWRM0_PASS_BLOCKED BIT(9)
#define HR_FDBWRM0_REPRIO_TC_SHIFT 12
#define HR_FDBWRM0_REPRIO_TC_MASK GENMASK(14, 12)
#define HR_FDBWRM0_REPRIO_EN BIT(15)
#define HR_FDBWRM1 (0xa1 * 2)
#define HR_FDBWRCMD (0xa2 * 2)
#define HR_FDBWRCMD_FDBDEL BIT(9)
#define HR_SWCFG (0xa3 * 2)
#define HR_SWCFG_GM_STATEMD BIT(15)
#define HR_SWCFG_LAS_MODE_SHIFT 12
#define HR_SWCFG_LAS_MODE_MASK GENMASK(13, 12)
#define HR_SWCFG_LAS_OFF (0x00)
#define HR_SWCFG_LAS_ON (0x01)
#define HR_SWCFG_LAS_STATIC (0x10)
#define HR_SWCFG_CT_EN BIT(11)
#define HR_SWCFG_VLAN_UNAWARE BIT(10)
#define HR_SWCFG_ALWAYS_OBT BIT(9)
#define HR_SWCFG_FDBAGE_EN BIT(5)
#define HR_SWCFG_FDBLRN_EN BIT(4)
#define HR_SWSTAT (0xa4 * 2)
#define HR_SWSTAT_FAIL BIT(4)
#define HR_SWSTAT_BUSY BIT(0)
#define HR_SWCMD (0xa5 * 2)
#define HW_SWCMD_FLUSH BIT(0)
#define HR_VIDCFG (0xaa * 2)
#define HR_VIDCFG_VID_SHIFT 0
#define HR_VIDCFG_VID_MASK GENMASK(11, 0)
#define HR_VIDCFG_PVID BIT(12)
#define HR_VIDMBRCFG (0xab * 2)
#define HR_VIDMBRCFG_P0MBR_SHIFT 0
#define HR_VIDMBRCFG_P0MBR_MASK GENMASK(1, 0)
#define HR_VIDMBRCFG_P1MBR_SHIFT 2
#define HR_VIDMBRCFG_P1MBR_MASK GENMASK(3, 2)
#define HR_VIDMBRCFG_P2MBR_SHIFT 4
#define HR_VIDMBRCFG_P2MBR_MASK GENMASK(5, 4)
#define HR_VIDMBRCFG_P3MBR_SHIFT 6
#define HR_VIDMBRCFG_P3MBR_MASK GENMASK(7, 6)
#define HR_FEABITS0 (0xac * 2)
#define HR_FEABITS0_FDBBINS_SHIFT 4
#define HR_FEABITS0_FDBBINS_MASK GENMASK(7, 4)
#define HR_FEABITS0_PCNT_SHIFT 8
#define HR_FEABITS0_PCNT_MASK GENMASK(11, 8)
#define HR_FEABITS0_MCNT_SHIFT 12
#define HR_FEABITS0_MCNT_MASK GENMASK(15, 12)
#define TR_QTRACK (0xb1 * 2)
#define TR_TGDVER (0xb3 * 2)
#define TR_TGDVER_REV_MIN_MASK GENMASK(7, 0)
#define TR_TGDVER_REV_MIN_SHIFT 0
#define TR_TGDVER_REV_MAJ_MASK GENMASK(15, 8)
#define TR_TGDVER_REV_MAJ_SHIFT 8
#define TR_TGDSEL (0xb4 * 2)
#define TR_TGDSEL_TDGSEL_MASK GENMASK(1, 0)
#define TR_TGDSEL_TDGSEL_SHIFT 0
#define TR_TGDCTRL (0xb5 * 2)
#define TR_TGDCTRL_GATE_EN BIT(0)
#define TR_TGDCTRL_CYC_SNAP BIT(4)
#define TR_TGDCTRL_SNAP_EST BIT(5)
#define TR_TGDCTRL_ADMINGATESTATES_MASK GENMASK(15, 8)
#define TR_TGDCTRL_ADMINGATESTATES_SHIFT 8
#define TR_TGDSTAT0 (0xb6 * 2)
#define TR_TGDSTAT1 (0xb7 * 2)
#define TR_ESTWRL (0xb8 * 2)
#define TR_ESTWRH (0xb9 * 2)
#define TR_ESTCMD (0xba * 2)
#define TR_ESTCMD_ESTSEC_MASK GENMASK(2, 0)
#define TR_ESTCMD_ESTSEC_SHIFT 0
#define TR_ESTCMD_ESTARM BIT(4)
#define TR_ESTCMD_ESTSWCFG BIT(5)
#define TR_EETWRL (0xbb * 2)
#define TR_EETWRH (0xbc * 2)
#define TR_EETCMD (0xbd * 2)
#define TR_EETCMD_EETSEC_MASK GEMASK(2, 0)
#define TR_EETCMD_EETSEC_SHIFT 0
#define TR_EETCMD_EETARM BIT(4)
#define TR_CTWRL (0xbe * 2)
#define TR_CTWRH (0xbf * 2)
#define TR_LCNSL (0xc1 * 2)
#define TR_LCNSH (0xc2 * 2)
#define TR_LCS (0xc3 * 2)
#define TR_GCLDAT (0xc4 * 2)
#define TR_GCLDAT_GCLWRGATES_MASK GENMASK(7, 0)
#define TR_GCLDAT_GCLWRGATES_SHIFT 0
#define TR_GCLDAT_GCLWRLAST BIT(8)
#define TR_GCLDAT_GCLOVRI BIT(9)
#define TR_GCLTIL (0xc5 * 2)
#define TR_GCLTIH (0xc6 * 2)
#define TR_GCLCMD (0xc7 * 2)
#define TR_GCLCMD_GCLWRADR_MASK GENMASK(7, 0)
#define TR_GCLCMD_GCLWRADR_SHIFT 0
#define TR_GCLCMD_INIT_GATE_STATES_MASK GENMASK(15, 8)
#define TR_GCLCMD_INIT_GATE_STATES_SHIFT 8
struct hellcreek_counter {
u8 offset;
const char *name;
};
struct hellcreek;
/* State flags for hellcreek_port_hwtstamp::state */
enum {
HELLCREEK_HWTSTAMP_ENABLED,
HELLCREEK_HWTSTAMP_TX_IN_PROGRESS,
};
/* A structure to hold hardware timestamping information per port */
struct hellcreek_port_hwtstamp {
/* Timestamping state */
unsigned long state;
/* Resources for receive timestamping */
struct sk_buff_head rx_queue; /* For synchronization messages */
/* Resources for transmit timestamping */
unsigned long tx_tstamp_start;
struct sk_buff *tx_skb;
/* Current timestamp configuration */
struct hwtstamp_config tstamp_config;
};
struct hellcreek_port {
struct hellcreek *hellcreek;
unsigned long *vlan_dev_bitmap;
int port;
u16 ptcfg; /* ptcfg shadow */
u64 *counter_values;
/* Per-port timestamping resources */
struct hellcreek_port_hwtstamp port_hwtstamp;
};
struct hellcreek_fdb_entry {
size_t idx;
unsigned char mac[ETH_ALEN];
u8 portmask;
u8 age;
u8 is_obt;
u8 pass_blocked;
u8 is_static;
u8 reprio_tc;
u8 reprio_en;
};
struct hellcreek {
const struct hellcreek_platform_data *pdata;
struct device *dev;
struct dsa_switch *ds;
struct ptp_clock *ptp_clock;
struct ptp_clock_info ptp_clock_info;
struct hellcreek_port *ports;
struct delayed_work overflow_work;
struct led_classdev led_is_gm;
struct led_classdev led_sync_good;
struct mutex reg_lock; /* Switch IP register lock */
struct mutex vlan_lock; /* VLAN bitmaps lock */
struct mutex ptp_lock; /* PTP IP register lock */
void __iomem *base;
void __iomem *ptp_base;
u16 swcfg; /* swcfg shadow */
u8 *vidmbrcfg; /* vidmbrcfg shadow */
u64 seconds; /* PTP seconds */
u64 last_ts; /* Used for overflow detection */
u16 status_out; /* ptp.status_out shadow */
size_t fdb_entries;
};
#endif /* _HELLCREEK_H_ */

479
drivers/net/dsa/hirschmann/hellcreek_hwtstamp.c Normal file
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@ -0,0 +1,479 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* DSA driver for:
* Hirschmann Hellcreek TSN switch.
*
* Copyright (C) 2019,2020 Hochschule Offenburg
* Copyright (C) 2019,2020 Linutronix GmbH
* Authors: Kamil Alkhouri <kamil.alkhouri@hs-offenburg.de>
* Kurt Kanzenbach <kurt@linutronix.de>
*/
#include <linux/ptp_classify.h>
#include "hellcreek.h"
#include "hellcreek_hwtstamp.h"
#include "hellcreek_ptp.h"
int hellcreek_get_ts_info(struct dsa_switch *ds, int port,
struct ethtool_ts_info *info)
{
struct hellcreek *hellcreek = ds->priv;
info->phc_index = hellcreek->ptp_clock ?
ptp_clock_index(hellcreek->ptp_clock) : -1;
info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
SOF_TIMESTAMPING_RX_HARDWARE |
SOF_TIMESTAMPING_RAW_HARDWARE;
/* enabled tx timestamping */
info->tx_types = BIT(HWTSTAMP_TX_ON);
/* L2 & L4 PTPv2 event rx messages are timestamped */
info->rx_filters = BIT(HWTSTAMP_FILTER_PTP_V2_EVENT);
return 0;
}
/* Enabling/disabling TX and RX HW timestamping for different PTP messages is
* not available in the switch. Thus, this function only serves as a check if
* the user requested what is actually available or not
*/
static int hellcreek_set_hwtstamp_config(struct hellcreek *hellcreek, int port,
struct hwtstamp_config *config)
{
struct hellcreek_port_hwtstamp *ps =
&hellcreek->ports[port].port_hwtstamp;
bool tx_tstamp_enable = false;
bool rx_tstamp_enable = false;
/* Interaction with the timestamp hardware is prevented here. It is
* enabled when this config function ends successfully
*/
clear_bit_unlock(HELLCREEK_HWTSTAMP_ENABLED, &ps->state);
/* Reserved for future extensions */
if (config->flags)
return -EINVAL;
switch (config->tx_type) {
case HWTSTAMP_TX_ON:
tx_tstamp_enable = true;
break;
/* TX HW timestamping can't be disabled on the switch */
case HWTSTAMP_TX_OFF:
config->tx_type = HWTSTAMP_TX_ON;
break;
default:
return -ERANGE;
}
switch (config->rx_filter) {
/* RX HW timestamping can't be disabled on the switch */
case HWTSTAMP_FILTER_NONE:
config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
break;
case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
case HWTSTAMP_FILTER_PTP_V2_EVENT:
case HWTSTAMP_FILTER_PTP_V2_SYNC:
case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
rx_tstamp_enable = true;
break;
/* RX HW timestamping can't be enabled for all messages on the switch */
case HWTSTAMP_FILTER_ALL:
config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
break;
default:
return -ERANGE;
}
if (!tx_tstamp_enable)
return -ERANGE;
if (!rx_tstamp_enable)
return -ERANGE;
/* If this point is reached, then the requested hwtstamp config is
* compatible with the hwtstamp offered by the switch. Therefore,
* enable the interaction with the HW timestamping
*/
set_bit(HELLCREEK_HWTSTAMP_ENABLED, &ps->state);
return 0;
}
int hellcreek_port_hwtstamp_set(struct dsa_switch *ds, int port,
struct ifreq *ifr)
{
struct hellcreek *hellcreek = ds->priv;
struct hellcreek_port_hwtstamp *ps;
struct hwtstamp_config config;
int err;
ps = &hellcreek->ports[port].port_hwtstamp;
if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
return -EFAULT;
err = hellcreek_set_hwtstamp_config(hellcreek, port, &config);
if (err)
return err;
/* Save the chosen configuration to be returned later */
memcpy(&ps->tstamp_config, &config, sizeof(config));
return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
-EFAULT : 0;
}
int hellcreek_port_hwtstamp_get(struct dsa_switch *ds, int port,
struct ifreq *ifr)
{
struct hellcreek *hellcreek = ds->priv;
struct hellcreek_port_hwtstamp *ps;
struct hwtstamp_config *config;
ps = &hellcreek->ports[port].port_hwtstamp;
config = &ps->tstamp_config;
return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
-EFAULT : 0;
}
/* Returns a pointer to the PTP header if the caller should time stamp, or NULL
* if the caller should not.
*/
static struct ptp_header *hellcreek_should_tstamp(struct hellcreek *hellcreek,
int port, struct sk_buff *skb,
unsigned int type)
{
struct hellcreek_port_hwtstamp *ps =
&hellcreek->ports[port].port_hwtstamp;
struct ptp_header *hdr;
hdr = ptp_parse_header(skb, type);
if (!hdr)
return NULL;
if (!test_bit(HELLCREEK_HWTSTAMP_ENABLED, &ps->state))
return NULL;
return hdr;
}
static u64 hellcreek_get_reserved_field(const struct ptp_header *hdr)
{
return be32_to_cpu(hdr->reserved2);
}
static void hellcreek_clear_reserved_field(struct ptp_header *hdr)
{
hdr->reserved2 = 0;
}
static int hellcreek_ptp_hwtstamp_available(struct hellcreek *hellcreek,
unsigned int ts_reg)
{
u16 status;
status = hellcreek_ptp_read(hellcreek, ts_reg);
if (status & PR_TS_STATUS_TS_LOST)
dev_err(hellcreek->dev,
"Tx time stamp lost! This should never happen!\n");
/* If hwtstamp is not available, this means the previous hwtstamp was
* successfully read, and the one we need is not yet available
*/
return (status & PR_TS_STATUS_TS_AVAIL) ? 1 : 0;
}
/* Get nanoseconds timestamp from timestamping unit */
static u64 hellcreek_ptp_hwtstamp_read(struct hellcreek *hellcreek,
unsigned int ts_reg)
{
u16 nsl, nsh;
nsh = hellcreek_ptp_read(hellcreek, ts_reg);
nsh = hellcreek_ptp_read(hellcreek, ts_reg);
nsh = hellcreek_ptp_read(hellcreek, ts_reg);
nsh = hellcreek_ptp_read(hellcreek, ts_reg);
nsl = hellcreek_ptp_read(hellcreek, ts_reg);
return (u64)nsl | ((u64)nsh << 16);
}
static int hellcreek_txtstamp_work(struct hellcreek *hellcreek,
struct hellcreek_port_hwtstamp *ps, int port)
{
struct skb_shared_hwtstamps shhwtstamps;
unsigned int status_reg, data_reg;
struct sk_buff *tmp_skb;
int ts_status;
u64 ns = 0;
if (!ps->tx_skb)
return 0;
switch (port) {
case 2:
status_reg = PR_TS_TX_P1_STATUS_C;
data_reg = PR_TS_TX_P1_DATA_C;
break;
case 3:
status_reg = PR_TS_TX_P2_STATUS_C;
data_reg = PR_TS_TX_P2_DATA_C;
break;
default:
dev_err(hellcreek->dev, "Wrong port for timestamping!\n");
return 0;
}
ts_status = hellcreek_ptp_hwtstamp_available(hellcreek, status_reg);
/* Not available yet? */
if (ts_status == 0) {
/* Check whether the operation of reading the tx timestamp has
* exceeded its allowed period
*/
if (time_is_before_jiffies(ps->tx_tstamp_start +
TX_TSTAMP_TIMEOUT)) {
dev_err(hellcreek->dev,
"Timeout while waiting for Tx timestamp!\n");
goto free_and_clear_skb;
}
/* The timestamp should be available quickly, while getting it
* in high priority. Restart the work
*/
return 1;
}
mutex_lock(&hellcreek->ptp_lock);
ns = hellcreek_ptp_hwtstamp_read(hellcreek, data_reg);
ns += hellcreek_ptp_gettime_seconds(hellcreek, ns);
mutex_unlock(&hellcreek->ptp_lock);
/* Now we have the timestamp in nanoseconds, store it in the correct
* structure in order to send it to the user
*/
memset(&shhwtstamps, 0, sizeof(shhwtstamps));
shhwtstamps.hwtstamp = ns_to_ktime(ns);
tmp_skb = ps->tx_skb;
ps->tx_skb = NULL;
/* skb_complete_tx_timestamp() frees up the client to make another
* timestampable transmit. We have to be ready for it by clearing the
* ps->tx_skb "flag" beforehand
*/
clear_bit_unlock(HELLCREEK_HWTSTAMP_TX_IN_PROGRESS, &ps->state);
/* Deliver a clone of the original outgoing tx_skb with tx hwtstamp */
skb_complete_tx_timestamp(tmp_skb, &shhwtstamps);
return 0;
free_and_clear_skb:
dev_kfree_skb_any(ps->tx_skb);
ps->tx_skb = NULL;
clear_bit_unlock(HELLCREEK_HWTSTAMP_TX_IN_PROGRESS, &ps->state);
return 0;
}
static void hellcreek_get_rxts(struct hellcreek *hellcreek,
struct hellcreek_port_hwtstamp *ps,
struct sk_buff *skb, struct sk_buff_head *rxq,
int port)
{
struct skb_shared_hwtstamps *shwt;
struct sk_buff_head received;
unsigned long flags;
/* The latched timestamp belongs to one of the received frames. */
__skb_queue_head_init(&received);
/* Lock & disable interrupts */
spin_lock_irqsave(&rxq->lock, flags);
/* Add the reception queue "rxq" to the "received" queue an reintialize
* "rxq". From now on, we deal with "received" not with "rxq"
*/
skb_queue_splice_tail_init(rxq, &received);
spin_unlock_irqrestore(&rxq->lock, flags);
for (; skb; skb = __skb_dequeue(&received)) {
struct ptp_header *hdr;
unsigned int type;
u64 ns;
/* Get nanoseconds from ptp packet */
type = SKB_PTP_TYPE(skb);
hdr = ptp_parse_header(skb, type);
ns = hellcreek_get_reserved_field(hdr);
hellcreek_clear_reserved_field(hdr);
/* Add seconds part */
mutex_lock(&hellcreek->ptp_lock);
ns += hellcreek_ptp_gettime_seconds(hellcreek, ns);
mutex_unlock(&hellcreek->ptp_lock);
/* Save time stamp */
shwt = skb_hwtstamps(skb);
memset(shwt, 0, sizeof(*shwt));
shwt->hwtstamp = ns_to_ktime(ns);
netif_rx_ni(skb);
}
}
static void hellcreek_rxtstamp_work(struct hellcreek *hellcreek,
struct hellcreek_port_hwtstamp *ps,
int port)
{
struct sk_buff *skb;
skb = skb_dequeue(&ps->rx_queue);
if (skb)
hellcreek_get_rxts(hellcreek, ps, skb, &ps->rx_queue, port);
}
long hellcreek_hwtstamp_work(struct ptp_clock_info *ptp)
{
struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);
struct dsa_switch *ds = hellcreek->ds;
int i, restart = 0;
for (i = 0; i < ds->num_ports; i++) {
struct hellcreek_port_hwtstamp *ps;
if (!dsa_is_user_port(ds, i))
continue;
ps = &hellcreek->ports[i].port_hwtstamp;
if (test_bit(HELLCREEK_HWTSTAMP_TX_IN_PROGRESS, &ps->state))
restart |= hellcreek_txtstamp_work(hellcreek, ps, i);
hellcreek_rxtstamp_work(hellcreek, ps, i);
}
return restart ? 1 : -1;
}
bool hellcreek_port_txtstamp(struct dsa_switch *ds, int port,
struct sk_buff *clone, unsigned int type)
{
struct hellcreek *hellcreek = ds->priv;
struct hellcreek_port_hwtstamp *ps;
struct ptp_header *hdr;
ps = &hellcreek->ports[port].port_hwtstamp;
/* Check if the driver is expected to do HW timestamping */
if (!(skb_shinfo(clone)->tx_flags & SKBTX_HW_TSTAMP))
return false;
/* Make sure the message is a PTP message that needs to be timestamped
* and the interaction with the HW timestamping is enabled. If not, stop
* here
*/
hdr = hellcreek_should_tstamp(hellcreek, port, clone, type);
if (!hdr)
return false;
if (test_and_set_bit_lock(HELLCREEK_HWTSTAMP_TX_IN_PROGRESS,
&ps->state))
return false;
ps->tx_skb = clone;
/* store the number of ticks occurred since system start-up till this
* moment
*/
ps->tx_tstamp_start = jiffies;
ptp_schedule_worker(hellcreek->ptp_clock, 0);
return true;
}
bool hellcreek_port_rxtstamp(struct dsa_switch *ds, int port,
struct sk_buff *skb, unsigned int type)
{
struct hellcreek *hellcreek = ds->priv;
struct hellcreek_port_hwtstamp *ps;
struct ptp_header *hdr;
ps = &hellcreek->ports[port].port_hwtstamp;
/* This check only fails if the user did not initialize hardware
* timestamping beforehand.
*/
if (ps->tstamp_config.rx_filter != HWTSTAMP_FILTER_PTP_V2_EVENT)
return false;
/* Make sure the message is a PTP message that needs to be timestamped
* and the interaction with the HW timestamping is enabled. If not, stop
* here
*/
hdr = hellcreek_should_tstamp(hellcreek, port, skb, type);
if (!hdr)
return false;
SKB_PTP_TYPE(skb) = type;
skb_queue_tail(&ps->rx_queue, skb);
ptp_schedule_worker(hellcreek->ptp_clock, 0);
return true;
}
static void hellcreek_hwtstamp_port_setup(struct hellcreek *hellcreek, int port)
{
struct hellcreek_port_hwtstamp *ps =
&hellcreek->ports[port].port_hwtstamp;
skb_queue_head_init(&ps->rx_queue);
}
int hellcreek_hwtstamp_setup(struct hellcreek *hellcreek)
{
struct dsa_switch *ds = hellcreek->ds;
int i;
/* Initialize timestamping ports. */
for (i = 0; i < ds->num_ports; ++i) {
if (!dsa_is_user_port(ds, i))
continue;
hellcreek_hwtstamp_port_setup(hellcreek, i);
}
/* Select the synchronized clock as the source timekeeper for the
* timestamps and enable inline timestamping.
*/
hellcreek_ptp_write(hellcreek, PR_SETTINGS_C_TS_SRC_TK_MASK |
PR_SETTINGS_C_RES3TS,
PR_SETTINGS_C);
return 0;
}
void hellcreek_hwtstamp_free(struct hellcreek *hellcreek)
{
/* Nothing todo */
}

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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* DSA driver for:
* Hirschmann Hellcreek TSN switch.
*
* Copyright (C) 2019,2020 Hochschule Offenburg
* Copyright (C) 2019,2020 Linutronix GmbH
* Authors: Kurt Kanzenbach <kurt@linutronix.de>
* Kamil Alkhouri <kamil.alkhouri@hs-offenburg.de>
*/
#ifndef _HELLCREEK_HWTSTAMP_H_
#define _HELLCREEK_HWTSTAMP_H_
#include <net/dsa.h>
#include "hellcreek.h"
/* Timestamp Register */
#define PR_TS_RX_P1_STATUS_C (0x1d * 2)
#define PR_TS_RX_P1_DATA_C (0x1e * 2)
#define PR_TS_TX_P1_STATUS_C (0x1f * 2)
#define PR_TS_TX_P1_DATA_C (0x20 * 2)
#define PR_TS_RX_P2_STATUS_C (0x25 * 2)
#define PR_TS_RX_P2_DATA_C (0x26 * 2)
#define PR_TS_TX_P2_STATUS_C (0x27 * 2)
#define PR_TS_TX_P2_DATA_C (0x28 * 2)
#define PR_TS_STATUS_TS_AVAIL BIT(2)
#define PR_TS_STATUS_TS_LOST BIT(3)
#define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)->cb))
/* TX_TSTAMP_TIMEOUT: This limits the time spent polling for a TX
* timestamp. When working properly, hardware will produce a timestamp
* within 1ms. Software may enounter delays, so the timeout is set
* accordingly.
*/
#define TX_TSTAMP_TIMEOUT msecs_to_jiffies(40)
int hellcreek_port_hwtstamp_set(struct dsa_switch *ds, int port,
struct ifreq *ifr);
int hellcreek_port_hwtstamp_get(struct dsa_switch *ds, int port,
struct ifreq *ifr);
bool hellcreek_port_rxtstamp(struct dsa_switch *ds, int port,
struct sk_buff *clone, unsigned int type);
bool hellcreek_port_txtstamp(struct dsa_switch *ds, int port,
struct sk_buff *clone, unsigned int type);
int hellcreek_get_ts_info(struct dsa_switch *ds, int port,
struct ethtool_ts_info *info);
long hellcreek_hwtstamp_work(struct ptp_clock_info *ptp);
int hellcreek_hwtstamp_setup(struct hellcreek *chip);
void hellcreek_hwtstamp_free(struct hellcreek *chip);
#endif /* _HELLCREEK_HWTSTAMP_H_ */

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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* DSA driver for:
* Hirschmann Hellcreek TSN switch.
*
* Copyright (C) 2019,2020 Hochschule Offenburg
* Copyright (C) 2019,2020 Linutronix GmbH
* Authors: Kamil Alkhouri <kamil.alkhouri@hs-offenburg.de>
* Kurt Kanzenbach <kurt@linutronix.de>
*/
#include <linux/ptp_clock_kernel.h>
#include "hellcreek.h"
#include "hellcreek_ptp.h"
#include "hellcreek_hwtstamp.h"
u16 hellcreek_ptp_read(struct hellcreek *hellcreek, unsigned int offset)
{
return readw(hellcreek->ptp_base + offset);
}
void hellcreek_ptp_write(struct hellcreek *hellcreek, u16 data,
unsigned int offset)
{
writew(data, hellcreek->ptp_base + offset);
}
/* Get nanoseconds from PTP clock */
static u64 hellcreek_ptp_clock_read(struct hellcreek *hellcreek)
{
u16 nsl, nsh;
/* Take a snapshot */
hellcreek_ptp_write(hellcreek, PR_COMMAND_C_SS, PR_COMMAND_C);
/* The time of the day is saved as 96 bits. However, due to hardware
* limitations the seconds are not or only partly kept in the PTP
* core. Currently only three bits for the seconds are available. That's
* why only the nanoseconds are used and the seconds are tracked in
* software. Anyway due to internal locking all five registers should be
* read.
*/
nsh = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);
nsh = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);
nsh = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);
nsh = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);
nsl = hellcreek_ptp_read(hellcreek, PR_SS_SYNC_DATA_C);
return (u64)nsl | ((u64)nsh << 16);
}
static u64 __hellcreek_ptp_gettime(struct hellcreek *hellcreek)
{
u64 ns;
ns = hellcreek_ptp_clock_read(hellcreek);
if (ns < hellcreek->last_ts)
hellcreek->seconds++;
hellcreek->last_ts = ns;
ns += hellcreek->seconds * NSEC_PER_SEC;
return ns;
}
/* Retrieve the seconds parts in nanoseconds for a packet timestamped with @ns.
* There has to be a check whether an overflow occurred between the packet
* arrival and now. If so use the correct seconds (-1) for calculating the
* packet arrival time.
*/
u64 hellcreek_ptp_gettime_seconds(struct hellcreek *hellcreek, u64 ns)
{
u64 s;
__hellcreek_ptp_gettime(hellcreek);
if (hellcreek->last_ts > ns)
s = hellcreek->seconds * NSEC_PER_SEC;
else
s = (hellcreek->seconds - 1) * NSEC_PER_SEC;
return s;
}
static int hellcreek_ptp_gettime(struct ptp_clock_info *ptp,
struct timespec64 *ts)
{
struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);
u64 ns;
mutex_lock(&hellcreek->ptp_lock);
ns = __hellcreek_ptp_gettime(hellcreek);
mutex_unlock(&hellcreek->ptp_lock);
*ts = ns_to_timespec64(ns);
return 0;
}
static int hellcreek_ptp_settime(struct ptp_clock_info *ptp,
const struct timespec64 *ts)
{
struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);
u16 secl, nsh, nsl;
secl = ts->tv_sec & 0xffff;
nsh = ((u32)ts->tv_nsec & 0xffff0000) >> 16;
nsl = ts->tv_nsec & 0xffff;
mutex_lock(&hellcreek->ptp_lock);
/* Update overflow data structure */
hellcreek->seconds = ts->tv_sec;
hellcreek->last_ts = ts->tv_nsec;
/* Set time in clock */
hellcreek_ptp_write(hellcreek, 0x00, PR_CLOCK_WRITE_C);
hellcreek_ptp_write(hellcreek, 0x00, PR_CLOCK_WRITE_C);
hellcreek_ptp_write(hellcreek, secl, PR_CLOCK_WRITE_C);
hellcreek_ptp_write(hellcreek, nsh, PR_CLOCK_WRITE_C);
hellcreek_ptp_write(hellcreek, nsl, PR_CLOCK_WRITE_C);
mutex_unlock(&hellcreek->ptp_lock);
return 0;
}
static int hellcreek_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
{
struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);
u16 negative = 0, addendh, addendl;
u32 addend;
u64 adj;
if (scaled_ppm < 0) {
negative = 1;
scaled_ppm = -scaled_ppm;
}
/* IP-Core adjusts the nominal frequency by adding or subtracting 1 ns
* from the 8 ns (period of the oscillator) every time the accumulator
* register overflows. The value stored in the addend register is added
* to the accumulator register every 8 ns.
*
* addend value = (2^30 * accumulator_overflow_rate) /
* oscillator_frequency
* where:
*
* oscillator_frequency = 125 MHz
* accumulator_overflow_rate = 125 MHz * scaled_ppm * 2^-16 * 10^-6 * 8
*/
adj = scaled_ppm;
adj <<= 11;
addend = (u32)div_u64(adj, 15625);
addendh = (addend & 0xffff0000) >> 16;
addendl = addend & 0xffff;
negative = (negative << 15) & 0x8000;
mutex_lock(&hellcreek->ptp_lock);
/* Set drift register */
hellcreek_ptp_write(hellcreek, negative, PR_CLOCK_DRIFT_C);
hellcreek_ptp_write(hellcreek, 0x00, PR_CLOCK_DRIFT_C);
hellcreek_ptp_write(hellcreek, 0x00, PR_CLOCK_DRIFT_C);
hellcreek_ptp_write(hellcreek, addendh, PR_CLOCK_DRIFT_C);
hellcreek_ptp_write(hellcreek, addendl, PR_CLOCK_DRIFT_C);
mutex_unlock(&hellcreek->ptp_lock);
return 0;
}
static int hellcreek_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
{
struct hellcreek *hellcreek = ptp_to_hellcreek(ptp);
u16 negative = 0, counth, countl;
u32 count_val;
/* If the offset is larger than IP-Core slow offset resources. Don't
* consider slow adjustment. Rather, add the offset directly to the
* current time
*/
if (abs(delta) > MAX_SLOW_OFFSET_ADJ) {
struct timespec64 now, then = ns_to_timespec64(delta);
hellcreek_ptp_gettime(ptp, &now);
now = timespec64_add(now, then);
hellcreek_ptp_settime(ptp, &now);
return 0;
}
if (delta < 0) {
negative = 1;
delta = -delta;
}
/* 'count_val' does not exceed the maximum register size (2^30) */
count_val = div_s64(delta, MAX_NS_PER_STEP);
counth = (count_val & 0xffff0000) >> 16;
countl = count_val & 0xffff;
negative = (negative << 15) & 0x8000;
mutex_lock(&hellcreek->ptp_lock);
/* Set offset write register */
hellcreek_ptp_write(hellcreek, negative, PR_CLOCK_OFFSET_C);
hellcreek_ptp_write(hellcreek, MAX_NS_PER_STEP, PR_CLOCK_OFFSET_C);
hellcreek_ptp_write(hellcreek, MIN_CLK_CYCLES_BETWEEN_STEPS,
PR_CLOCK_OFFSET_C);
hellcreek_ptp_write(hellcreek, countl, PR_CLOCK_OFFSET_C);
hellcreek_ptp_write(hellcreek, counth, PR_CLOCK_OFFSET_C);
mutex_unlock(&hellcreek->ptp_lock);
return 0;
}
static int hellcreek_ptp_enable(struct ptp_clock_info *ptp,
struct ptp_clock_request *rq, int on)
{
return -EOPNOTSUPP;
}
static void hellcreek_ptp_overflow_check(struct work_struct *work)
{
struct delayed_work *dw = to_delayed_work(work);
struct hellcreek *hellcreek;
hellcreek = dw_overflow_to_hellcreek(dw);
mutex_lock(&hellcreek->ptp_lock);
__hellcreek_ptp_gettime(hellcreek);
mutex_unlock(&hellcreek->ptp_lock);
schedule_delayed_work(&hellcreek->overflow_work,
HELLCREEK_OVERFLOW_PERIOD);
}
static enum led_brightness hellcreek_get_brightness(struct hellcreek *hellcreek,
int led)
{
return (hellcreek->status_out & led) ? 1 : 0;
}
static void hellcreek_set_brightness(struct hellcreek *hellcreek, int led,
enum led_brightness b)
{
mutex_lock(&hellcreek->ptp_lock);
if (b)
hellcreek->status_out |= led;
else
hellcreek->status_out &= ~led;
hellcreek_ptp_write(hellcreek, hellcreek->status_out, STATUS_OUT);
mutex_unlock(&hellcreek->ptp_lock);
}
static void hellcreek_led_sync_good_set(struct led_classdev *ldev,
enum led_brightness b)
{
struct hellcreek *hellcreek = led_to_hellcreek(ldev, led_sync_good);
hellcreek_set_brightness(hellcreek, STATUS_OUT_SYNC_GOOD, b);
}
static enum led_brightness hellcreek_led_sync_good_get(struct led_classdev *ldev)
{
struct hellcreek *hellcreek = led_to_hellcreek(ldev, led_sync_good);
return hellcreek_get_brightness(hellcreek, STATUS_OUT_SYNC_GOOD);
}
static void hellcreek_led_is_gm_set(struct led_classdev *ldev,
enum led_brightness b)
{
struct hellcreek *hellcreek = led_to_hellcreek(ldev, led_is_gm);
hellcreek_set_brightness(hellcreek, STATUS_OUT_IS_GM, b);
}
static enum led_brightness hellcreek_led_is_gm_get(struct led_classdev *ldev)
{
struct hellcreek *hellcreek = led_to_hellcreek(ldev, led_is_gm);
return hellcreek_get_brightness(hellcreek, STATUS_OUT_IS_GM);
}
/* There two available LEDs internally called sync_good and is_gm. However, the
* user might want to use a different label and specify the default state. Take
* those properties from device tree.
*/
static int hellcreek_led_setup(struct hellcreek *hellcreek)
{
struct device_node *leds, *led = NULL;
const char *label, *state;
int ret = -EINVAL;
leds = of_find_node_by_name(hellcreek->dev->of_node, "leds");
if (!leds) {
dev_err(hellcreek->dev, "No LEDs specified in device tree!\n");
return ret;
}
hellcreek->status_out = 0;
led = of_get_next_available_child(leds, led);
if (!led) {
dev_err(hellcreek->dev, "First LED not specified!\n");
goto out;
}
ret = of_property_read_string(led, "label", &label);
hellcreek->led_sync_good.name = ret ? "sync_good" : label;
ret = of_property_read_string(led, "default-state", &state);
if (!ret) {
if (!strcmp(state, "on"))
hellcreek->led_sync_good.brightness = 1;
else if (!strcmp(state, "off"))
hellcreek->led_sync_good.brightness = 0;
else if (!strcmp(state, "keep"))
hellcreek->led_sync_good.brightness =
hellcreek_get_brightness(hellcreek,
STATUS_OUT_SYNC_GOOD);
}
hellcreek->led_sync_good.max_brightness = 1;
hellcreek->led_sync_good.brightness_set = hellcreek_led_sync_good_set;
hellcreek->led_sync_good.brightness_get = hellcreek_led_sync_good_get;
led = of_get_next_available_child(leds, led);
if (!led) {
dev_err(hellcreek->dev, "Second LED not specified!\n");
ret = -EINVAL;
goto out;
}
ret = of_property_read_string(led, "label", &label);
hellcreek->led_is_gm.name = ret ? "is_gm" : label;
ret = of_property_read_string(led, "default-state", &state);
if (!ret) {
if (!strcmp(state, "on"))
hellcreek->led_is_gm.brightness = 1;
else if (!strcmp(state, "off"))
hellcreek->led_is_gm.brightness = 0;
else if (!strcmp(state, "keep"))
hellcreek->led_is_gm.brightness =
hellcreek_get_brightness(hellcreek,
STATUS_OUT_IS_GM);
}
hellcreek->led_is_gm.max_brightness = 1;
hellcreek->led_is_gm.brightness_set = hellcreek_led_is_gm_set;
hellcreek->led_is_gm.brightness_get = hellcreek_led_is_gm_get;
/* Set initial state */
if (hellcreek->led_sync_good.brightness == 1)
hellcreek_set_brightness(hellcreek, STATUS_OUT_SYNC_GOOD, 1);
if (hellcreek->led_is_gm.brightness == 1)
hellcreek_set_brightness(hellcreek, STATUS_OUT_IS_GM, 1);
/* Register both leds */
led_classdev_register(hellcreek->dev, &hellcreek->led_sync_good);
led_classdev_register(hellcreek->dev, &hellcreek->led_is_gm);
ret = 0;
out:
of_node_put(leds);
return ret;
}
int hellcreek_ptp_setup(struct hellcreek *hellcreek)
{
u16 status;
int ret;
/* Set up the overflow work */
INIT_DELAYED_WORK(&hellcreek->overflow_work,
hellcreek_ptp_overflow_check);
/* Setup PTP clock */
hellcreek->ptp_clock_info.owner = THIS_MODULE;
snprintf(hellcreek->ptp_clock_info.name,
sizeof(hellcreek->ptp_clock_info.name),
dev_name(hellcreek->dev));
/* IP-Core can add up to 0.5 ns per 8 ns cycle, which means
* accumulator_overflow_rate shall not exceed 62.5 MHz (which adjusts
* the nominal frequency by 6.25%)
*/
hellcreek->ptp_clock_info.max_adj = 62500000;
hellcreek->ptp_clock_info.n_alarm = 0;
hellcreek->ptp_clock_info.n_pins = 0;
hellcreek->ptp_clock_info.n_ext_ts = 0;
hellcreek->ptp_clock_info.n_per_out = 0;
hellcreek->ptp_clock_info.pps = 0;
hellcreek->ptp_clock_info.adjfine = hellcreek_ptp_adjfine;
hellcreek->ptp_clock_info.adjtime = hellcreek_ptp_adjtime;
hellcreek->ptp_clock_info.gettime64 = hellcreek_ptp_gettime;
hellcreek->ptp_clock_info.settime64 = hellcreek_ptp_settime;
hellcreek->ptp_clock_info.enable = hellcreek_ptp_enable;
hellcreek->ptp_clock_info.do_aux_work = hellcreek_hwtstamp_work;
hellcreek->ptp_clock = ptp_clock_register(&hellcreek->ptp_clock_info,
hellcreek->dev);
if (IS_ERR(hellcreek->ptp_clock))
return PTR_ERR(hellcreek->ptp_clock);
/* Enable the offset correction process, if no offset correction is
* already taking place
*/
status = hellcreek_ptp_read(hellcreek, PR_CLOCK_STATUS_C);
if (!(status & PR_CLOCK_STATUS_C_OFS_ACT))
hellcreek_ptp_write(hellcreek,
status | PR_CLOCK_STATUS_C_ENA_OFS,
PR_CLOCK_STATUS_C);
/* Enable the drift correction process */
hellcreek_ptp_write(hellcreek, status | PR_CLOCK_STATUS_C_ENA_DRIFT,
PR_CLOCK_STATUS_C);
/* LED setup */
ret = hellcreek_led_setup(hellcreek);
if (ret) {
if (hellcreek->ptp_clock)
ptp_clock_unregister(hellcreek->ptp_clock);
return ret;
}
schedule_delayed_work(&hellcreek->overflow_work,
HELLCREEK_OVERFLOW_PERIOD);
return 0;
}
void hellcreek_ptp_free(struct hellcreek *hellcreek)
{
led_classdev_unregister(&hellcreek->led_is_gm);
led_classdev_unregister(&hellcreek->led_sync_good);
cancel_delayed_work_sync(&hellcreek->overflow_work);
if (hellcreek->ptp_clock)
ptp_clock_unregister(hellcreek->ptp_clock);
hellcreek->ptp_clock = NULL;
}

76
drivers/net/dsa/hirschmann/hellcreek_ptp.h Normal file
View File

@ -0,0 +1,76 @@
/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
* DSA driver for:
* Hirschmann Hellcreek TSN switch.
*
* Copyright (C) 2019,2020 Hochschule Offenburg
* Copyright (C) 2019,2020 Linutronix GmbH
* Authors: Kurt Kanzenbach <kurt@linutronix.de>
* Kamil Alkhouri <kamil.alkhouri@hs-offenburg.de>
*/
#ifndef _HELLCREEK_PTP_H_
#define _HELLCREEK_PTP_H_
#include <linux/bitops.h>
#include <linux/ptp_clock_kernel.h>
#include "hellcreek.h"
/* Every jump in time is 7 ns */
#define MAX_NS_PER_STEP 7L
/* Correct offset at every clock cycle */
#define MIN_CLK_CYCLES_BETWEEN_STEPS 0
/* Maximum available slow offset resources */
#define MAX_SLOW_OFFSET_ADJ \
((unsigned long long)((1 << 30) - 1) * MAX_NS_PER_STEP)
/* four times a second overflow check */
#define HELLCREEK_OVERFLOW_PERIOD (HZ / 4)
/* PTP Register */
#define PR_SETTINGS_C (0x09 * 2)
#define PR_SETTINGS_C_RES3TS BIT(4)
#define PR_SETTINGS_C_TS_SRC_TK_SHIFT 8
#define PR_SETTINGS_C_TS_SRC_TK_MASK GENMASK(9, 8)
#define PR_COMMAND_C (0x0a * 2)
#define PR_COMMAND_C_SS BIT(0)
#define PR_CLOCK_STATUS_C (0x0c * 2)
#define PR_CLOCK_STATUS_C_ENA_DRIFT BIT(12)
#define PR_CLOCK_STATUS_C_OFS_ACT BIT(13)
#define PR_CLOCK_STATUS_C_ENA_OFS BIT(14)
#define PR_CLOCK_READ_C (0x0d * 2)
#define PR_CLOCK_WRITE_C (0x0e * 2)
#define PR_CLOCK_OFFSET_C (0x0f * 2)
#define PR_CLOCK_DRIFT_C (0x10 * 2)
#define PR_SS_FREE_DATA_C (0x12 * 2)
#define PR_SS_SYNT_DATA_C (0x14 * 2)
#define PR_SS_SYNC_DATA_C (0x16 * 2)
#define PR_SS_DRAC_DATA_C (0x18 * 2)
#define STATUS_OUT (0x60 * 2)
#define STATUS_OUT_SYNC_GOOD BIT(0)
#define STATUS_OUT_IS_GM BIT(1)
int hellcreek_ptp_setup(struct hellcreek *hellcreek);
void hellcreek_ptp_free(struct hellcreek *hellcreek);
u16 hellcreek_ptp_read(struct hellcreek *hellcreek, unsigned int offset);
void hellcreek_ptp_write(struct hellcreek *hellcreek, u16 data,
unsigned int offset);
u64 hellcreek_ptp_gettime_seconds(struct hellcreek *hellcreek, u64 ns);
#define ptp_to_hellcreek(ptp) \
container_of(ptp, struct hellcreek, ptp_clock_info)
#define dw_overflow_to_hellcreek(dw) \
container_of(dw, struct hellcreek, overflow_work)
#define led_to_hellcreek(ldev, led) \
container_of(ldev, struct hellcreek, led)
#endif /* _HELLCREEK_PTP_H_ */

23
include/linux/platform_data/hirschmann-hellcreek.h Normal file
View File

@ -0,0 +1,23 @@
/* SPDX-License-Identifier: (GPL-2.0 or MIT) */
/*
* Hirschmann Hellcreek TSN switch platform data.
*
* Copyright (C) 2020 Linutronix GmbH
* Author Kurt Kanzenbach <kurt@linutronix.de>
*/
#ifndef _HIRSCHMANN_HELLCREEK_H_
#define _HIRSCHMANN_HELLCREEK_H_
#include <linux/types.h>
struct hellcreek_platform_data {
int num_ports; /* Amount of switch ports */
int is_100_mbits; /* Is it configured to 100 or 1000 mbit/s */
int qbv_support; /* Qbv support on front TSN ports */
int qbv_on_cpu_port; /* Qbv support on the CPU port */
int qbu_support; /* Qbu support on front TSN ports */
u16 module_id; /* Module identificaton */
};
#endif /* _HIRSCHMANN_HELLCREEK_H_ */

8
include/net/dsa.h
View File

@ -45,6 +45,7 @@ struct phylink_link_state;
#define DSA_TAG_PROTO_OCELOT_VALUE 15
#define DSA_TAG_PROTO_AR9331_VALUE 16
#define DSA_TAG_PROTO_RTL4_A_VALUE 17
#define DSA_TAG_PROTO_HELLCREEK_VALUE 18
enum dsa_tag_protocol {
DSA_TAG_PROTO_NONE = DSA_TAG_PROTO_NONE_VALUE,
@ -65,6 +66,7 @@ enum dsa_tag_protocol {
DSA_TAG_PROTO_OCELOT = DSA_TAG_PROTO_OCELOT_VALUE,
DSA_TAG_PROTO_AR9331 = DSA_TAG_PROTO_AR9331_VALUE,
DSA_TAG_PROTO_RTL4_A = DSA_TAG_PROTO_RTL4_A_VALUE,
DSA_TAG_PROTO_HELLCREEK = DSA_TAG_PROTO_HELLCREEK_VALUE,
};
struct packet_type;
@ -534,6 +536,12 @@ struct dsa_switch_ops {
void (*get_regs)(struct dsa_switch *ds, int port,
struct ethtool_regs *regs, void *p);
/*
* Upper device tracking.
*/
int (*port_prechangeupper)(struct dsa_switch *ds, int port,
struct netdev_notifier_changeupper_info *info);
/*
* Bridge integration
*/

6
net/dsa/Kconfig
View File

@ -56,6 +56,12 @@ config NET_DSA_TAG_BRCM_PREPEND
Broadcom switches which places the tag before the Ethernet header
(prepended).
config NET_DSA_TAG_HELLCREEK
tristate "Tag driver for Hirschmann Hellcreek TSN switches"
help
Say Y or M if you want to enable support for tagging frames
for the Hirschmann Hellcreek TSN switches.
config NET_DSA_TAG_GSWIP
tristate "Tag driver for Lantiq / Intel GSWIP switches"
help

1
net/dsa/Makefile
View File

@ -10,6 +10,7 @@ obj-$(CONFIG_NET_DSA_TAG_BRCM_COMMON) += tag_brcm.o
obj-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o
obj-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
obj-$(CONFIG_NET_DSA_TAG_GSWIP) += tag_gswip.o
obj-$(CONFIG_NET_DSA_TAG_HELLCREEK) += tag_hellcreek.o
obj-$(CONFIG_NET_DSA_TAG_KSZ) += tag_ksz.o
obj-$(CONFIG_NET_DSA_TAG_RTL4_A) += tag_rtl4_a.o
obj-$(CONFIG_NET_DSA_TAG_LAN9303) += tag_lan9303.o

12
net/dsa/slave.c
View File

@ -2032,10 +2032,22 @@ static int dsa_slave_netdevice_event(struct notifier_block *nb,
switch (event) {
case NETDEV_PRECHANGEUPPER: {
struct netdev_notifier_changeupper_info *info = ptr;
struct dsa_switch *ds;
struct dsa_port *dp;
int err;
if (!dsa_slave_dev_check(dev))
return dsa_prevent_bridging_8021q_upper(dev, ptr);
dp = dsa_slave_to_port(dev);
ds = dp->ds;
if (ds->ops->port_prechangeupper) {
err = ds->ops->port_prechangeupper(ds, dp->index, info);
if (err)
return notifier_from_errno(err);
}
if (is_vlan_dev(info->upper_dev))
return dsa_slave_check_8021q_upper(dev, ptr);
break;

66
net/dsa/tag_hellcreek.c Normal file
View File

@ -0,0 +1,66 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* net/dsa/tag_hellcreek.c - Hirschmann Hellcreek switch tag format handling
*
* Copyright (C) 2019,2020 Linutronix GmbH
* Author Kurt Kanzenbach <kurt@linutronix.de>
*
* Based on tag_ksz.c.
*/
#include <linux/etherdevice.h>
#include <linux/list.h>
#include <linux/slab.h>
#include <net/dsa.h>
#include "dsa_priv.h"
#define HELLCREEK_TAG_LEN 1
static struct sk_buff *hellcreek_xmit(struct sk_buff *skb,
struct net_device *dev)
{
struct dsa_port *dp = dsa_slave_to_port(dev);
u8 *tag;
/* Tag encoding */
tag = skb_put(skb, HELLCREEK_TAG_LEN);
*tag = BIT(dp->index);
return skb;
}
static struct sk_buff *hellcreek_rcv(struct sk_buff *skb,
struct net_device *dev,
struct packet_type *pt)
{
/* Tag decoding */
u8 *tag = skb_tail_pointer(skb) - HELLCREEK_TAG_LEN;
unsigned int port = tag[0] & 0x03;
skb->dev = dsa_master_find_slave(dev, 0, port);
if (!skb->dev) {
netdev_warn(dev, "Failed to get source port: %d\n", port);
return NULL;
}
pskb_trim_rcsum(skb, skb->len - HELLCREEK_TAG_LEN);
skb->offload_fwd_mark = true;
return skb;
}
static const struct dsa_device_ops hellcreek_netdev_ops = {
.name = "hellcreek",
.proto = DSA_TAG_PROTO_HELLCREEK,
.xmit = hellcreek_xmit,
.rcv = hellcreek_rcv,
.overhead = HELLCREEK_TAG_LEN,
.tail_tag = true,
};
MODULE_LICENSE("Dual MIT/GPL");
MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_HELLCREEK);
module_dsa_tag_driver(hellcreek_netdev_ops);