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scsi: smartpqi: Add support for RAID5 and RAID6 writes
Add in new IU definition and implement support for RAID5 and RAID6 writes. Link: https://lore.kernel.org/r/161549372734.25025.963261942897080281.stgit@brunhilda Reviewed-by: Scott Benesh <scott.benesh@microchip.com> Reviewed-by: Mike McGowen <mike.mcgowen@microchip.com> Reviewed-by: Scott Teel <scott.teel@microchip.com> Reviewed-by: Kevin Barnett <kevin.barnett@microchip.com> Signed-off-by: Don Brace <don.brace@microchip.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Don Brace
Martin K. Petersen
parent
1a22bc4bee
commit
6702d2c40f
@ -257,6 +257,7 @@ struct pqi_device_capability {
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};
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#define PQI_MAX_EMBEDDED_SG_DESCRIPTORS 4
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#define PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS 3
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struct pqi_raid_path_request {
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struct pqi_iu_header header;
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@ -312,6 +313,37 @@ struct pqi_aio_path_request {
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sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS];
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};
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struct pqi_aio_r56_path_request {
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struct pqi_iu_header header;
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__le16 request_id;
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__le16 volume_id; /* ID of the RAID volume */
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__le32 data_it_nexus; /* IT nexus for the data drive */
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__le32 p_parity_it_nexus; /* IT nexus for the P parity drive */
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__le32 q_parity_it_nexus; /* IT nexus for the Q parity drive */
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__le32 data_length; /* total bytes to read/write */
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u8 data_direction : 2;
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u8 partial : 1;
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u8 mem_type : 1; /* 0 = PCIe, 1 = DDR */
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u8 fence : 1;
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u8 encryption_enable : 1;
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u8 reserved : 2;
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u8 task_attribute : 3;
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u8 command_priority : 4;
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u8 reserved1 : 1;
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__le16 data_encryption_key_index;
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u8 cdb[16];
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__le16 error_index;
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u8 num_sg_descriptors;
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u8 cdb_length;
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u8 xor_multiplier;
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u8 reserved2[3];
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__le32 encrypt_tweak_lower;
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__le32 encrypt_tweak_upper;
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__le64 row; /* row = logical LBA/blocks per row */
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u8 reserved3[8];
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struct pqi_sg_descriptor sg_descriptors[PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS];
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};
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struct pqi_io_response {
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struct pqi_iu_header header;
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__le16 request_id;
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@ -484,6 +516,8 @@ struct pqi_raid_error_info {
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#define PQI_REQUEST_IU_TASK_MANAGEMENT 0x13
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#define PQI_REQUEST_IU_RAID_PATH_IO 0x14
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#define PQI_REQUEST_IU_AIO_PATH_IO 0x15
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#define PQI_REQUEST_IU_AIO_PATH_RAID5_IO 0x18
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#define PQI_REQUEST_IU_AIO_PATH_RAID6_IO 0x19
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#define PQI_REQUEST_IU_GENERAL_ADMIN 0x60
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#define PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG 0x72
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#define PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG 0x73
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@ -1179,6 +1213,7 @@ struct pqi_ctrl_info {
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u16 max_inbound_iu_length_per_firmware;
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u16 max_inbound_iu_length;
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unsigned int max_sg_per_iu;
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unsigned int max_sg_per_r56_iu;
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void *admin_queue_memory_base;
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u32 admin_queue_memory_length;
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dma_addr_t admin_queue_memory_base_dma_handle;
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@ -1210,6 +1245,8 @@ struct pqi_ctrl_info {
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u8 soft_reset_handshake_supported : 1;
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u8 raid_iu_timeout_supported: 1;
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u8 tmf_iu_timeout_supported: 1;
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u8 enable_r5_writes : 1;
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u8 enable_r6_writes : 1;
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struct list_head scsi_device_list;
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spinlock_t scsi_device_list_lock;
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@ -67,6 +67,10 @@ static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
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struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
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unsigned int cdb_length, struct pqi_queue_group *queue_group,
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struct pqi_encryption_info *encryption_info, bool raid_bypass);
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static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info,
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struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
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struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
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struct pqi_scsi_dev_raid_map_data *rmd);
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static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info);
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static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info);
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static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info);
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@ -2237,7 +2241,8 @@ static inline void pqi_set_encryption_info(
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* Attempt to perform RAID bypass mapping for a logical volume I/O.
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*/
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static bool pqi_aio_raid_level_supported(struct pqi_scsi_dev_raid_map_data *rmd)
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static bool pqi_aio_raid_level_supported(struct pqi_ctrl_info *ctrl_info,
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struct pqi_scsi_dev_raid_map_data *rmd)
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{
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bool is_supported = true;
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@ -2249,9 +2254,11 @@ static bool pqi_aio_raid_level_supported(struct pqi_scsi_dev_raid_map_data *rmd)
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is_supported = false;
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break;
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case SA_RAID_5:
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fallthrough;
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if (rmd->is_write && !ctrl_info->enable_r5_writes)
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is_supported = false;
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break;
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case SA_RAID_6:
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if (rmd->is_write)
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if (rmd->is_write && !ctrl_info->enable_r6_writes)
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is_supported = false;
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break;
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case SA_RAID_ADM:
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@ -2526,6 +2533,38 @@ static int pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data *rmd,
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rmd->total_disks_per_row)) +
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(rmd->map_row * rmd->total_disks_per_row) + rmd->first_column;
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if (rmd->is_write) {
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u32 index;
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/*
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* p_parity_it_nexus and q_parity_it_nexus are pointers to the
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* parity entries inside the device's raid_map.
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*
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* A device's RAID map is bounded by: number of RAID disks squared.
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*
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* The devices RAID map size is checked during device
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* initialization.
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*/
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index = DIV_ROUND_UP(rmd->map_index + 1, rmd->total_disks_per_row);
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index *= rmd->total_disks_per_row;
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index -= get_unaligned_le16(&raid_map->metadata_disks_per_row);
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rmd->p_parity_it_nexus = raid_map->disk_data[index].aio_handle;
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if (rmd->raid_level == SA_RAID_6) {
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rmd->q_parity_it_nexus = raid_map->disk_data[index + 1].aio_handle;
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rmd->xor_mult = raid_map->disk_data[rmd->map_index].xor_mult[1];
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}
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if (rmd->blocks_per_row == 0)
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return PQI_RAID_BYPASS_INELIGIBLE;
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#if BITS_PER_LONG == 32
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tmpdiv = rmd->first_block;
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do_div(tmpdiv, rmd->blocks_per_row);
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rmd->row = tmpdiv;
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#else
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rmd->row = rmd->first_block / rmd->blocks_per_row;
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#endif
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}
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return 0;
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}
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@ -2567,7 +2606,7 @@ static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
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rmd.raid_level = device->raid_level;
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if (!pqi_aio_raid_level_supported(&rmd))
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if (!pqi_aio_raid_level_supported(ctrl_info, &rmd))
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return PQI_RAID_BYPASS_INELIGIBLE;
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if (unlikely(rmd.block_cnt == 0))
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@ -2587,7 +2626,8 @@ static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
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} else if (device->raid_level == SA_RAID_ADM) {
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rc = pqi_calc_aio_raid_adm(&rmd, device);
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} else if ((device->raid_level == SA_RAID_5 ||
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device->raid_level == SA_RAID_6) && rmd.layout_map_count > 1) {
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device->raid_level == SA_RAID_6) &&
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(rmd.layout_map_count > 1 || rmd.is_write)) {
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rc = pqi_calc_aio_r5_or_r6(&rmd, raid_map);
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if (rc)
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return PQI_RAID_BYPASS_INELIGIBLE;
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@ -2622,9 +2662,27 @@ static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
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encryption_info_ptr = NULL;
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}
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return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle,
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if (rmd.is_write) {
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switch (device->raid_level) {
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case SA_RAID_0:
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return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle,
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rmd.cdb, rmd.cdb_length, queue_group,
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encryption_info_ptr, true);
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case SA_RAID_5:
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case SA_RAID_6:
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return pqi_aio_submit_r56_write_io(ctrl_info, scmd, queue_group,
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encryption_info_ptr, device, &rmd);
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default:
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return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle,
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rmd.cdb, rmd.cdb_length, queue_group,
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encryption_info_ptr, true);
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}
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} else {
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return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle,
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rmd.cdb, rmd.cdb_length, queue_group,
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encryption_info_ptr, true);
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}
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}
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#define PQI_STATUS_IDLE 0x0
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@ -4844,6 +4902,12 @@ static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info)
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PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
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sizeof(struct pqi_sg_descriptor)) +
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PQI_MAX_EMBEDDED_SG_DESCRIPTORS;
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ctrl_info->max_sg_per_r56_iu =
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((ctrl_info->max_inbound_iu_length -
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PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
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sizeof(struct pqi_sg_descriptor)) +
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PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS;
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}
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static inline void pqi_set_sg_descriptor(
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@ -4931,6 +4995,42 @@ out:
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return 0;
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}
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static int pqi_build_aio_r56_sg_list(struct pqi_ctrl_info *ctrl_info,
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struct pqi_aio_r56_path_request *request, struct scsi_cmnd *scmd,
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struct pqi_io_request *io_request)
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{
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u16 iu_length;
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int sg_count;
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bool chained;
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unsigned int num_sg_in_iu;
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struct scatterlist *sg;
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struct pqi_sg_descriptor *sg_descriptor;
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sg_count = scsi_dma_map(scmd);
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if (sg_count < 0)
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return sg_count;
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iu_length = offsetof(struct pqi_aio_r56_path_request, sg_descriptors) -
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PQI_REQUEST_HEADER_LENGTH;
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num_sg_in_iu = 0;
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if (sg_count != 0) {
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sg = scsi_sglist(scmd);
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sg_descriptor = request->sg_descriptors;
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num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
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ctrl_info->max_sg_per_r56_iu, &chained);
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request->partial = chained;
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iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
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}
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put_unaligned_le16(iu_length, &request->header.iu_length);
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request->num_sg_descriptors = num_sg_in_iu;
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return 0;
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}
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static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info,
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struct pqi_aio_path_request *request, struct scsi_cmnd *scmd,
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struct pqi_io_request *io_request)
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@ -5335,6 +5435,71 @@ static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
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return 0;
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}
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static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info,
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struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
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struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
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struct pqi_scsi_dev_raid_map_data *rmd)
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{
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int rc;
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struct pqi_io_request *io_request;
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struct pqi_aio_r56_path_request *r56_request;
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io_request = pqi_alloc_io_request(ctrl_info);
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io_request->io_complete_callback = pqi_aio_io_complete;
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io_request->scmd = scmd;
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io_request->raid_bypass = true;
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r56_request = io_request->iu;
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memset(r56_request, 0, offsetof(struct pqi_aio_r56_path_request, sg_descriptors));
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if (device->raid_level == SA_RAID_5 || device->raid_level == SA_RAID_51)
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r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID5_IO;
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else
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r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID6_IO;
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put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r56_request->volume_id);
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put_unaligned_le32(rmd->aio_handle, &r56_request->data_it_nexus);
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put_unaligned_le32(rmd->p_parity_it_nexus, &r56_request->p_parity_it_nexus);
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if (rmd->raid_level == SA_RAID_6) {
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put_unaligned_le32(rmd->q_parity_it_nexus, &r56_request->q_parity_it_nexus);
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r56_request->xor_multiplier = rmd->xor_mult;
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}
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put_unaligned_le32(scsi_bufflen(scmd), &r56_request->data_length);
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r56_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
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put_unaligned_le64(rmd->row, &r56_request->row);
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put_unaligned_le16(io_request->index, &r56_request->request_id);
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r56_request->error_index = r56_request->request_id;
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if (rmd->cdb_length > sizeof(r56_request->cdb))
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rmd->cdb_length = sizeof(r56_request->cdb);
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r56_request->cdb_length = rmd->cdb_length;
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memcpy(r56_request->cdb, rmd->cdb, rmd->cdb_length);
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/* The direction is always write. */
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r56_request->data_direction = SOP_READ_FLAG;
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if (encryption_info) {
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r56_request->encryption_enable = true;
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put_unaligned_le16(encryption_info->data_encryption_key_index,
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&r56_request->data_encryption_key_index);
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put_unaligned_le32(encryption_info->encrypt_tweak_lower,
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&r56_request->encrypt_tweak_lower);
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put_unaligned_le32(encryption_info->encrypt_tweak_upper,
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&r56_request->encrypt_tweak_upper);
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}
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rc = pqi_build_aio_r56_sg_list(ctrl_info, r56_request, scmd, io_request);
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if (rc) {
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pqi_free_io_request(io_request);
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return SCSI_MLQUEUE_HOST_BUSY;
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}
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pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
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return 0;
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}
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static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info,
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struct scsi_cmnd *scmd)
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{
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@ -6302,6 +6467,60 @@ static ssize_t pqi_lockup_action_store(struct device *dev,
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return -EINVAL;
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}
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static ssize_t pqi_host_enable_r5_writes_show(struct device *dev,
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struct device_attribute *attr, char *buffer)
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{
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struct Scsi_Host *shost = class_to_shost(dev);
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struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
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return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r5_writes);
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}
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static ssize_t pqi_host_enable_r5_writes_store(struct device *dev,
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struct device_attribute *attr, const char *buffer, size_t count)
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{
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struct Scsi_Host *shost = class_to_shost(dev);
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struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
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u8 set_r5_writes = 0;
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if (kstrtou8(buffer, 0, &set_r5_writes))
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return -EINVAL;
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if (set_r5_writes > 0)
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set_r5_writes = 1;
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ctrl_info->enable_r5_writes = set_r5_writes;
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return count;
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}
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static ssize_t pqi_host_enable_r6_writes_show(struct device *dev,
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struct device_attribute *attr, char *buffer)
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{
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struct Scsi_Host *shost = class_to_shost(dev);
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struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
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return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r6_writes);
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}
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static ssize_t pqi_host_enable_r6_writes_store(struct device *dev,
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struct device_attribute *attr, const char *buffer, size_t count)
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{
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struct Scsi_Host *shost = class_to_shost(dev);
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struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
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u8 set_r6_writes = 0;
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if (kstrtou8(buffer, 0, &set_r6_writes))
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return -EINVAL;
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|
||||
if (set_r6_writes > 0)
|
||||
set_r6_writes = 1;
|
||||
|
||||
ctrl_info->enable_r6_writes = set_r6_writes;
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL);
|
||||
static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL);
|
||||
static DEVICE_ATTR(model, 0444, pqi_model_show, NULL);
|
||||
@ -6310,6 +6529,10 @@ static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL);
|
||||
static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store);
|
||||
static DEVICE_ATTR(lockup_action, 0644,
|
||||
pqi_lockup_action_show, pqi_lockup_action_store);
|
||||
static DEVICE_ATTR(enable_r5_writes, 0644,
|
||||
pqi_host_enable_r5_writes_show, pqi_host_enable_r5_writes_store);
|
||||
static DEVICE_ATTR(enable_r6_writes, 0644,
|
||||
pqi_host_enable_r6_writes_show, pqi_host_enable_r6_writes_store);
|
||||
|
||||
static struct device_attribute *pqi_shost_attrs[] = {
|
||||
&dev_attr_driver_version,
|
||||
@ -6319,6 +6542,8 @@ static struct device_attribute *pqi_shost_attrs[] = {
|
||||
&dev_attr_vendor,
|
||||
&dev_attr_rescan,
|
||||
&dev_attr_lockup_action,
|
||||
&dev_attr_enable_r5_writes,
|
||||
&dev_attr_enable_r6_writes,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user