dmaengine fixes for v6.10

Driver fixes for:
  - kmemleak, error path handling and missing kmem_cache_destroy() fixes
    for ioatdma driver
  - after use fix for idxd driver
  - data synchronisation fix for xdma isr handling
  - fsl driver channel constraints and linking two fsl module fixes
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Merge tag 'dmaengine-fix-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine fixes from Vinod Koul:

 - kmemleak, error path handling and missing kmem_cache_destroy() fixes
   for ioatdma driver

 - use after free fix for idxd driver

 - data synchronisation fix for xdma isr handling

 - fsl driver channel constraints and linking two fsl module fixes

* tag 'dmaengine-fix-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine:
  dmaengine: ioatdma: Fix missing kmem_cache_destroy()
  dt-bindings: dma: fsl-edma: fix dma-channels constraints
  dmaengine: fsl-edma: avoid linking both modules
  dmaengine: ioatdma: Fix kmemleak in ioat_pci_probe()
  dmaengine: ioatdma: Fix error path in ioat3_dma_probe()
  dmaengine: ioatdma: Fix leaking on version mismatch
  dmaengine: ti: k3-udma-glue: Fix of_k3_udma_glue_parse_chn_by_id()
  dmaengine: idxd: Fix possible Use-After-Free in irq_process_work_list
  dmaengine: xilinx: xdma: Fix data synchronisation in xdma_channel_isr()
This commit is contained in:
Linus Torvalds 2024-06-21 11:07:15 -07:00
commit 66cc544fd7
6 changed files with 39 additions and 35 deletions

View File

@ -59,8 +59,8 @@ properties:
- 3
dma-channels:
minItems: 1
maxItems: 64
minimum: 1
maximum: 64
clocks:
minItems: 1

View File

@ -394,7 +394,7 @@ config LS2X_APB_DMA
config MCF_EDMA
tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
depends on M5441x || COMPILE_TEST
depends on M5441x || (COMPILE_TEST && FSL_EDMA=n)
select DMA_ENGINE
select DMA_VIRTUAL_CHANNELS
help

View File

@ -611,11 +611,13 @@ static void irq_process_work_list(struct idxd_irq_entry *irq_entry)
spin_unlock(&irq_entry->list_lock);
list_for_each_entry(desc, &flist, list) {
list_for_each_entry_safe(desc, n, &flist, list) {
/*
* Check against the original status as ABORT is software defined
* and 0xff, which DSA_COMP_STATUS_MASK can mask out.
*/
list_del(&desc->list);
if (unlikely(desc->completion->status == IDXD_COMP_DESC_ABORT)) {
idxd_desc_complete(desc, IDXD_COMPLETE_ABORT, true);
continue;

View File

@ -534,18 +534,6 @@ err_out:
return err;
}
static int ioat_register(struct ioatdma_device *ioat_dma)
{
int err = dma_async_device_register(&ioat_dma->dma_dev);
if (err) {
ioat_disable_interrupts(ioat_dma);
dma_pool_destroy(ioat_dma->completion_pool);
}
return err;
}
static void ioat_dma_remove(struct ioatdma_device *ioat_dma)
{
struct dma_device *dma = &ioat_dma->dma_dev;
@ -1181,9 +1169,9 @@ static int ioat3_dma_probe(struct ioatdma_device *ioat_dma, int dca)
ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
}
err = ioat_register(ioat_dma);
err = dma_async_device_register(&ioat_dma->dma_dev);
if (err)
return err;
goto err_disable_interrupts;
ioat_kobject_add(ioat_dma, &ioat_ktype);
@ -1192,20 +1180,29 @@ static int ioat3_dma_probe(struct ioatdma_device *ioat_dma, int dca)
/* disable relaxed ordering */
err = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &val16);
if (err)
return pcibios_err_to_errno(err);
if (err) {
err = pcibios_err_to_errno(err);
goto err_disable_interrupts;
}
/* clear relaxed ordering enable */
val16 &= ~PCI_EXP_DEVCTL_RELAX_EN;
err = pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, val16);
if (err)
return pcibios_err_to_errno(err);
if (err) {
err = pcibios_err_to_errno(err);
goto err_disable_interrupts;
}
if (ioat_dma->cap & IOAT_CAP_DPS)
writeb(ioat_pending_level + 1,
ioat_dma->reg_base + IOAT_PREFETCH_LIMIT_OFFSET);
return 0;
err_disable_interrupts:
ioat_disable_interrupts(ioat_dma);
dma_pool_destroy(ioat_dma->completion_pool);
return err;
}
static void ioat_shutdown(struct pci_dev *pdev)
@ -1350,6 +1347,8 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
void __iomem * const *iomap;
struct device *dev = &pdev->dev;
struct ioatdma_device *device;
unsigned int i;
u8 version;
int err;
err = pcim_enable_device(pdev);
@ -1363,6 +1362,10 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if (!iomap)
return -ENOMEM;
version = readb(iomap[IOAT_MMIO_BAR] + IOAT_VER_OFFSET);
if (version < IOAT_VER_3_0)
return -ENODEV;
err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
if (err)
return err;
@ -1373,17 +1376,18 @@ static int ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
pci_set_master(pdev);
pci_set_drvdata(pdev, device);
device->version = readb(device->reg_base + IOAT_VER_OFFSET);
device->version = version;
if (device->version >= IOAT_VER_3_4)
ioat_dca_enabled = 0;
if (device->version >= IOAT_VER_3_0) {
if (is_skx_ioat(pdev))
device->version = IOAT_VER_3_2;
err = ioat3_dma_probe(device, ioat_dca_enabled);
} else
return -ENODEV;
if (is_skx_ioat(pdev))
device->version = IOAT_VER_3_2;
err = ioat3_dma_probe(device, ioat_dca_enabled);
if (err) {
for (i = 0; i < IOAT_MAX_CHANS; i++)
kfree(device->idx[i]);
kfree(device);
dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n");
return -ENODEV;
}
@ -1445,6 +1449,7 @@ module_init(ioat_init_module);
static void __exit ioat_exit_module(void)
{
pci_unregister_driver(&ioat_pci_driver);
kmem_cache_destroy(ioat_sed_cache);
kmem_cache_destroy(ioat_cache);
}
module_exit(ioat_exit_module);

View File

@ -200,12 +200,9 @@ of_k3_udma_glue_parse_chn_by_id(struct device_node *udmax_np, struct k3_udma_glu
ret = of_k3_udma_glue_parse(udmax_np, common);
if (ret)
goto out_put_spec;
return ret;
ret = of_k3_udma_glue_parse_chn_common(common, thread_id, tx_chn);
out_put_spec:
of_node_put(udmax_np);
return ret;
}

View File

@ -885,11 +885,11 @@ static irqreturn_t xdma_channel_isr(int irq, void *dev_id)
u32 st;
bool repeat_tx;
spin_lock(&xchan->vchan.lock);
if (xchan->stop_requested)
complete(&xchan->last_interrupt);
spin_lock(&xchan->vchan.lock);
/* get submitted request */
vd = vchan_next_desc(&xchan->vchan);
if (!vd)