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arm64: dts: zii-ultra: add sound support

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This adds all the necessary nodes to get audio support on both the
RMB3 and Zest boards.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Lucas Stach 2021-01-25 19:47:32 +01:00 committed by Shawn Guo
parent 837ae08d95
commit 663a5b5efa
3 changed files with 219 additions and 0 deletions
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91
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dts
View File

@ -10,6 +10,56 @@
/ {
model = "ZII Ultra RMB3 Board";
compatible = "zii,imx8mq-ultra-rmb3", "zii,imx8mq-ultra", "fsl,imx8mq";
sound1 {
compatible = "simple-audio-card";
simple-audio-card,name = "front";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound1_codec>;
simple-audio-card,frame-master = <&sound1_codec>;
simple-audio-card,widgets =
"Headphone", "Headphone Jack Front";
simple-audio-card,routing =
"Headphone Jack Front", "HPA1 HPLEFT",
"Headphone Jack Front", "HPA1 HPRIGHT",
"HPA1 LEFTIN", "HPL",
"HPA1 RIGHTIN", "HPR";
simple-audio-card,aux-devs = <&hpa1>;
sound1_cpu: simple-audio-card,cpu {
sound-dai = <&sai2>;
};
sound1_codec: simple-audio-card,codec {
sound-dai = <&codec1>;
clocks = <&cs2000>;
};
};
sound2 {
compatible = "simple-audio-card";
simple-audio-card,name = "periph";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound2_codec>;
simple-audio-card,frame-master = <&sound2_codec>;
simple-audio-card,widgets =
"Headphone", "Headphone Jack Back";
simple-audio-card,routing =
"Headphone Jack Back", "HPA1 HPLEFT",
"Headphone Jack Back", "HPA1 HPRIGHT",
"HPA1 LEFTIN", "HPL",
"HPA1 RIGHTIN", "HPR";
simple-audio-card,aux-devs = <&hpa2>;
sound2_cpu: simple-audio-card,cpu {
sound-dai = <&sai3>;
};
sound2_codec: simple-audio-card,codec {
sound-dai = <&codec2>;
clocks = <&cs2000>;
};
};
};
&ecspi1 {
@ -27,6 +77,27 @@
};
};
&hpa2 {
sound-name-prefix = "HPA1";
};
&i2c1 {
codec2: codec@18 {
compatible = "ti,tlv320dac3100";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_codec2>;
reg = <0x18>;
#sound-dai-cells = <0>;
HPVDD-supply = <&reg_3p3v>;
SPRVDD-supply = <&reg_3p3v>;
SPLVDD-supply = <&reg_3p3v>;
AVDD-supply = <&reg_3p3v>;
IOVDD-supply = <&reg_3p3v>;
DVDD-supply = <&vgen4_reg>;
reset-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
};
};
&i2c2 {
temp-sense@48 {
compatible = "national,lm75";
@ -79,11 +150,23 @@
};
};
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
status = "okay";
};
&usbhub {
swap-dx-lanes = <0>;
};
&iomuxc {
pinctrl_codec2: dac2grp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x41
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
@ -92,4 +175,12 @@
MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x82
>;
};
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MQ_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
MX8MQ_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
MX8MQ_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
>;
};
};

30
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dts
View File

@ -10,6 +10,36 @@
/ {
model = "ZII Ultra Zest Board";
compatible = "zii,imx8mq-ultra-zest", "zii,imx8mq-ultra", "fsl,imx8mq";
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "front";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_codec>;
simple-audio-card,frame-master = <&sound_codec>;
simple-audio-card,widgets =
"Headphone", "Headphone Jack Front",
"Headphone", "Headphone Jack Back";
simple-audio-card,routing =
"Headphone Jack Front", "HPA1 HPLEFT",
"Headphone Jack Front", "HPA1 HPRIGHT",
"Headphone Jack Back", "HPA2 HPLEFT",
"Headphone Jack Back", "HPA2 HPRIGHT",
"HPA1 LEFTIN", "HPL",
"HPA1 RIGHTIN", "HPR",
"HPA2 LEFTIN", "HPL",
"HPA2 RIGHTIN", "HPR";
simple-audio-card,aux-devs = <&hpa1>, <&hpa2>;
sound_cpu: simple-audio-card,cpu {
sound-dai = <&sai2>;
};
sound_codec: simple-audio-card,codec {
sound-dai = <&codec1>;
clocks = <&cs2000>;
};
};
};
&i2c4 {

98
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi
View File

@ -77,6 +77,15 @@
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
vin-supply = <&reg_3p3_main>;
regulator-name = "GEN_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usdhc2_vmmc: regulator-vsd-3v3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usdhc2>;
@ -102,6 +111,18 @@
900000 0x0>;
regulator-always-on;
};
cs2000_ref: cs2000-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
cs2000_in_dummy: cs2000-in-dummy {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
};
&A53_0 {
@ -286,6 +307,16 @@
<18 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "a_det", "alert";
};
hpa2: amp@60 {
compatible = "ti,tpa6130a2";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpa2>;
reg = <0x60>;
power-gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
Vdd-supply = <&reg_5p0_main>;
sound-name-prefix = "HPA2";
};
};
&i2c2 {
@ -378,11 +409,36 @@
};
};
codec1: codec@18 {
compatible = "ti,tlv320dac3100";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_codec1>;
reg = <0x18>;
#sound-dai-cells = <0>;
HPVDD-supply = <&reg_3p3v>;
SPRVDD-supply = <&reg_3p3v>;
SPLVDD-supply = <&reg_3p3v>;
AVDD-supply = <&reg_3p3v>;
IOVDD-supply = <&reg_3p3v>;
DVDD-supply = <&vgen4_reg>;
reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
};
eeprom@54 {
compatible = "atmel,24c128";
reg = <0x54>;
};
hpa1: amp@60 {
compatible = "ti,tpa6130a2";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpa1>;
reg = <0x60>;
power-gpio = <&gpio4 10 GPIO_ACTIVE_HIGH>;
Vdd-supply = <&reg_5p0_main>;
sound-name-prefix = "HPA1";
};
ds1341: rtc@68 {
compatible = "dallas,ds1341";
reg = <0x68>;
@ -407,6 +463,16 @@
compatible = "zii,rave-wdt";
reg = <0x38>;
};
cs2000: clkgen@4e {
compatible = "cirrus,cs2000-cp";
reg = <0x4e>;
#clock-cells = <0>;
clock-names = "clk_in", "ref_clk";
clocks = <&cs2000_in_dummy>, <&cs2000_ref>;
assigned-clocks = <&cs2000>;
assigned-clock-rates = <24000000>;
};
};
&i2c4 {
@ -416,6 +482,12 @@
status = "okay";
};
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
@ -551,6 +623,12 @@
>;
};
pinctrl_codec1: dac1grp {
fsl,pins = <
MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x41
>;
};
pinctrl_fec1: fec1grp {
fsl,pins = <
MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC 0x3
@ -642,12 +720,32 @@
>;
};
pinctrl_sai2: sai2grp {
fsl,pins = <
MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
>;
};
pinctrl_switch_irq: switchgrp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x41
>;
};
pinctrl_tpa1: tpa6130-1grp {
fsl,pins = <
MX8MQ_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x41
>;
};
pinctrl_tpa2: tpa6130-2grp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x41
>;
};
pinctrl_ts: tsgrp {
fsl,pins = <
MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x96