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ARM: OMAP: Add flag to indicate if a timer needs a manual reset
For OMAP1 devices, it is necessary to perform a manual reset of the timer. Currently, this is indicating by setting the "needs_manual_reset" variable in the platform data. Instead of using an extra variable to indicate this add a new timer capabilities flag to indicate this and remove the "needs_manual_reset" member from the platform data. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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0b30ec1cb7
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@ -140,8 +140,8 @@ static int __init omap1_dm_timer_init(void)
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}
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pdata->set_timer_src = omap1_dm_timer_set_src;
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pdata->needs_manual_reset = 1;
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pdata->timer_capability = OMAP_TIMER_ALWON;
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pdata->timer_capability = OMAP_TIMER_ALWON |
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OMAP_TIMER_NEEDS_RESET;
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ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
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if (ret) {
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@ -135,7 +135,6 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
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int omap_dm_timer_prepare(struct omap_dm_timer *timer)
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{
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struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
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int ret;
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timer->fclk = clk_get(&timer->pdev->dev, "fck");
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@ -145,7 +144,7 @@ int omap_dm_timer_prepare(struct omap_dm_timer *timer)
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return -EINVAL;
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}
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if (pdata->needs_manual_reset)
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if (timer->capability & OMAP_TIMER_NEEDS_RESET)
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omap_dm_timer_reset(timer);
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ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
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@ -363,13 +362,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start);
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int omap_dm_timer_stop(struct omap_dm_timer *timer)
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{
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unsigned long rate = 0;
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struct dmtimer_platform_data *pdata;
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if (unlikely(!timer))
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return -EINVAL;
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pdata = timer->pdev->dev.platform_data;
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if (!pdata->needs_manual_reset)
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if (!(timer->capability & OMAP_TIMER_NEEDS_RESET))
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rate = clk_get_rate(timer->fclk);
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__omap_dm_timer_stop(timer, timer->posted, rate);
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@ -694,7 +691,7 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
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timer->capability = pdata->timer_capability;
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/* Skip pm_runtime_enable for OMAP1 */
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if (!pdata->needs_manual_reset) {
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if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
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pm_runtime_enable(&pdev->dev);
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pm_runtime_irq_safe(&pdev->dev);
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}
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@ -59,6 +59,7 @@
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#define OMAP_TIMER_SECURE 0x80000000
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#define OMAP_TIMER_ALWON 0x40000000
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#define OMAP_TIMER_HAS_PWM 0x20000000
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#define OMAP_TIMER_NEEDS_RESET 0x10000000
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struct omap_timer_capability_dev_attr {
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u32 timer_capability;
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@ -90,7 +91,6 @@ struct timer_regs {
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struct dmtimer_platform_data {
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int (*set_timer_src)(struct platform_device *pdev, int source);
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u32 needs_manual_reset:1;
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u32 timer_capability;
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};
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