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STM32 DT updates for v4.21, round 1
Highlights: ---------- -MPU STM32MP157 platform update: -Declare DMAs for timers -Add sleep support for CAN -Split CAN RAM mapping between the 2 FDCAN instances -Add support of thermal sensor (DTS) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcBQ9HAAoJEH+ayWryHnCFhkIP/2hX4e+FYtqSJOUkSu9LL5tf FmqKnDcA7VWpE2lkWrwv8faYQ/BTJ0v5J6reCUhXntomcOZtCyWv+MllbgANEHrL UWRakenbOe5vSZR5v2SapV0zX/AKZl2o7WUmtnjq1hf9sopeVVVWfLObx8HmwVmA Q8S/7lqqPntapb0JSPGUr8cI3nuXfTHlRl1x8YIq8e0LfKPyF9euprmXtkZ01rwu YTFvBogRJfVMxT9VWqLtEU4DWsluqKobNU6Xq06/cN+81aS3iUaNR1dprMwURoWq yE22y876y2Ytgj5Y2PcxlGO+7w9RbLHEPgF1Gx+yM8Tu4m2jq6V8peVAw4814ow1 ALduE+/iQ/zGUvHkyyIRkl01y03H1OburA/WoTrkbOeppESUMH+mW5rF9rW+kEtR RSoik3YnWKD8pcmKNk4HNNhKRaLmhPDif5EDrF66c5QpMoDlJbnZ2n1pBZJMCboQ ASNF7zWUxbshw+o9TDdbkF0nu/IsRlO+t+CXiTPHJ4WzWVWra+2DAMMnrgjZH62Q 2i6+jRFQdhNmWNhvz4Gspm5v1bptllXjBGlg3TZ9c38l2hVWyTFi03777EJtrj8h b6ZLeK0qfXaBH8Ix/BZ9d6FmVpBntTh/vTNyWCJqywVwO4YA2C/5xBjbL9NH9zFV /GKMyE1fKI9pziO9REu2 =660S -----END PGP SIGNATURE----- Merge tag 'stm32-dt-for-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt STM32 DT updates for v4.21, round 1 Highlights: ---------- -MPU STM32MP157 platform update: -Declare DMAs for timers -Add sleep support for CAN -Split CAN RAM mapping between the 2 FDCAN instances -Add support of thermal sensor (DTS) * tag 'stm32-dt-for-v4.21-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32: add thermal sensor support on STM32MP157c ARM: dts: stm32: add can1 sleep pins muxing on stm32mp157c-ev1 board ARM: dts: stm32: add can1 sleep pins muxing ARM: dts: stm32: change CAN RAM mapping on stm32mp157c ARM: dts: stm32: don't use timers dmas on stm32mp157c-ev1 ARM: dts: stm32: don't use timers dmas on stm32mp157c-ed1 ARM: dts: stm32: Add dmas to timer on stm32mp157c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
6569df3d62
@ -246,6 +246,13 @@
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};
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};
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m_can1_sleep_pins_a: m_can1-sleep@0 {
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pins {
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pinmux = <STM32_PINMUX('H', 13, ANALOG)>, /* CAN1_TX */
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<STM32_PINMUX('I', 9, ANALOG)>; /* CAN1_RX */
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};
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};
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pwm2_pins_a: pwm2-0 {
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pins {
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pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
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@ -72,6 +72,9 @@
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&timers6 {
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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timer@5 {
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status = "okay";
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};
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@ -124,8 +124,9 @@
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};
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&m_can1 {
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pinctrl-names = "default";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&m_can1_pins_a>;
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pinctrl-1 = <&m_can1_sleep_pins_a>;
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status = "okay";
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};
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@ -161,6 +162,9 @@
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};
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&timers2 {
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/* spare dmas for other usage (un-delete to enable pwm capture) */
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "disabled";
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pwm {
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pinctrl-0 = <&pwm2_pins_a>;
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@ -173,6 +177,8 @@
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};
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&timers8 {
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "disabled";
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pwm {
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pinctrl-0 = <&pwm8_pins_a>;
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@ -185,6 +191,8 @@
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};
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&timers12 {
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "disabled";
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pwm {
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pinctrl-0 = <&pwm12_pins_a>;
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@ -84,6 +84,31 @@
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};
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};
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thermal-zones {
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cpu_thermal: cpu-thermal {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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thermal-sensors = <&dts>;
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trips {
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cpu_alert1: cpu-alert1 {
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temperature = <85000>;
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hysteresis = <0>;
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type = "passive";
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};
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cpu-crit {
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temperature = <120000>;
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hysteresis = <0>;
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type = "critical";
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};
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};
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cooling-maps {
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};
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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@ -98,6 +123,12 @@
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reg = <0x40000000 0x400>;
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clocks = <&rcc TIM2_K>;
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clock-names = "int";
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dmas = <&dmamux1 18 0x400 0x1>,
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<&dmamux1 19 0x400 0x1>,
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<&dmamux1 20 0x400 0x1>,
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<&dmamux1 21 0x400 0x1>,
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<&dmamux1 22 0x400 0x1>;
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dma-names = "ch1", "ch2", "ch3", "ch4", "up";
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status = "disabled";
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pwm {
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@ -119,6 +150,13 @@
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reg = <0x40001000 0x400>;
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clocks = <&rcc TIM3_K>;
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clock-names = "int";
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dmas = <&dmamux1 23 0x400 0x1>,
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<&dmamux1 24 0x400 0x1>,
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<&dmamux1 25 0x400 0x1>,
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<&dmamux1 26 0x400 0x1>,
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<&dmamux1 27 0x400 0x1>,
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<&dmamux1 28 0x400 0x1>;
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dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
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status = "disabled";
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pwm {
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@ -140,6 +178,11 @@
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reg = <0x40002000 0x400>;
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clocks = <&rcc TIM4_K>;
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clock-names = "int";
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dmas = <&dmamux1 29 0x400 0x1>,
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<&dmamux1 30 0x400 0x1>,
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<&dmamux1 31 0x400 0x1>,
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<&dmamux1 32 0x400 0x1>;
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dma-names = "ch1", "ch2", "ch3", "ch4";
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status = "disabled";
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pwm {
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@ -161,6 +204,13 @@
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reg = <0x40003000 0x400>;
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clocks = <&rcc TIM5_K>;
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clock-names = "int";
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dmas = <&dmamux1 55 0x400 0x1>,
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<&dmamux1 56 0x400 0x1>,
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<&dmamux1 57 0x400 0x1>,
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<&dmamux1 58 0x400 0x1>,
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<&dmamux1 59 0x400 0x1>,
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<&dmamux1 60 0x400 0x1>;
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dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
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status = "disabled";
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pwm {
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@ -182,6 +232,8 @@
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reg = <0x40004000 0x400>;
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clocks = <&rcc TIM6_K>;
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clock-names = "int";
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dmas = <&dmamux1 69 0x400 0x1>;
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dma-names = "up";
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status = "disabled";
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timer@5 {
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@ -198,6 +250,8 @@
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reg = <0x40005000 0x400>;
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clocks = <&rcc TIM7_K>;
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clock-names = "int";
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dmas = <&dmamux1 70 0x400 0x1>;
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dma-names = "up";
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status = "disabled";
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timer@6 {
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@ -465,6 +519,15 @@
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reg = <0x44000000 0x400>;
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clocks = <&rcc TIM1_K>;
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clock-names = "int";
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dmas = <&dmamux1 11 0x400 0x1>,
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<&dmamux1 12 0x400 0x1>,
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<&dmamux1 13 0x400 0x1>,
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<&dmamux1 14 0x400 0x1>,
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<&dmamux1 15 0x400 0x1>,
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<&dmamux1 16 0x400 0x1>,
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<&dmamux1 17 0x400 0x1>;
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dma-names = "ch1", "ch2", "ch3", "ch4",
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"up", "trig", "com";
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status = "disabled";
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pwm {
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@ -486,6 +549,15 @@
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reg = <0x44001000 0x400>;
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clocks = <&rcc TIM8_K>;
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clock-names = "int";
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dmas = <&dmamux1 47 0x400 0x1>,
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<&dmamux1 48 0x400 0x1>,
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<&dmamux1 49 0x400 0x1>,
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<&dmamux1 50 0x400 0x1>,
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<&dmamux1 51 0x400 0x1>,
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<&dmamux1 52 0x400 0x1>,
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<&dmamux1 53 0x400 0x1>;
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dma-names = "ch1", "ch2", "ch3", "ch4",
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"up", "trig", "com";
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status = "disabled";
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pwm {
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@ -543,6 +615,11 @@
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reg = <0x44006000 0x400>;
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clocks = <&rcc TIM15_K>;
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clock-names = "int";
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dmas = <&dmamux1 105 0x400 0x1>,
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<&dmamux1 106 0x400 0x1>,
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<&dmamux1 107 0x400 0x1>,
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<&dmamux1 108 0x400 0x1>;
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dma-names = "ch1", "up", "trig", "com";
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status = "disabled";
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pwm {
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@ -564,6 +641,9 @@
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reg = <0x44007000 0x400>;
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clocks = <&rcc TIM16_K>;
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clock-names = "int";
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dmas = <&dmamux1 109 0x400 0x1>,
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<&dmamux1 110 0x400 0x1>;
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dma-names = "ch1", "up";
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status = "disabled";
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pwm {
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@ -584,6 +664,9 @@
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reg = <0x44008000 0x400>;
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clocks = <&rcc TIM17_K>;
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clock-names = "int";
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dmas = <&dmamux1 111 0x400 0x1>,
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<&dmamux1 112 0x400 0x1>;
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dma-names = "ch1", "up";
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status = "disabled";
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pwm {
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@ -684,14 +767,14 @@
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m_can1: can@4400e000 {
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compatible = "bosch,m_can";
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reg = <0x4400e000 0x400>, <0x44011000 0x2800>;
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reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
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reg-names = "m_can", "message_ram";
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interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "int0", "int1";
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clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
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clock-names = "hclk", "cclk";
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bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
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bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
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status = "disabled";
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};
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@ -908,6 +991,16 @@
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status = "disabled";
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};
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dts: thermal@50028000 {
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compatible = "st,stm32-thermal";
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reg = <0x50028000 0x100>;
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interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&rcc TMPSENS>;
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clock-names = "pclk";
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#thermal-sensor-cells = <0>;
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status = "disabled";
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};
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cryp1: cryp@54001000 {
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compatible = "st,stm32mp1-cryp";
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reg = <0x54001000 0x400>;
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