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synced 2024-11-11 04:18:39 +08:00
spi: Header and core clean up and refactoring
Merge series from Andy Shevchenko <andriy.shevchenko@linux.intel.com>: Various cleanups and refactorings of the SPI header and core parts united in a single series. It also touches drivers under SPI subsystem folder on the pure renaming purposes of some constants. No functional change intended.
This commit is contained in:
Mark Brown
commit
64a7b0e081
@ -404,7 +404,7 @@ static int amd_spi_probe(struct platform_device *pdev)
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master->bus_num = 0;
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master->num_chipselect = 4;
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master->mode_bits = 0;
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master->flags = SPI_MASTER_HALF_DUPLEX;
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->max_speed_hz = AMD_SPI_MAX_HZ;
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master->min_speed_hz = AMD_SPI_MIN_HZ;
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master->setup = amd_spi_master_setup;
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@ -527,7 +527,7 @@ static int at91_usart_spi_probe(struct platform_device *pdev)
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controller->dev.of_node = pdev->dev.parent->of_node;
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controller->bits_per_word_mask = SPI_BPW_MASK(8);
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controller->setup = at91_usart_spi_setup;
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controller->flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX;
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controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX;
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controller->transfer_one = at91_usart_spi_transfer_one;
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controller->prepare_message = at91_usart_spi_prepare_message;
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controller->unprepare_message = at91_usart_spi_unprepare_message;
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@ -185,7 +185,7 @@ static int ath79_spi_probe(struct platform_device *pdev)
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host->use_gpio_descriptors = true;
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
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host->flags = SPI_MASTER_GPIO_SS;
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host->flags = SPI_CONTROLLER_GPIO_SS;
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host->num_chipselect = 3;
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host->mem_ops = &ath79_mem_ops;
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@ -1471,8 +1471,8 @@ static int atmel_spi_probe(struct platform_device *pdev)
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host->bus_num = pdev->id;
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host->num_chipselect = 4;
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host->setup = atmel_spi_setup;
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host->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX |
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SPI_MASTER_GPIO_SS);
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host->flags = (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX |
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SPI_CONTROLLER_GPIO_SS);
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host->transfer_one = atmel_spi_one_transfer;
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host->set_cs = atmel_spi_set_cs;
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host->cleanup = atmel_spi_cleanup;
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@ -57,7 +57,7 @@ bitbang_txrx_be_cpha0(struct spi_device *spi,
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for (word <<= (32 - bits); likely(bits); bits--) {
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/* setup MSB (to slave) on trailing edge */
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if ((flags & SPI_MASTER_NO_TX) == 0) {
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if ((flags & SPI_CONTROLLER_NO_TX) == 0) {
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if ((word & (1 << 31)) != oldbit) {
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setmosi(spi, word & (1 << 31));
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oldbit = word & (1 << 31);
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@ -70,7 +70,7 @@ bitbang_txrx_be_cpha0(struct spi_device *spi,
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/* sample MSB (from slave) on leading edge */
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word <<= 1;
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if ((flags & SPI_MASTER_NO_RX) == 0)
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if ((flags & SPI_CONTROLLER_NO_RX) == 0)
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word |= getmiso(spi);
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setsck(spi, cpol);
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}
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@ -90,7 +90,7 @@ bitbang_txrx_be_cpha1(struct spi_device *spi,
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/* setup MSB (to slave) on leading edge */
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setsck(spi, !cpol);
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if ((flags & SPI_MASTER_NO_TX) == 0) {
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if ((flags & SPI_CONTROLLER_NO_TX) == 0) {
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if ((word & (1 << 31)) != oldbit) {
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setmosi(spi, word & (1 << 31));
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oldbit = word & (1 << 31);
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@ -103,7 +103,7 @@ bitbang_txrx_be_cpha1(struct spi_device *spi,
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/* sample MSB (from slave) on trailing edge */
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word <<= 1;
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if ((flags & SPI_MASTER_NO_RX) == 0)
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if ((flags & SPI_CONTROLLER_NO_RX) == 0)
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word |= getmiso(spi);
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}
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return word;
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@ -122,7 +122,7 @@ bitbang_txrx_le_cpha0(struct spi_device *spi,
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for (; likely(bits); bits--) {
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/* setup LSB (to slave) on trailing edge */
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if ((flags & SPI_MASTER_NO_TX) == 0) {
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if ((flags & SPI_CONTROLLER_NO_TX) == 0) {
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if ((word & 1) != oldbit) {
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setmosi(spi, word & 1);
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oldbit = word & 1;
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@ -135,7 +135,7 @@ bitbang_txrx_le_cpha0(struct spi_device *spi,
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/* sample LSB (from slave) on leading edge */
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word >>= 1;
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if ((flags & SPI_MASTER_NO_RX) == 0)
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if ((flags & SPI_CONTROLLER_NO_RX) == 0)
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word |= getmiso(spi) << rxbit;
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setsck(spi, cpol);
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}
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@ -156,7 +156,7 @@ bitbang_txrx_le_cpha1(struct spi_device *spi,
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/* setup LSB (to slave) on leading edge */
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setsck(spi, !cpol);
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if ((flags & SPI_MASTER_NO_TX) == 0) {
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if ((flags & SPI_CONTROLLER_NO_TX) == 0) {
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if ((word & 1) != oldbit) {
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setmosi(spi, word & 1);
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oldbit = word & 1;
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@ -169,7 +169,7 @@ bitbang_txrx_le_cpha1(struct spi_device *spi,
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/* sample LSB (from slave) on trailing edge */
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word >>= 1;
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if ((flags & SPI_MASTER_NO_RX) == 0)
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if ((flags & SPI_CONTROLLER_NO_RX) == 0)
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word |= getmiso(spi) << rxbit;
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}
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return word;
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@ -248,7 +248,7 @@ static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t)
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if (spi->mode & SPI_3WIRE) {
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unsigned flags;
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flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX;
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flags = t->tx_buf ? SPI_CONTROLLER_NO_RX : SPI_CONTROLLER_NO_TX;
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return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags);
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}
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return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0);
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@ -349,11 +349,11 @@ int spi_bitbang_init(struct spi_bitbang *bitbang)
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/*
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* We only need the chipselect callback if we are actually using it.
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* If we just use GPIO descriptors, it is surplus. If the
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* SPI_MASTER_GPIO_SS flag is set, we always need to call the
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* SPI_CONTROLLER_GPIO_SS flag is set, we always need to call the
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* driver-specific chipselect routine.
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*/
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custom_cs = (!master->use_gpio_descriptors ||
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(master->flags & SPI_MASTER_GPIO_SS));
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(master->flags & SPI_CONTROLLER_GPIO_SS));
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if (custom_cs && !bitbang->chipselect)
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return -EINVAL;
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@ -371,7 +371,7 @@ int spi_bitbang_init(struct spi_bitbang *bitbang)
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master->transfer_one = spi_bitbang_transfer_one;
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/*
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* When using GPIO descriptors, the ->set_cs() callback doesn't even
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* get called unless SPI_MASTER_GPIO_SS is set.
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* get called unless SPI_CONTROLLER_GPIO_SS is set.
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*/
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if (custom_cs)
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master->set_cs = spi_bitbang_set_cs;
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@ -64,7 +64,7 @@ static int thunderx_spi_probe(struct pci_dev *pdev,
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p->sys_freq = SYS_FREQ_DEFAULT;
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dev_info(dev, "Set system clock to %u\n", p->sys_freq);
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master->flags = SPI_MASTER_HALF_DUPLEX;
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->num_chipselect = 4;
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master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH |
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SPI_LSB_FIRST | SPI_3WIRE;
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@ -930,7 +930,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
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master->bus_num = pdev->id;
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master->num_chipselect = pdata->num_chipselect;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
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master->flags = SPI_MASTER_MUST_RX | SPI_MASTER_GPIO_SS;
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master->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_GPIO_SS;
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master->setup = davinci_spi_setup;
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master->cleanup = davinci_spi_cleanup;
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master->can_dma = davinci_spi_can_dma;
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@ -932,7 +932,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
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if (dws->mem_ops.exec_op)
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master->mem_ops = &dws->mem_ops;
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master->max_speed_hz = dws->max_freq;
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master->flags = SPI_MASTER_GPIO_SS;
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master->flags = SPI_CONTROLLER_GPIO_SS;
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master->auto_runtime_pm = true;
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/* Get default rx sample delay */
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@ -401,7 +401,7 @@ static int falcon_sflash_probe(struct platform_device *pdev)
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priv->master = master;
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master->mode_bits = SPI_MODE_3;
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master->flags = SPI_MASTER_HALF_DUPLEX;
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->setup = falcon_sflash_setup;
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master->transfer_one_message = falcon_sflash_xfer_one;
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master->dev.of_node = pdev->dev.of_node;
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@ -856,7 +856,7 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
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controller->prepare_transfer_hardware = lpspi_prepare_xfer_hardware;
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controller->unprepare_transfer_hardware = lpspi_unprepare_xfer_hardware;
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controller->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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controller->flags = SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX;
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controller->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX;
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controller->dev.of_node = pdev->dev.of_node;
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controller->bus_num = pdev->id;
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controller->num_chipselect = fsl_lpspi->num_cs;
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@ -170,7 +170,7 @@ static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
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/*
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* These functions do not call setmosi or getmiso if respective flag
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* (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
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* (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
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* call when such pin is not present or defined in the controller.
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* A separate set of callbacks is defined to get highest possible
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* speed in the generic case (when both MISO and MOSI lines are
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@ -416,11 +416,11 @@ static int spi_gpio_probe(struct platform_device *pdev)
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if (!spi_gpio->mosi) {
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/* HW configuration without MOSI pin
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*
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* No setting SPI_MASTER_NO_RX here - if there is only
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* No setting SPI_CONTROLLER_NO_RX here - if there is only
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* a MOSI pin connected the host can still do RX by
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* changing the direction of the line.
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*/
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master->flags = SPI_MASTER_NO_TX;
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master->flags = SPI_CONTROLLER_NO_TX;
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}
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master->bus_num = pdev->id;
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@ -434,11 +434,11 @@ static int spi_gpio_probe(struct platform_device *pdev)
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* line, that we need to do on selection. This makes the local
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* callback for chipselect always get called.
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*/
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master->flags |= SPI_MASTER_GPIO_SS;
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master->flags |= SPI_CONTROLLER_GPIO_SS;
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bb->chipselect = spi_gpio_chipselect;
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bb->set_line_direction = spi_gpio_set_direction;
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if (master->flags & SPI_MASTER_NO_TX) {
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if (master->flags & SPI_CONTROLLER_NO_TX) {
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bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
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bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
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bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
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@ -1784,7 +1784,7 @@ static int spi_imx_probe(struct platform_device *pdev)
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if (is_imx51_ecspi(spi_imx) || is_imx53_ecspi(spi_imx)) {
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controller->max_native_cs = 4;
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controller->flags |= SPI_MASTER_GPIO_SS;
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controller->flags |= SPI_CONTROLLER_GPIO_SS;
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}
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spi_imx->spi_drctl = spi_drctl;
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@ -75,14 +75,14 @@ bitbang_txrx_be_cpha0_lsb(struct spi_lp8841_rtc *data,
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for (; likely(bits); bits--) {
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/* setup LSB (to slave) on leading edge */
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if ((flags & SPI_MASTER_NO_TX) == 0)
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if ((flags & SPI_CONTROLLER_NO_TX) == 0)
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setmosi(data, (word & 1));
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usleep_range(usecs, usecs + 1); /* T(setup) */
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/* sample LSB (from slave) on trailing edge */
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word >>= 1;
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if ((flags & SPI_MASTER_NO_RX) == 0)
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if ((flags & SPI_CONTROLLER_NO_RX) == 0)
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word |= (getmiso(data) << 31);
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setsck(data, !cpol);
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@ -113,7 +113,7 @@ spi_lp8841_rtc_transfer_one(struct spi_master *master,
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while (likely(count > 0)) {
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word = *tx++;
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bitbang_txrx_be_cpha0_lsb(data, 1, 0,
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SPI_MASTER_NO_RX, word, 8);
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SPI_CONTROLLER_NO_RX, word, 8);
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count--;
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}
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} else if (rx) {
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@ -121,7 +121,7 @@ spi_lp8841_rtc_transfer_one(struct spi_master *master,
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writeb(data->state, data->iomem);
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while (likely(count > 0)) {
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word = bitbang_txrx_be_cpha0_lsb(data, 1, 0,
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SPI_MASTER_NO_TX, word, 8);
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SPI_CONTROLLER_NO_TX, word, 8);
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*rx++ = word;
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count--;
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}
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@ -191,7 +191,7 @@ spi_lp8841_rtc_probe(struct platform_device *pdev)
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return -ENOMEM;
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platform_set_drvdata(pdev, master);
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master->flags = SPI_MASTER_HALF_DUPLEX;
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->mode_bits = SPI_CS_HIGH | SPI_3WIRE | SPI_LSB_FIRST;
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master->bus_num = pdev->id;
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@ -864,7 +864,7 @@ static int meson_spicc_probe(struct platform_device *pdev)
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SPI_BPW_MASK(24) |
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SPI_BPW_MASK(16) |
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SPI_BPW_MASK(8);
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master->flags = (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX);
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master->flags = (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX);
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master->min_speed_hz = spicc->data->min_speed_hz;
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master->max_speed_hz = spicc->data->max_speed_hz;
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master->setup = meson_spicc_setup;
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@ -1142,7 +1142,7 @@ static int mtk_spi_probe(struct platform_device *pdev)
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master->mode_bits |= SPI_CS_HIGH;
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if (mdata->dev_comp->must_tx)
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master->flags = SPI_MASTER_MUST_TX;
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master->flags = SPI_CONTROLLER_MUST_TX;
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if (mdata->dev_comp->ipm_design)
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master->mode_bits |= SPI_LOOP | SPI_RX_DUAL | SPI_TX_DUAL |
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SPI_RX_QUAD | SPI_TX_QUAD;
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@ -572,7 +572,7 @@ static int mxs_spi_probe(struct platform_device *pdev)
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master->mode_bits = SPI_CPOL | SPI_CPHA;
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master->num_chipselect = 3;
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master->dev.of_node = np;
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master->flags = SPI_MASTER_HALF_DUPLEX;
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->auto_runtime_pm = true;
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spi = spi_master_get_devdata(master);
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@ -486,7 +486,7 @@ static int uwire_probe(struct platform_device *pdev)
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/* the spi->mode bits understood by this driver: */
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
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master->flags = SPI_MASTER_HALF_DUPLEX;
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->bus_num = 2; /* "official" */
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master->num_chipselect = 4;
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@ -677,7 +677,7 @@ static int orion_spi_probe(struct platform_device *pdev)
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master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
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master->auto_runtime_pm = true;
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master->use_gpio_descriptors = true;
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master->flags = SPI_MASTER_GPIO_SS;
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master->flags = SPI_CONTROLLER_GPIO_SS;
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platform_set_drvdata(pdev, master);
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@ -365,7 +365,7 @@ static int pci1xxxx_spi_probe(struct pci_dev *pdev, const struct pci_device_id *
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spi_host->bits_per_word_mask = SPI_BPW_MASK(8);
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spi_host->max_speed_hz = PCI1XXXX_SPI_MAX_CLOCK_HZ;
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spi_host->min_speed_hz = PCI1XXXX_SPI_MIN_CLOCK_HZ;
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spi_host->flags = SPI_MASTER_MUST_TX;
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spi_host->flags = SPI_CONTROLLER_MUST_TX;
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spi_master_set_devdata(spi_host, spi_sub_ptr);
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ret = devm_spi_register_master(dev, spi_host);
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if (ret)
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@ -648,7 +648,7 @@ static int pic32_sqi_probe(struct platform_device *pdev)
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master->dev.of_node = pdev->dev.of_node;
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master->mode_bits = SPI_MODE_3 | SPI_MODE_0 | SPI_TX_DUAL |
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SPI_RX_DUAL | SPI_TX_QUAD | SPI_RX_QUAD;
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master->flags = SPI_MASTER_HALF_DUPLEX;
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->can_dma = pic32_sqi_can_dma;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
|
||||
master->transfer_one_message = pic32_sqi_one_message;
|
||||
|
||||
@ -773,7 +773,7 @@ static int pic32_spi_probe(struct platform_device *pdev)
|
||||
master->max_speed_hz = clk_get_rate(pic32s->clk);
|
||||
master->setup = pic32_spi_setup;
|
||||
master->cleanup = pic32_spi_cleanup;
|
||||
master->flags = SPI_MASTER_MUST_TX | SPI_MASTER_MUST_RX;
|
||||
master->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_MUST_RX;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16) |
|
||||
SPI_BPW_MASK(32);
|
||||
master->transfer_one = pic32_spi_one_transfer;
|
||||
|
||||
@ -724,7 +724,7 @@ static int qcom_qspi_probe(struct platform_device *pdev)
|
||||
master->mode_bits = SPI_MODE_0 |
|
||||
SPI_TX_DUAL | SPI_RX_DUAL |
|
||||
SPI_TX_QUAD | SPI_RX_QUAD;
|
||||
master->flags = SPI_MASTER_HALF_DUPLEX;
|
||||
master->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
master->prepare_message = qcom_qspi_prepare_message;
|
||||
master->transfer_one = qcom_qspi_transfer_one;
|
||||
master->handle_err = qcom_qspi_handle_err;
|
||||
|
||||
@ -156,7 +156,7 @@ static int rb4xx_spi_probe(struct platform_device *pdev)
|
||||
master->num_chipselect = 3;
|
||||
master->mode_bits = SPI_TX_DUAL;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
master->flags = SPI_MASTER_MUST_TX;
|
||||
master->flags = SPI_CONTROLLER_MUST_TX;
|
||||
master->transfer_one = rb4xx_transfer_one;
|
||||
master->set_cs = rb4xx_set_cs;
|
||||
|
||||
|
||||
@ -565,7 +565,7 @@ static int rockchip_sfc_probe(struct platform_device *pdev)
|
||||
if (!master)
|
||||
return -ENOMEM;
|
||||
|
||||
master->flags = SPI_MASTER_HALF_DUPLEX;
|
||||
master->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
master->mem_ops = &rockchip_sfc_mem_ops;
|
||||
master->dev.of_node = pdev->dev.of_node;
|
||||
master->mode_bits = SPI_TX_QUAD | SPI_TX_DUAL | SPI_RX_QUAD | SPI_RX_DUAL;
|
||||
|
||||
@ -858,7 +858,7 @@ static int rockchip_spi_probe(struct platform_device *pdev)
|
||||
ctlr->mode_bits |= SPI_NO_CS;
|
||||
ctlr->slave_abort = rockchip_spi_slave_abort;
|
||||
} else {
|
||||
ctlr->flags = SPI_MASTER_GPIO_SS;
|
||||
ctlr->flags = SPI_CONTROLLER_GPIO_SS;
|
||||
ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM;
|
||||
/*
|
||||
* rk spi0 has two native cs, spi1..5 one cs only
|
||||
|
||||
@ -379,7 +379,7 @@ static int sifive_spi_probe(struct platform_device *pdev)
|
||||
* we need to "left-align" the bits (unless SPI_LSB_FIRST)
|
||||
*/
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
master->flags = SPI_CONTROLLER_MUST_TX | SPI_MASTER_GPIO_SS;
|
||||
master->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_GPIO_SS;
|
||||
master->prepare_message = sifive_spi_prepare_message;
|
||||
master->set_cs = sifive_spi_set_cs;
|
||||
master->transfer_one = sifive_spi_transfer_one;
|
||||
|
||||
@ -414,7 +414,7 @@ static int mtk_spi_slave_probe(struct platform_device *pdev)
|
||||
mdata->dev_comp = of_id->data;
|
||||
|
||||
if (mdata->dev_comp->must_rx)
|
||||
ctlr->flags = SPI_MASTER_MUST_RX;
|
||||
ctlr->flags = SPI_CONTROLLER_MUST_RX;
|
||||
|
||||
platform_set_drvdata(pdev, ctlr);
|
||||
|
||||
|
||||
@ -580,7 +580,7 @@ static int sprd_adi_probe(struct platform_device *pdev)
|
||||
ctlr->dev.of_node = pdev->dev.of_node;
|
||||
ctlr->bus_num = pdev->id;
|
||||
ctlr->num_chipselect = num_chipselect;
|
||||
ctlr->flags = SPI_MASTER_HALF_DUPLEX;
|
||||
ctlr->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
ctlr->bits_per_word_mask = 0;
|
||||
ctlr->transfer_one = sprd_adi_transfer_one;
|
||||
|
||||
|
||||
@ -1753,7 +1753,7 @@ static const struct stm32_spi_cfg stm32f4_spi_cfg = {
|
||||
.baud_rate_div_max = STM32F4_SPI_BR_DIV_MAX,
|
||||
.has_fifo = false,
|
||||
.has_device_mode = false,
|
||||
.flags = SPI_MASTER_MUST_TX,
|
||||
.flags = SPI_CONTROLLER_MUST_TX,
|
||||
};
|
||||
|
||||
static const struct stm32_spi_cfg stm32h7_spi_cfg = {
|
||||
|
||||
@ -770,7 +770,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
|
||||
|
||||
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD;
|
||||
|
||||
master->flags = SPI_MASTER_HALF_DUPLEX;
|
||||
master->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
master->setup = ti_qspi_setup;
|
||||
master->auto_runtime_pm = true;
|
||||
master->transfer_one_message = ti_qspi_start_transfer_one;
|
||||
|
||||
@ -218,7 +218,7 @@ static int spi_xcomm_probe(struct i2c_client *i2c)
|
||||
master->num_chipselect = 16;
|
||||
master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_3WIRE;
|
||||
master->bits_per_word_mask = SPI_BPW_MASK(8);
|
||||
master->flags = SPI_MASTER_HALF_DUPLEX;
|
||||
master->flags = SPI_CONTROLLER_HALF_DUPLEX;
|
||||
master->transfer_one_message = spi_xcomm_transfer_one;
|
||||
master->dev.of_node = i2c->dev.of_node;
|
||||
i2c_set_clientdata(i2c, master);
|
||||
|
||||
@ -87,7 +87,7 @@ static int xtfpga_spi_probe(struct platform_device *pdev)
|
||||
if (!master)
|
||||
return -ENOMEM;
|
||||
|
||||
master->flags = SPI_MASTER_NO_RX;
|
||||
master->flags = SPI_CONTROLLER_NO_RX;
|
||||
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
|
||||
master->bus_num = pdev->dev.id;
|
||||
master->dev.of_node = pdev->dev.of_node;
|
||||
|
||||
@ -4,36 +4,36 @@
|
||||
// Copyright (C) 2005 David Brownell
|
||||
// Copyright (C) 2008 Secret Lab Technologies Ltd.
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/cache.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/clk/clk-conf.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/dmaengine.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
#include <linux/highmem.h>
|
||||
#include <linux/idr.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <linux/clk/clk-conf.h>
|
||||
#include <linux/percpu.h>
|
||||
#include <linux/platform_data/x86/apple.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/ptp_clock_kernel.h>
|
||||
#include <linux/sched/rt.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/spi-mem.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/pm_domain.h>
|
||||
#include <linux/property.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/sched/rt.h>
|
||||
#include <uapi/linux/sched/types.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/highmem.h>
|
||||
#include <linux/idr.h>
|
||||
#include <linux/platform_data/x86/apple.h>
|
||||
#include <linux/ptp_clock_kernel.h>
|
||||
#include <linux/percpu.h>
|
||||
|
||||
#define CREATE_TRACE_POINTS
|
||||
#include <trace/events/spi.h>
|
||||
@ -64,7 +64,7 @@ modalias_show(struct device *dev, struct device_attribute *a, char *buf)
|
||||
if (len != -ENODEV)
|
||||
return len;
|
||||
|
||||
return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
|
||||
return sysfs_emit(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias);
|
||||
}
|
||||
static DEVICE_ATTR_RO(modalias);
|
||||
|
||||
@ -89,7 +89,7 @@ static ssize_t driver_override_show(struct device *dev,
|
||||
ssize_t len;
|
||||
|
||||
device_lock(dev);
|
||||
len = snprintf(buf, PAGE_SIZE, "%s\n", spi->driver_override ? : "");
|
||||
len = sysfs_emit(buf, "%s\n", spi->driver_override ? : "");
|
||||
device_unlock(dev);
|
||||
return len;
|
||||
}
|
||||
@ -682,7 +682,7 @@ static int __spi_add_device(struct spi_device *spi)
|
||||
* @spi: spi_device to register
|
||||
*
|
||||
* Companion function to spi_alloc_device. Devices allocated with
|
||||
* spi_alloc_device can be added onto the spi bus with this function.
|
||||
* spi_alloc_device can be added onto the SPI bus with this function.
|
||||
*
|
||||
* Return: 0 on success; negative errno on failure
|
||||
*/
|
||||
@ -889,7 +889,7 @@ int spi_register_board_info(struct spi_board_info const *info, unsigned n)
|
||||
* spi_res_alloc - allocate a spi resource that is life-cycle managed
|
||||
* during the processing of a spi_message while using
|
||||
* spi_transfer_one
|
||||
* @spi: the spi device for which we allocate memory
|
||||
* @spi: the SPI device for which we allocate memory
|
||||
* @release: the release code to execute for this resource
|
||||
* @size: size to alloc and return
|
||||
* @gfp: GFP allocation flags
|
||||
@ -915,7 +915,7 @@ static void *spi_res_alloc(struct spi_device *spi, spi_res_release_t release,
|
||||
}
|
||||
|
||||
/**
|
||||
* spi_res_free - free an spi resource
|
||||
* spi_res_free - free an SPI resource
|
||||
* @res: pointer to the custom data of a resource
|
||||
*/
|
||||
static void spi_res_free(void *res)
|
||||
@ -931,7 +931,7 @@ static void spi_res_free(void *res)
|
||||
|
||||
/**
|
||||
* spi_res_add - add a spi_res to the spi_message
|
||||
* @message: the spi message
|
||||
* @message: the SPI message
|
||||
* @res: the spi_resource
|
||||
*/
|
||||
static void spi_res_add(struct spi_message *message, void *res)
|
||||
@ -943,7 +943,7 @@ static void spi_res_add(struct spi_message *message, void *res)
|
||||
}
|
||||
|
||||
/**
|
||||
* spi_res_release - release all spi resources for this message
|
||||
* spi_res_release - release all SPI resources for this message
|
||||
* @ctlr: the @spi_controller
|
||||
* @message: the @spi_message
|
||||
*/
|
||||
@ -1006,7 +1006,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
|
||||
gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), activate);
|
||||
}
|
||||
/* Some SPI masters need both GPIO CS & slave_select */
|
||||
if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
|
||||
if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) &&
|
||||
spi->controller->set_cs)
|
||||
spi->controller->set_cs(spi, !enable);
|
||||
} else if (spi->controller->set_cs) {
|
||||
@ -1424,7 +1424,7 @@ int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer)
|
||||
return -EINVAL;
|
||||
/*
|
||||
* If there is unknown effective speed, approximate it
|
||||
* by underestimating with half of the requested hz.
|
||||
* by underestimating with half of the requested Hz.
|
||||
*/
|
||||
hz = xfer->effective_speed_hz ?: xfer->speed_hz / 2;
|
||||
if (!hz)
|
||||
@ -1739,11 +1739,11 @@ static int __spi_pump_transfer_message(struct spi_controller *ctlr,
|
||||
}
|
||||
|
||||
/**
|
||||
* __spi_pump_messages - function which processes spi message queue
|
||||
* __spi_pump_messages - function which processes SPI message queue
|
||||
* @ctlr: controller to process queue for
|
||||
* @in_kthread: true if we are in the context of the message pump thread
|
||||
*
|
||||
* This function checks if there is any spi message in the queue that
|
||||
* This function checks if there is any SPI message in the queue that
|
||||
* needs processing and if so call out to the driver to initialize hardware
|
||||
* and transfer each message.
|
||||
*
|
||||
@ -1758,7 +1758,7 @@ static void __spi_pump_messages(struct spi_controller *ctlr, bool in_kthread)
|
||||
unsigned long flags;
|
||||
int ret;
|
||||
|
||||
/* Take the IO mutex */
|
||||
/* Take the I/O mutex */
|
||||
mutex_lock(&ctlr->io_mutex);
|
||||
|
||||
/* Lock queue */
|
||||
@ -2169,8 +2169,8 @@ static int __spi_queued_transfer(struct spi_device *spi,
|
||||
|
||||
/**
|
||||
* spi_queued_transfer - transfer function for queued transfers
|
||||
* @spi: spi device which is requesting transfer
|
||||
* @msg: spi message which is to handled is queued to driver queue
|
||||
* @spi: SPI device which is requesting transfer
|
||||
* @msg: SPI message which is to handled is queued to driver queue
|
||||
*
|
||||
* Return: zero on success, else a negative error code.
|
||||
*/
|
||||
@ -2399,9 +2399,6 @@ static void of_register_spi_devices(struct spi_controller *ctlr)
|
||||
struct spi_device *spi;
|
||||
struct device_node *nc;
|
||||
|
||||
if (!ctlr->dev.of_node)
|
||||
return;
|
||||
|
||||
for_each_available_child_of_node(ctlr->dev.of_node, nc) {
|
||||
if (of_node_test_and_set_flag(nc, OF_POPULATED))
|
||||
continue;
|
||||
@ -2499,7 +2496,7 @@ static int acpi_spi_count(struct acpi_resource *ares, void *data)
|
||||
* acpi_spi_count_resources - Count the number of SpiSerialBus resources
|
||||
* @adev: ACPI device
|
||||
*
|
||||
* Returns the number of SpiSerialBus resources in the ACPI-device's
|
||||
* Return: the number of SpiSerialBus resources in the ACPI-device's
|
||||
* resource-list; or a negative error code.
|
||||
*/
|
||||
int acpi_spi_count_resources(struct acpi_device *adev)
|
||||
@ -2633,10 +2630,10 @@ static int acpi_spi_add_resource(struct acpi_resource *ares, void *data)
|
||||
* @adev: ACPI Device for the spi device
|
||||
* @index: Index of the spi resource inside the ACPI Node
|
||||
*
|
||||
* This should be used to allocate a new spi device from and ACPI Node.
|
||||
* The caller is responsible for calling spi_add_device to register the spi device.
|
||||
* This should be used to allocate a new SPI device from and ACPI Device node.
|
||||
* The caller is responsible for calling spi_add_device to register the SPI device.
|
||||
*
|
||||
* If ctlr is set to NULL, the Controller for the spi device will be looked up
|
||||
* If ctlr is set to NULL, the Controller for the SPI device will be looked up
|
||||
* using the resource.
|
||||
* If index is set to -1, index is not used.
|
||||
* Note: If index is -1, ctlr must be set.
|
||||
@ -2817,8 +2814,7 @@ static ssize_t slave_show(struct device *dev, struct device_attribute *attr,
|
||||
struct device *child;
|
||||
|
||||
child = device_find_any_child(&ctlr->dev);
|
||||
return sprintf(buf, "%s\n",
|
||||
child ? to_spi_device(child)->modalias : NULL);
|
||||
return sysfs_emit(buf, "%s\n", child ? to_spi_device(child)->modalias : NULL);
|
||||
}
|
||||
|
||||
static ssize_t slave_store(struct device *dev, struct device_attribute *attr,
|
||||
@ -3056,7 +3052,7 @@ static int spi_get_gpio_descs(struct spi_controller *ctlr)
|
||||
|
||||
ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
|
||||
|
||||
if ((ctlr->flags & SPI_MASTER_GPIO_SS) && num_cs_gpios &&
|
||||
if ((ctlr->flags & SPI_CONTROLLER_GPIO_SS) && num_cs_gpios &&
|
||||
ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
|
||||
dev_err(dev, "No unused native chip select available\n");
|
||||
return -EINVAL;
|
||||
@ -3084,6 +3080,20 @@ static int spi_controller_check_ops(struct spi_controller *ctlr)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Allocate dynamic bus number using Linux idr */
|
||||
static int spi_controller_id_alloc(struct spi_controller *ctlr, int start, int end)
|
||||
{
|
||||
int id;
|
||||
|
||||
mutex_lock(&board_lock);
|
||||
id = idr_alloc(&spi_master_idr, ctlr, start, end, GFP_KERNEL);
|
||||
mutex_unlock(&board_lock);
|
||||
if (WARN(id < 0, "couldn't get idr"))
|
||||
return id == -ENOSPC ? -EBUSY : id;
|
||||
ctlr->bus_num = id;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* spi_register_controller - register SPI master or slave controller
|
||||
* @ctlr: initialized master, originally from spi_alloc_master() or
|
||||
@ -3111,8 +3121,8 @@ int spi_register_controller(struct spi_controller *ctlr)
|
||||
{
|
||||
struct device *dev = ctlr->dev.parent;
|
||||
struct boardinfo *bi;
|
||||
int first_dynamic;
|
||||
int status;
|
||||
int id, first_dynamic;
|
||||
|
||||
if (!dev)
|
||||
return -ENODEV;
|
||||
@ -3125,27 +3135,13 @@ int spi_register_controller(struct spi_controller *ctlr)
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
if (ctlr->bus_num < 0)
|
||||
ctlr->bus_num = of_alias_get_id(ctlr->dev.of_node, "spi");
|
||||
if (ctlr->bus_num >= 0) {
|
||||
/* Devices with a fixed bus num must check-in with the num */
|
||||
mutex_lock(&board_lock);
|
||||
id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
|
||||
ctlr->bus_num + 1, GFP_KERNEL);
|
||||
mutex_unlock(&board_lock);
|
||||
if (WARN(id < 0, "couldn't get idr"))
|
||||
return id == -ENOSPC ? -EBUSY : id;
|
||||
ctlr->bus_num = id;
|
||||
} else if (ctlr->dev.of_node) {
|
||||
/* Allocate dynamic bus number using Linux idr */
|
||||
id = of_alias_get_id(ctlr->dev.of_node, "spi");
|
||||
if (id >= 0) {
|
||||
ctlr->bus_num = id;
|
||||
mutex_lock(&board_lock);
|
||||
id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
|
||||
ctlr->bus_num + 1, GFP_KERNEL);
|
||||
mutex_unlock(&board_lock);
|
||||
if (WARN(id < 0, "couldn't get idr"))
|
||||
return id == -ENOSPC ? -EBUSY : id;
|
||||
}
|
||||
status = spi_controller_id_alloc(ctlr, ctlr->bus_num, ctlr->bus_num + 1);
|
||||
if (status)
|
||||
return status;
|
||||
}
|
||||
if (ctlr->bus_num < 0) {
|
||||
first_dynamic = of_alias_get_highest_id("spi");
|
||||
@ -3154,13 +3150,9 @@ int spi_register_controller(struct spi_controller *ctlr)
|
||||
else
|
||||
first_dynamic++;
|
||||
|
||||
mutex_lock(&board_lock);
|
||||
id = idr_alloc(&spi_master_idr, ctlr, first_dynamic,
|
||||
0, GFP_KERNEL);
|
||||
mutex_unlock(&board_lock);
|
||||
if (WARN(id < 0, "couldn't get idr"))
|
||||
return id;
|
||||
ctlr->bus_num = id;
|
||||
status = spi_controller_id_alloc(ctlr, first_dynamic, 0);
|
||||
if (status)
|
||||
return status;
|
||||
}
|
||||
ctlr->bus_lock_flag = 0;
|
||||
init_completion(&ctlr->xfer_completion);
|
||||
@ -3339,7 +3331,8 @@ void spi_unregister_controller(struct spi_controller *ctlr)
|
||||
if (IS_ENABLED(CONFIG_SPI_DYNAMIC))
|
||||
mutex_unlock(&ctlr->add_lock);
|
||||
|
||||
/* Release the last reference on the controller if its driver
|
||||
/*
|
||||
* Release the last reference on the controller if its driver
|
||||
* has not yet been converted to devm_spi_alloc_master/slave().
|
||||
*/
|
||||
if (!ctlr->devm_allocated)
|
||||
@ -3552,7 +3545,7 @@ static int __spi_split_transfer_maxsize(struct spi_controller *ctlr,
|
||||
|
||||
/* All the others need rx_buf/tx_buf also set */
|
||||
for (i = 1, offset = maxsize; i < count; offset += maxsize, i++) {
|
||||
/* Update rx_buf, tx_buf and dma */
|
||||
/* Update rx_buf, tx_buf and DMA */
|
||||
if (xfers[i].rx_buf)
|
||||
xfers[i].rx_buf += offset;
|
||||
if (xfers[i].rx_dma)
|
||||
@ -3622,7 +3615,7 @@ EXPORT_SYMBOL_GPL(spi_split_transfers_maxsize);
|
||||
|
||||
|
||||
/**
|
||||
* spi_split_transfers_maxwords - split spi transfers into multiple transfers
|
||||
* spi_split_transfers_maxwords - split SPI transfers into multiple transfers
|
||||
* when an individual transfer exceeds a
|
||||
* certain number of SPI words
|
||||
* @ctlr: the @spi_controller for this transfer
|
||||
@ -3650,13 +3643,7 @@ int spi_split_transfers_maxwords(struct spi_controller *ctlr,
|
||||
size_t maxsize;
|
||||
int ret;
|
||||
|
||||
if (xfer->bits_per_word <= 8)
|
||||
maxsize = maxwords;
|
||||
else if (xfer->bits_per_word <= 16)
|
||||
maxsize = 2 * maxwords;
|
||||
else
|
||||
maxsize = 4 * maxwords;
|
||||
|
||||
maxsize = maxwords * roundup_pow_of_two(BITS_TO_BYTES(xfer->bits_per_word));
|
||||
if (xfer->len > maxsize) {
|
||||
ret = __spi_split_transfer_maxsize(ctlr, msg, &xfer,
|
||||
maxsize, gfp);
|
||||
@ -3671,7 +3658,8 @@ EXPORT_SYMBOL_GPL(spi_split_transfers_maxwords);
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* Core methods for SPI controller protocol drivers. Some of the
|
||||
/*
|
||||
* Core methods for SPI controller protocol drivers. Some of the
|
||||
* other core methods are currently defined as inline functions.
|
||||
*/
|
||||
|
||||
@ -3731,7 +3719,7 @@ static int spi_set_cs_timing(struct spi_device *spi)
|
||||
* changes those settings, and must be called from a context that can sleep.
|
||||
* Except for SPI_CS_HIGH, which takes effect immediately, the changes take
|
||||
* effect the next time the device is selected and data is transferred to
|
||||
* or from it. When this function returns, the spi device is deselected.
|
||||
* or from it. When this function returns, the SPI device is deselected.
|
||||
*
|
||||
* Note that this call will fail if the protocol driver specifies an option
|
||||
* that the underlying controller or its driver does not support. For
|
||||
@ -4071,7 +4059,7 @@ static int __spi_async(struct spi_device *spi, struct spi_message *message)
|
||||
* spi_async - asynchronous SPI transfer
|
||||
* @spi: device with which data will be exchanged
|
||||
* @message: describes the data transfers, including completion callback
|
||||
* Context: any (irqs may be blocked, etc)
|
||||
* Context: any (IRQs may be blocked, etc)
|
||||
*
|
||||
* This call may be used in_irq and other contexts which can't sleep,
|
||||
* as well as from task contexts which can sleep.
|
||||
@ -4125,7 +4113,7 @@ EXPORT_SYMBOL_GPL(spi_async);
|
||||
* spi_async_locked - version of spi_async with exclusive bus usage
|
||||
* @spi: device with which data will be exchanged
|
||||
* @message: describes the data transfers, including completion callback
|
||||
* Context: any (irqs may be blocked, etc)
|
||||
* Context: any (IRQs may be blocked, etc)
|
||||
*
|
||||
* This call may be used in_irq and other contexts which can't sleep,
|
||||
* as well as from task contexts which can sleep.
|
||||
@ -4388,9 +4376,9 @@ static u8 *buf;
|
||||
/**
|
||||
* spi_write_then_read - SPI synchronous write followed by read
|
||||
* @spi: device with which data will be exchanged
|
||||
* @txbuf: data to be written (need not be dma-safe)
|
||||
* @txbuf: data to be written (need not be DMA-safe)
|
||||
* @n_tx: size of txbuf, in bytes
|
||||
* @rxbuf: buffer into which data will be read (need not be dma-safe)
|
||||
* @rxbuf: buffer into which data will be read (need not be DMA-safe)
|
||||
* @n_rx: size of rxbuf, in bytes
|
||||
* Context: can sleep
|
||||
*
|
||||
@ -4401,7 +4389,7 @@ static u8 *buf;
|
||||
*
|
||||
* Parameters to this routine are always copied using a small buffer.
|
||||
* Performance-sensitive or bulk transfer code should instead use
|
||||
* spi_{async,sync}() calls with dma-safe buffers.
|
||||
* spi_{async,sync}() calls with DMA-safe buffers.
|
||||
*
|
||||
* Return: zero on success, else a negative error code.
|
||||
*/
|
||||
@ -4446,7 +4434,7 @@ int spi_write_then_read(struct spi_device *spi,
|
||||
x[0].tx_buf = local_buf;
|
||||
x[1].rx_buf = local_buf + n_tx;
|
||||
|
||||
/* Do the i/o */
|
||||
/* Do the I/O */
|
||||
status = spi_sync(spi, &message);
|
||||
if (status == 0)
|
||||
memcpy(rxbuf, x[1].rx_buf, n_rx);
|
||||
|
||||
@ -6,18 +6,18 @@
|
||||
#ifndef __LINUX_SPI_H
|
||||
#define __LINUX_SPI_H
|
||||
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/bits.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/completion.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/gpio/consumer.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/scatterlist.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/u64_stats_sync.h>
|
||||
|
||||
#include <uapi/linux/spi/spi.h>
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/u64_stats_sync.h>
|
||||
|
||||
struct dma_chan;
|
||||
struct software_node;
|
||||
@ -36,7 +36,7 @@ extern struct bus_type spi_bus_type;
|
||||
|
||||
/**
|
||||
* struct spi_statistics - statistics for spi transfers
|
||||
* @syncp: seqcount to protect members in this struct for per-cpu udate
|
||||
* @syncp: seqcount to protect members in this struct for per-cpu update
|
||||
* on 32-bit systems
|
||||
*
|
||||
* @messages: number of spi-messages handled
|
||||
@ -55,7 +55,7 @@ extern struct bus_type spi_bus_type;
|
||||
* @bytes_rx: number of bytes received from device
|
||||
*
|
||||
* @transfer_bytes_histo:
|
||||
* transfer bytes histogramm
|
||||
* transfer bytes histogram
|
||||
*
|
||||
* @transfers_split_maxsize:
|
||||
* number of transfers that have been split because of
|
||||
@ -156,7 +156,7 @@ extern void spi_transfer_cs_change_delay_exec(struct spi_message *msg,
|
||||
* the device will bind to the named driver and only the named driver.
|
||||
* Do not set directly, because core frees it; use driver_set_override() to
|
||||
* set or clear it.
|
||||
* @cs_gpiod: gpio descriptor of the chipselect line (optional, NULL when
|
||||
* @cs_gpiod: GPIO descriptor of the chipselect line (optional, NULL when
|
||||
* not using a GPIO line)
|
||||
* @word_delay: delay to be inserted between consecutive
|
||||
* words of a transfer
|
||||
@ -212,7 +212,7 @@ struct spi_device {
|
||||
void *controller_data;
|
||||
char modalias[SPI_NAME_SIZE];
|
||||
const char *driver_override;
|
||||
struct gpio_desc *cs_gpiod; /* Chip select gpio desc */
|
||||
struct gpio_desc *cs_gpiod; /* Chip select GPIO descriptor */
|
||||
struct spi_delay word_delay; /* Inter-word delay */
|
||||
/* CS delays */
|
||||
struct spi_delay cs_setup;
|
||||
@ -223,7 +223,7 @@ struct spi_device {
|
||||
struct spi_statistics __percpu *pcpu_statistics;
|
||||
|
||||
/*
|
||||
* likely need more hooks for more protocol options affecting how
|
||||
* Likely need more hooks for more protocol options affecting how
|
||||
* the controller talks to each chip, like:
|
||||
* - memory packing (12 bit samples into low bits, others zeroed)
|
||||
* - priority
|
||||
@ -299,11 +299,11 @@ static inline void spi_set_csgpiod(struct spi_device *spi, u8 idx, struct gpio_d
|
||||
/**
|
||||
* struct spi_driver - Host side "protocol" driver
|
||||
* @id_table: List of SPI devices supported by this driver
|
||||
* @probe: Binds this driver to the spi device. Drivers can verify
|
||||
* @probe: Binds this driver to the SPI device. Drivers can verify
|
||||
* that the device is actually present, and may need to configure
|
||||
* characteristics (such as bits_per_word) which weren't needed for
|
||||
* the initial configuration done during system setup.
|
||||
* @remove: Unbinds this driver from the spi device
|
||||
* @remove: Unbinds this driver from the SPI device
|
||||
* @shutdown: Standard shutdown callback used during system state
|
||||
* transitions such as powerdown/halt and kexec
|
||||
* @driver: SPI device drivers should initialize the name and owner
|
||||
@ -415,7 +415,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
|
||||
* @queued: whether this controller is providing an internal message queue
|
||||
* @kworker: pointer to thread struct for message pump
|
||||
* @pump_messages: work struct for scheduling work to the message pump
|
||||
* @queue_lock: spinlock to syncronise access to message queue
|
||||
* @queue_lock: spinlock to synchronise access to message queue
|
||||
* @queue: message queue
|
||||
* @cur_msg: the currently in-flight message
|
||||
* @cur_msg_completion: a completion for the current in-flight message
|
||||
@ -473,7 +473,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
|
||||
* @unprepare_message: undo any work done by prepare_message().
|
||||
* @slave_abort: abort the ongoing transfer request on an SPI slave controller
|
||||
* @target_abort: abort the ongoing transfer request on an SPI target controller
|
||||
* @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS
|
||||
* @cs_gpiods: Array of GPIO descriptors to use as chip select lines; one per CS
|
||||
* number. Any individual value may be NULL for CS lines that
|
||||
* are not GPIOs (driven by the SPI controller itself).
|
||||
* @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
|
||||
@ -500,7 +500,7 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
|
||||
* If the driver does not set this, the SPI core takes the snapshot as
|
||||
* close to the driver hand-over as possible.
|
||||
* @irq_flags: Interrupt enable state during PTP system timestamping
|
||||
* @fallback: fallback to pio if dma transfer return failure with
|
||||
* @fallback: fallback to PIO if DMA transfer return failure with
|
||||
* SPI_TRANS_FAIL_NO_START.
|
||||
* @queue_empty: signal green light for opportunistically skipping the queue
|
||||
* for spi_sync transfers.
|
||||
@ -522,15 +522,17 @@ struct spi_controller {
|
||||
|
||||
struct list_head list;
|
||||
|
||||
/* Other than negative (== assign one dynamically), bus_num is fully
|
||||
* board-specific. usually that simplifies to being SOC-specific.
|
||||
* example: one SOC has three SPI controllers, numbered 0..2,
|
||||
* and one board's schematics might show it using SPI-2. software
|
||||
/*
|
||||
* Other than negative (== assign one dynamically), bus_num is fully
|
||||
* board-specific. Usually that simplifies to being SoC-specific.
|
||||
* example: one SoC has three SPI controllers, numbered 0..2,
|
||||
* and one board's schematics might show it using SPI-2. Software
|
||||
* would normally use bus_num=2 for that controller.
|
||||
*/
|
||||
s16 bus_num;
|
||||
|
||||
/* chipselects will be integral to many controllers; some others
|
||||
/*
|
||||
* Chipselects will be integral to many controllers; some others
|
||||
* might use board-specific GPIOs.
|
||||
*/
|
||||
u16 num_chipselect;
|
||||
@ -562,8 +564,7 @@ struct spi_controller {
|
||||
#define SPI_CONTROLLER_NO_TX BIT(2) /* Can't do buffer write */
|
||||
#define SPI_CONTROLLER_MUST_RX BIT(3) /* Requires rx */
|
||||
#define SPI_CONTROLLER_MUST_TX BIT(4) /* Requires tx */
|
||||
|
||||
#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
|
||||
#define SPI_CONTROLLER_GPIO_SS BIT(5) /* GPIO CS must select slave */
|
||||
|
||||
/* Flag indicating if the allocation of this struct is devres-managed */
|
||||
bool devm_allocated;
|
||||
@ -576,8 +577,8 @@ struct spi_controller {
|
||||
};
|
||||
|
||||
/*
|
||||
* on some hardware transfer / message size may be constrained
|
||||
* the limit may depend on device transfer settings
|
||||
* On some hardware transfer / message size may be constrained
|
||||
* the limit may depend on device transfer settings.
|
||||
*/
|
||||
size_t (*max_transfer_size)(struct spi_device *spi);
|
||||
size_t (*max_message_size)(struct spi_device *spi);
|
||||
@ -595,7 +596,8 @@ struct spi_controller {
|
||||
/* Flag indicating that the SPI bus is locked for exclusive use */
|
||||
bool bus_lock_flag;
|
||||
|
||||
/* Setup mode and clock, etc (spi driver may call many times).
|
||||
/*
|
||||
* Setup mode and clock, etc (SPI driver may call many times).
|
||||
*
|
||||
* IMPORTANT: this may be called when transfers to another
|
||||
* device are active. DO NOT UPDATE SHARED REGISTERS in ways
|
||||
@ -613,18 +615,19 @@ struct spi_controller {
|
||||
*/
|
||||
int (*set_cs_timing)(struct spi_device *spi);
|
||||
|
||||
/* Bidirectional bulk transfers
|
||||
/*
|
||||
* Bidirectional bulk transfers
|
||||
*
|
||||
* + The transfer() method may not sleep; its main role is
|
||||
* just to add the message to the queue.
|
||||
* + For now there's no remove-from-queue operation, or
|
||||
* any other request management
|
||||
* + To a given spi_device, message queueing is pure fifo
|
||||
* + To a given spi_device, message queueing is pure FIFO
|
||||
*
|
||||
* + The controller's main job is to process its message queue,
|
||||
* selecting a chip (for masters), then transferring data
|
||||
* + If there are multiple spi_device children, the i/o queue
|
||||
* arbitration algorithm is unspecified (round robin, fifo,
|
||||
* arbitration algorithm is unspecified (round robin, FIFO,
|
||||
* priority, reservations, preemption, etc)
|
||||
*
|
||||
* + Chipselect stays active during the entire message
|
||||
@ -705,7 +708,7 @@ struct spi_controller {
|
||||
const struct spi_controller_mem_ops *mem_ops;
|
||||
const struct spi_controller_mem_caps *mem_caps;
|
||||
|
||||
/* gpio chip select */
|
||||
/* GPIO chip select */
|
||||
struct gpio_desc **cs_gpiods;
|
||||
bool use_gpio_descriptors;
|
||||
s8 unused_native_cs;
|
||||
@ -789,7 +792,7 @@ void spi_take_timestamp_post(struct spi_controller *ctlr,
|
||||
struct spi_transfer *xfer,
|
||||
size_t progress, bool irqs_off);
|
||||
|
||||
/* The spi driver core manages memory for the spi_controller classdev */
|
||||
/* The SPI driver core manages memory for the spi_controller classdev */
|
||||
extern struct spi_controller *__spi_alloc_controller(struct device *host,
|
||||
unsigned int size, bool slave);
|
||||
|
||||
@ -878,13 +881,13 @@ typedef void (*spi_res_release_t)(struct spi_controller *ctlr,
|
||||
void *res);
|
||||
|
||||
/**
|
||||
* struct spi_res - spi resource management structure
|
||||
* struct spi_res - SPI resource management structure
|
||||
* @entry: list entry
|
||||
* @release: release code called prior to freeing this resource
|
||||
* @data: extra data allocated for the specific use-case
|
||||
*
|
||||
* this is based on ideas from devres, but focused on life-cycle
|
||||
* management during spi_message processing
|
||||
* This is based on ideas from devres, but focused on life-cycle
|
||||
* management during spi_message processing.
|
||||
*/
|
||||
struct spi_res {
|
||||
struct list_head entry;
|
||||
@ -902,7 +905,7 @@ struct spi_res {
|
||||
*
|
||||
* The spi_messages themselves consist of a series of read+write transfer
|
||||
* segments. Those segments always read the same number of bits as they
|
||||
* write; but one or the other is easily ignored by passing a null buffer
|
||||
* write; but one or the other is easily ignored by passing a NULL buffer
|
||||
* pointer. (This is unlike most types of I/O API, because SPI hardware
|
||||
* is full duplex.)
|
||||
*
|
||||
@ -913,8 +916,8 @@ struct spi_res {
|
||||
|
||||
/**
|
||||
* struct spi_transfer - a read/write buffer pair
|
||||
* @tx_buf: data to be written (dma-safe memory), or NULL
|
||||
* @rx_buf: data to be read (dma-safe memory), or NULL
|
||||
* @tx_buf: data to be written (DMA-safe memory), or NULL
|
||||
* @rx_buf: data to be read (DMA-safe memory), or NULL
|
||||
* @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
|
||||
* @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
|
||||
* @tx_nbits: number of bits used for writing. If 0 the default
|
||||
@ -937,7 +940,7 @@ struct spi_res {
|
||||
* @word_delay: inter word delay to be introduced after each word size
|
||||
* (set by bits_per_word) transmission.
|
||||
* @effective_speed_hz: the effective SCK-speed that was used to
|
||||
* transfer this transfer. Set to 0 if the spi bus driver does
|
||||
* transfer this transfer. Set to 0 if the SPI bus driver does
|
||||
* not support it.
|
||||
* @transfer_list: transfers are sequenced through @spi_message.transfers
|
||||
* @tx_sg: Scatterlist for transmit, currently not for client use
|
||||
@ -966,16 +969,16 @@ struct spi_res {
|
||||
* transmitting the "pre" word, and the "post" timestamp after receiving
|
||||
* transmit confirmation from the controller for the "post" word.
|
||||
* @timestamped: true if the transfer has been timestamped
|
||||
* @error: Error status logged by spi controller driver.
|
||||
* @error: Error status logged by SPI controller driver.
|
||||
*
|
||||
* SPI transfers always write the same number of bytes as they read.
|
||||
* Protocol drivers should always provide @rx_buf and/or @tx_buf.
|
||||
* In some cases, they may also want to provide DMA addresses for
|
||||
* the data being transferred; that may reduce overhead, when the
|
||||
* underlying driver uses dma.
|
||||
* underlying driver uses DMA.
|
||||
*
|
||||
* If the transmit buffer is null, zeroes will be shifted out
|
||||
* while filling @rx_buf. If the receive buffer is null, the data
|
||||
* If the transmit buffer is NULL, zeroes will be shifted out
|
||||
* while filling @rx_buf. If the receive buffer is NULL, the data
|
||||
* shifted in will be discarded. Only "len" bytes shift out (or in).
|
||||
* It's an error to try to shift out a partial word. (For example, by
|
||||
* shifting out three bytes with word size of sixteen or twenty bits;
|
||||
@ -1009,7 +1012,7 @@ struct spi_res {
|
||||
* Some devices need protocol transactions to be built from a series of
|
||||
* spi_message submissions, where the content of one message is determined
|
||||
* by the results of previous messages and where the whole transaction
|
||||
* ends when the chipselect goes intactive.
|
||||
* ends when the chipselect goes inactive.
|
||||
*
|
||||
* When SPI can transfer in 1x,2x or 4x. It can get this transfer information
|
||||
* from device through @tx_nbits and @rx_nbits. In Bi-direction, these
|
||||
@ -1023,10 +1026,11 @@ struct spi_res {
|
||||
* and its transfers, ignore them until its completion callback.
|
||||
*/
|
||||
struct spi_transfer {
|
||||
/* It's ok if tx_buf == rx_buf (right?)
|
||||
* for MicroWire, one buffer must be null
|
||||
* buffers must work with dma_*map_single() calls, unless
|
||||
* spi_message.is_dma_mapped reports a pre-existing mapping
|
||||
/*
|
||||
* It's okay if tx_buf == rx_buf (right?).
|
||||
* For MicroWire, one buffer must be NULL.
|
||||
* Buffers must work with dma_*map_single() calls, unless
|
||||
* spi_message.is_dma_mapped reports a pre-existing mapping.
|
||||
*/
|
||||
const void *tx_buf;
|
||||
void *rx_buf;
|
||||
@ -1046,9 +1050,9 @@ struct spi_transfer {
|
||||
unsigned tx_nbits:3;
|
||||
unsigned rx_nbits:3;
|
||||
unsigned timestamped:1;
|
||||
#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
|
||||
#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
|
||||
#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */
|
||||
#define SPI_NBITS_SINGLE 0x01 /* 1-bit transfer */
|
||||
#define SPI_NBITS_DUAL 0x02 /* 2-bit transfer */
|
||||
#define SPI_NBITS_QUAD 0x04 /* 4-bit transfer */
|
||||
u8 bits_per_word;
|
||||
struct spi_delay delay;
|
||||
struct spi_delay cs_change_delay;
|
||||
@ -1069,7 +1073,7 @@ struct spi_transfer {
|
||||
* struct spi_message - one multi-segment SPI transaction
|
||||
* @transfers: list of transfer segments in this transaction
|
||||
* @spi: SPI device to which the transaction is queued
|
||||
* @is_dma_mapped: if true, the caller provided both dma and cpu virtual
|
||||
* @is_dma_mapped: if true, the caller provided both DMA and CPU virtual
|
||||
* addresses for each transfer buffer
|
||||
* @complete: called to report transaction completions
|
||||
* @context: the argument to complete() when it's called
|
||||
@ -1079,7 +1083,7 @@ struct spi_transfer {
|
||||
* @status: zero for success, else negative errno
|
||||
* @queue: for use by whichever driver currently owns the message
|
||||
* @state: for use by whichever driver currently owns the message
|
||||
* @resources: for resource management when the spi message is processed
|
||||
* @resources: for resource management when the SPI message is processed
|
||||
* @prepared: spi_prepare_message was called for the this message
|
||||
*
|
||||
* A @spi_message is used to execute an atomic sequence of data transfers,
|
||||
@ -1106,7 +1110,8 @@ struct spi_message {
|
||||
/* spi_prepare_message() was called for this message */
|
||||
bool prepared;
|
||||
|
||||
/* REVISIT: we might want a flag affecting the behavior of the
|
||||
/*
|
||||
* REVISIT: we might want a flag affecting the behavior of the
|
||||
* last transfer ... allowing things like "read 16 bit length L"
|
||||
* immediately followed by "read L bytes". Basically imposing
|
||||
* a specific message scheduling algorithm.
|
||||
@ -1124,14 +1129,15 @@ struct spi_message {
|
||||
unsigned frame_length;
|
||||
unsigned actual_length;
|
||||
|
||||
/* For optional use by whatever driver currently owns the
|
||||
/*
|
||||
* For optional use by whatever driver currently owns the
|
||||
* spi_message ... between calls to spi_async and then later
|
||||
* complete(), that's the spi_controller controller driver.
|
||||
*/
|
||||
struct list_head queue;
|
||||
void *state;
|
||||
|
||||
/* List of spi_res reources when the spi message is processed */
|
||||
/* List of spi_res resources when the SPI message is processed */
|
||||
struct list_head resources;
|
||||
};
|
||||
|
||||
@ -1168,7 +1174,7 @@ spi_transfer_delay_exec(struct spi_transfer *t)
|
||||
/**
|
||||
* spi_message_init_with_transfers - Initialize spi_message and append transfers
|
||||
* @m: spi_message to be initialized
|
||||
* @xfers: An array of spi transfers
|
||||
* @xfers: An array of SPI transfers
|
||||
* @num_xfers: Number of items in the xfer array
|
||||
*
|
||||
* This function initializes the given spi_message and adds each spi_transfer in
|
||||
@ -1185,10 +1191,10 @@ struct spi_transfer *xfers, unsigned int num_xfers)
|
||||
spi_message_add_tail(&xfers[i], m);
|
||||
}
|
||||
|
||||
/* It's fine to embed message and transaction structures in other data
|
||||
/*
|
||||
* It's fine to embed message and transaction structures in other data
|
||||
* structures so long as you don't free them while they're in use.
|
||||
*/
|
||||
|
||||
static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
|
||||
{
|
||||
struct spi_message *m;
|
||||
@ -1291,7 +1297,7 @@ typedef void (*spi_replaced_release_t)(struct spi_controller *ctlr,
|
||||
* replacements that have occurred
|
||||
* so that they can get reverted
|
||||
* @release: some extra release code to get executed prior to
|
||||
* relasing this structure
|
||||
* releasing this structure
|
||||
* @extradata: pointer to some extra data if requested or NULL
|
||||
* @replaced_transfers: transfers that have been replaced and which need
|
||||
* to get restored
|
||||
@ -1301,9 +1307,9 @@ typedef void (*spi_replaced_release_t)(struct spi_controller *ctlr,
|
||||
* @inserted_transfers: array of spi_transfers of array-size @inserted,
|
||||
* that have been replacing replaced_transfers
|
||||
*
|
||||
* note: that @extradata will point to @inserted_transfers[@inserted]
|
||||
* Note: that @extradata will point to @inserted_transfers[@inserted]
|
||||
* if some extra allocation is requested, so alignment will be the same
|
||||
* as for spi_transfers
|
||||
* as for spi_transfers.
|
||||
*/
|
||||
struct spi_replaced_transfers {
|
||||
spi_replaced_release_t release;
|
||||
@ -1329,7 +1335,8 @@ extern int spi_split_transfers_maxwords(struct spi_controller *ctlr,
|
||||
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
||||
/* All these synchronous SPI transfer routines are utilities layered
|
||||
/*
|
||||
* All these synchronous SPI transfer routines are utilities layered
|
||||
* over the core async transfer primitive. Here, "synchronous" means
|
||||
* they will sleep uninterruptibly until the async transfer completes.
|
||||
*/
|
||||
@ -1472,7 +1479,7 @@ static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
|
||||
*
|
||||
* Callable only from contexts that can sleep.
|
||||
*
|
||||
* Return: the (unsigned) sixteen bit number returned by the device in cpu
|
||||
* Return: the (unsigned) sixteen bit number returned by the device in CPU
|
||||
* endianness, or else a negative error code.
|
||||
*/
|
||||
static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
|
||||
@ -1500,7 +1507,7 @@ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
|
||||
* As a rule, SPI devices can't be probed. Instead, board init code
|
||||
* provides a table listing the devices which are present, with enough
|
||||
* information to bind and set up the device's driver. There's basic
|
||||
* support for nonstatic configurations too; enough to handle adding
|
||||
* support for non-static configurations too; enough to handle adding
|
||||
* parport adapters, or microcontrollers acting as USB-to-SPI bridges.
|
||||
*/
|
||||
|
||||
@ -1537,12 +1544,13 @@ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
|
||||
* are active in some dynamic board configuration models.
|
||||
*/
|
||||
struct spi_board_info {
|
||||
/* The device name and module name are coupled, like platform_bus;
|
||||
/*
|
||||
* The device name and module name are coupled, like platform_bus;
|
||||
* "modalias" is normally the driver name.
|
||||
*
|
||||
* platform_data goes to spi_device.dev.platform_data,
|
||||
* controller_data goes to spi_device.controller_data,
|
||||
* irq is copied too
|
||||
* IRQ is copied too.
|
||||
*/
|
||||
char modalias[SPI_NAME_SIZE];
|
||||
const void *platform_data;
|
||||
@ -1554,7 +1562,8 @@ struct spi_board_info {
|
||||
u32 max_speed_hz;
|
||||
|
||||
|
||||
/* bus_num is board specific and matches the bus_num of some
|
||||
/*
|
||||
* bus_num is board specific and matches the bus_num of some
|
||||
* spi_controller that will probably be registered later.
|
||||
*
|
||||
* chip_select reflects how this chip is wired to that master;
|
||||
@ -1563,12 +1572,14 @@ struct spi_board_info {
|
||||
u16 bus_num;
|
||||
u16 chip_select;
|
||||
|
||||
/* mode becomes spi_device.mode, and is essential for chips
|
||||
/*
|
||||
* mode becomes spi_device.mode, and is essential for chips
|
||||
* where the default of SPI_CS_HIGH = 0 is wrong.
|
||||
*/
|
||||
u32 mode;
|
||||
|
||||
/* ... may need additional spi_device chip config data here.
|
||||
/*
|
||||
* ... may need additional spi_device chip config data here.
|
||||
* avoid stuff protocol drivers can set; but include stuff
|
||||
* needed to behave without being bound to a driver:
|
||||
* - quirks like clock rate mattering when not selected
|
||||
@ -1585,7 +1596,8 @@ spi_register_board_info(struct spi_board_info const *info, unsigned n)
|
||||
{ return 0; }
|
||||
#endif
|
||||
|
||||
/* If you're hotplugging an adapter with devices (parport, usb, etc)
|
||||
/*
|
||||
* If you're hotplugging an adapter with devices (parport, USB, etc)
|
||||
* use spi_new_device() to describe each device. You can also call
|
||||
* spi_unregister_device() to start making that device vanish, but
|
||||
* normally that would be handled by spi_unregister_controller().
|
||||
@ -1623,10 +1635,6 @@ spi_transfer_is_last(struct spi_controller *ctlr, struct spi_transfer *xfer)
|
||||
#define spi_master spi_controller
|
||||
|
||||
#define SPI_MASTER_HALF_DUPLEX SPI_CONTROLLER_HALF_DUPLEX
|
||||
#define SPI_MASTER_NO_RX SPI_CONTROLLER_NO_RX
|
||||
#define SPI_MASTER_NO_TX SPI_CONTROLLER_NO_TX
|
||||
#define SPI_MASTER_MUST_RX SPI_CONTROLLER_MUST_RX
|
||||
#define SPI_MASTER_MUST_TX SPI_CONTROLLER_MUST_TX
|
||||
|
||||
#define spi_master_get_devdata(_ctlr) spi_controller_get_devdata(_ctlr)
|
||||
#define spi_master_set_devdata(_ctlr, _data) \
|
||||
|
||||
@ -167,7 +167,7 @@ TRACE_EVENT(spi_message_done,
|
||||
);
|
||||
|
||||
/*
|
||||
* consider a buffer valid if non-NULL and if it doesn't match the dummy buffer
|
||||
* Consider a buffer valid if non-NULL and if it doesn't match the dummy buffer
|
||||
* that only exist to work with controllers that have SPI_CONTROLLER_MUST_TX or
|
||||
* SPI_CONTROLLER_MUST_RX.
|
||||
*/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user