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mmc: pxamci: switch over to dmaengine use
Switch over pxamci to dmaengine. This prepares the devicetree full support of pxamci. This was successfully tested on a PXA3xx board, as well as PXA27x. Signed-off-by: Daniel Mack <zonque@gmail.com> [adapted to pxa-dma] Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Daniel Mack
Ulf Hansson
parent
642c28ab86
commit
6464b71409
@ -22,7 +22,9 @@
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/dmaengine.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma/pxa-dma.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/mmc/host.h>
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@ -37,7 +39,6 @@
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#include <asm/sizes.h>
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#include <mach/hardware.h>
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#include <mach/dma.h>
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#include <linux/platform_data/mmc-pxamci.h>
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#include "pxamci.h"
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@ -58,7 +59,6 @@ struct pxamci_host {
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struct clk *clk;
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unsigned long clkrate;
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int irq;
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int dma;
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unsigned int clkrt;
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unsigned int cmdat;
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unsigned int imask;
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@ -69,8 +69,10 @@ struct pxamci_host {
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struct mmc_command *cmd;
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struct mmc_data *data;
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struct dma_chan *dma_chan_rx;
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struct dma_chan *dma_chan_tx;
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dma_cookie_t dma_cookie;
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dma_addr_t sg_dma;
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struct pxa_dma_desc *sg_cpu;
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unsigned int dma_len;
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unsigned int dma_dir;
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@ -173,14 +175,18 @@ static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
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spin_unlock_irqrestore(&host->lock, flags);
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}
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static void pxamci_dma_irq(void *param);
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static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
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{
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struct dma_async_tx_descriptor *tx;
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enum dma_data_direction direction;
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struct dma_slave_config config;
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struct dma_chan *chan;
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unsigned int nob = data->blocks;
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unsigned long long clks;
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unsigned int timeout;
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bool dalgn = 0;
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u32 dcmd;
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int i;
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int ret;
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host->data = data;
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@ -195,54 +201,48 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
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timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
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writel((timeout + 255) / 256, host->base + MMC_RDTO);
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memset(&config, 0, sizeof(config));
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config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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config.src_addr = host->res->start + MMC_RXFIFO;
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config.dst_addr = host->res->start + MMC_TXFIFO;
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config.src_maxburst = 32;
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config.dst_maxburst = 32;
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if (data->flags & MMC_DATA_READ) {
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host->dma_dir = DMA_FROM_DEVICE;
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dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC;
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DRCMR(host->dma_drcmrtx) = 0;
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DRCMR(host->dma_drcmrrx) = host->dma | DRCMR_MAPVLD;
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direction = DMA_DEV_TO_MEM;
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chan = host->dma_chan_rx;
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} else {
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host->dma_dir = DMA_TO_DEVICE;
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dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG;
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DRCMR(host->dma_drcmrrx) = 0;
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DRCMR(host->dma_drcmrtx) = host->dma | DRCMR_MAPVLD;
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direction = DMA_MEM_TO_DEV;
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chan = host->dma_chan_tx;
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}
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dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
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config.direction = direction;
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host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
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ret = dmaengine_slave_config(chan, &config);
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if (ret < 0) {
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dev_err(mmc_dev(host->mmc), "dma slave config failed\n");
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return;
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}
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host->dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len,
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host->dma_dir);
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for (i = 0; i < host->dma_len; i++) {
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unsigned int length = sg_dma_len(&data->sg[i]);
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host->sg_cpu[i].dcmd = dcmd | length;
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if (length & 31 && !(data->flags & MMC_DATA_READ))
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host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
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/* Not aligned to 8-byte boundary? */
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if (sg_dma_address(&data->sg[i]) & 0x7)
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dalgn = 1;
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if (data->flags & MMC_DATA_READ) {
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host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
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host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
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} else {
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host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
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host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
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}
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host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
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sizeof(struct pxa_dma_desc);
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tx = dmaengine_prep_slave_sg(chan, data->sg, host->dma_len, direction,
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DMA_PREP_INTERRUPT);
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if (!tx) {
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dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n");
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return;
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}
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host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
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wmb();
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/*
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* The PXA27x DMA controller encounters overhead when working with
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* unaligned (to 8-byte boundaries) data, so switch on byte alignment
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* mode only if we have unaligned data.
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*/
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if (dalgn)
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DALGN |= (1 << host->dma);
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else
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DALGN &= ~(1 << host->dma);
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DDADR(host->dma) = host->sg_dma;
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if (!(data->flags & MMC_DATA_READ)) {
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tx->callback = pxamci_dma_irq;
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tx->callback_param = host;
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}
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host->dma_cookie = dmaengine_submit(tx);
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/*
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* workaround for erratum #91:
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@ -251,7 +251,7 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
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* before starting DMA.
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*/
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if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ)
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DCSR(host->dma) = DCSR_RUN;
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dma_async_issue_pending(chan);
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}
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static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
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@ -343,7 +343,7 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
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* enable DMA late
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*/
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if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
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DCSR(host->dma) = DCSR_RUN;
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dma_async_issue_pending(host->dma_chan_tx);
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} else {
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pxamci_finish_request(host, host->mrq);
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}
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@ -354,13 +354,17 @@ static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
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static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
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{
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struct mmc_data *data = host->data;
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struct dma_chan *chan;
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if (!data)
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return 0;
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DCSR(host->dma) = 0;
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dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
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host->dma_dir);
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if (data->flags & MMC_DATA_READ)
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chan = host->dma_chan_rx;
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else
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chan = host->dma_chan_tx;
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dma_unmap_sg(chan->device->dev,
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data->sg, data->sg_len, host->dma_dir);
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if (stat & STAT_READ_TIME_OUT)
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data->error = -ETIMEDOUT;
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@ -552,20 +556,37 @@ static const struct mmc_host_ops pxamci_ops = {
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.enable_sdio_irq = pxamci_enable_sdio_irq,
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};
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static void pxamci_dma_irq(int dma, void *devid)
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static void pxamci_dma_irq(void *param)
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{
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struct pxamci_host *host = devid;
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int dcsr = DCSR(dma);
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DCSR(dma) = dcsr & ~DCSR_STOPIRQEN;
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struct pxamci_host *host = param;
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struct dma_tx_state state;
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enum dma_status status;
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struct dma_chan *chan;
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unsigned long flags;
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if (dcsr & DCSR_ENDINTR) {
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spin_lock_irqsave(&host->lock, flags);
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if (!host->data)
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goto out_unlock;
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if (host->data->flags & MMC_DATA_READ)
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chan = host->dma_chan_rx;
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else
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chan = host->dma_chan_tx;
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status = dmaengine_tx_status(chan, host->dma_cookie, &state);
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if (likely(status == DMA_COMPLETE)) {
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writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
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} else {
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pr_err("%s: DMA error on channel %d (DCSR=%#x)\n",
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mmc_hostname(host->mmc), dma, dcsr);
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pr_err("%s: DMA error on %s channel\n", mmc_hostname(host->mmc),
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host->data->flags & MMC_DATA_READ ? "rx" : "tx");
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host->data->error = -EIO;
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pxamci_data_done(host, 0);
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}
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out_unlock:
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spin_unlock_irqrestore(&host->lock, flags);
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}
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static irqreturn_t pxamci_detect_irq(int irq, void *devid)
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@ -625,7 +646,9 @@ static int pxamci_probe(struct platform_device *pdev)
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struct mmc_host *mmc;
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struct pxamci_host *host = NULL;
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struct resource *r, *dmarx, *dmatx;
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struct pxad_param param_rx, param_tx;
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int ret, irq, gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
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dma_cap_mask_t mask;
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ret = pxamci_of_init(pdev);
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if (ret)
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@ -671,7 +694,6 @@ static int pxamci_probe(struct platform_device *pdev)
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host = mmc_priv(mmc);
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host->mmc = mmc;
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host->dma = -1;
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host->pdata = pdev->dev.platform_data;
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host->clkrt = CLKRT_OFF;
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@ -702,12 +724,6 @@ static int pxamci_probe(struct platform_device *pdev)
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MMC_CAP_SD_HIGHSPEED;
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}
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host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
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if (!host->sg_cpu) {
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ret = -ENOMEM;
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goto out;
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}
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spin_lock_init(&host->lock);
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host->res = r;
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host->irq = irq;
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@ -728,32 +744,45 @@ static int pxamci_probe(struct platform_device *pdev)
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writel(64, host->base + MMC_RESTO);
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writel(host->imask, host->base + MMC_I_MASK);
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host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
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pxamci_dma_irq, host);
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if (host->dma < 0) {
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ret = -EBUSY;
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goto out;
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}
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ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
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if (ret)
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goto out;
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platform_set_drvdata(pdev, mmc);
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dmarx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
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if (!dmarx) {
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ret = -ENXIO;
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goto out;
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if (!pdev->dev.of_node) {
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dmarx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
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dmatx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
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if (!dmarx || !dmatx) {
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ret = -ENXIO;
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goto out;
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}
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param_rx.prio = PXAD_PRIO_LOWEST;
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param_rx.drcmr = dmarx->start;
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param_tx.prio = PXAD_PRIO_LOWEST;
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param_tx.drcmr = dmatx->start;
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}
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host->dma_drcmrrx = dmarx->start;
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dmatx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
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if (!dmatx) {
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ret = -ENXIO;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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host->dma_chan_rx =
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dma_request_slave_channel_compat(mask, pxad_filter_fn,
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¶m_rx, &pdev->dev, "rx");
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if (host->dma_chan_rx == NULL) {
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dev_err(&pdev->dev, "unable to request rx dma channel\n");
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ret = -ENODEV;
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goto out;
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}
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host->dma_chan_tx =
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dma_request_slave_channel_compat(mask, pxad_filter_fn,
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¶m_tx, &pdev->dev, "tx");
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if (host->dma_chan_tx == NULL) {
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dev_err(&pdev->dev, "unable to request tx dma channel\n");
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ret = -ENODEV;
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goto out;
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}
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host->dma_drcmrtx = dmatx->start;
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if (host->pdata) {
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gpio_cd = host->pdata->gpio_card_detect;
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@ -814,12 +843,12 @@ err_gpio_ro:
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gpio_free(gpio_power);
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out:
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if (host) {
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if (host->dma >= 0)
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pxa_free_dma(host->dma);
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if (host->dma_chan_rx)
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dma_release_channel(host->dma_chan_rx);
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if (host->dma_chan_tx)
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dma_release_channel(host->dma_chan_tx);
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if (host->base)
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iounmap(host->base);
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if (host->sg_cpu)
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dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
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if (host->clk)
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clk_put(host->clk);
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}
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@ -863,13 +892,12 @@ static int pxamci_remove(struct platform_device *pdev)
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END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
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host->base + MMC_I_MASK);
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DRCMR(host->dma_drcmrrx) = 0;
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DRCMR(host->dma_drcmrtx) = 0;
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free_irq(host->irq, host);
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pxa_free_dma(host->dma);
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dmaengine_terminate_all(host->dma_chan_rx);
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dmaengine_terminate_all(host->dma_chan_tx);
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dma_release_channel(host->dma_chan_rx);
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dma_release_channel(host->dma_chan_tx);
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iounmap(host->base);
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dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
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clk_put(host->clk);
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