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gma500: read the PLL bits

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We need to pull more stuff from the VBT in order to configure the clocking
correctly in all cases. Add the relevant bits from the other CDV driver work.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alan Cox 2012-04-25 14:36:34 +01:00 committed by Dave Airlie
parent 1896344b18
commit 642c52fcc9
3 changed files with 59 additions and 0 deletions
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18
drivers/gpu/drm/gma500/intel_bios.c
View File

@ -217,6 +217,23 @@ static void parse_general_features(struct drm_psb_private *dev_priv,
}
}
static void
parse_driver_features(struct drm_psb_private *dev_priv,
struct bdb_header *bdb)
{
struct bdb_driver_features *driver;
driver = find_section(bdb, BDB_DRIVER_FEATURES);
if (!driver)
return;
/* This bit means to use 96Mhz for DPLL_A or not */
if (driver->primary_lfp_id)
dev_priv->dplla_96mhz = true;
else
dev_priv->dplla_96mhz = false;
}
/**
* psb_intel_init_bios - initialize VBIOS settings & find VBT
* @dev: DRM device
@ -263,6 +280,7 @@ bool psb_intel_init_bios(struct drm_device *dev)
/* Grab useful general definitions */
parse_general_features(dev_priv, bdb);
parse_driver_features(dev_priv, bdb);
parse_lfp_panel_data(dev_priv, bdb);
parse_sdvo_panel_data(dev_priv, bdb);
parse_backlight_data(dev_priv, bdb);

39
drivers/gpu/drm/gma500/intel_bios.h
View File

@ -302,6 +302,45 @@ struct bdb_sdvo_lvds_options {
u8 panel_misc_bits_4;
} __attribute__((packed));
struct bdb_driver_features {
u8 boot_dev_algorithm:1;
u8 block_display_switch:1;
u8 allow_display_switch:1;
u8 hotplug_dvo:1;
u8 dual_view_zoom:1;
u8 int15h_hook:1;
u8 sprite_in_clone:1;
u8 primary_lfp_id:1;
u16 boot_mode_x;
u16 boot_mode_y;
u8 boot_mode_bpp;
u8 boot_mode_refresh;
u16 enable_lfp_primary:1;
u16 selective_mode_pruning:1;
u16 dual_frequency:1;
u16 render_clock_freq:1; /* 0: high freq; 1: low freq */
u16 nt_clone_support:1;
u16 power_scheme_ui:1; /* 0: CUI; 1: 3rd party */
u16 sprite_display_assign:1; /* 0: secondary; 1: primary */
u16 cui_aspect_scaling:1;
u16 preserve_aspect_ratio:1;
u16 sdvo_device_power_down:1;
u16 crt_hotplug:1;
u16 lvds_config:2;
u16 tv_hotplug:1;
u16 hdmi_config:2;
u8 static_display:1;
u8 reserved2:7;
u16 legacy_crt_max_x;
u16 legacy_crt_max_y;
u8 legacy_crt_max_refresh;
u8 hdmi_termination;
u8 custom_vbt_version;
} __attribute__((packed));
extern bool psb_intel_init_bios(struct drm_device *dev);
extern void psb_intel_destroy_bios(struct drm_device *dev);

2
drivers/gpu/drm/gma500/psb_drv.h
View File

@ -669,6 +669,8 @@ struct drm_psb_private {
u32 dspcntr[3];
int mdfld_panel_id;
bool dplla_96mhz; /* DPLL data from the VBT */
};