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dt-bindings: mtd: Convert mtd-physmap to DT schema
Convert the mtd-physmap binding to DT schema format. The arm-versatile, cypress,hyperflash and intel,ixp4xx-flash are all just an additional compatible string, so they are all merged into the main schema. There doesn't appear to be any users nor support for 'vendor-id' and 'device-id', so these have been dropped. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Richard Weinberger <richard@nod.at> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20210607193500.3085920-1-robh@kernel.org
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@ -1,26 +0,0 @@
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Flash device on ARM Versatile board
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These flash chips are found in the ARM reference designs like Integrator,
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Versatile, RealView, Versatile Express etc.
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They are regular CFI compatible (Intel or AMD extended) flash chips with
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some special write protect/VPP bits that can be controlled by the machine's
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system controller.
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Required properties:
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- compatible : must be "arm,versatile-flash", "cfi-flash";
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- reg : memory address for the flash chip
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- bank-width : width in bytes of flash interface.
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For the rest of the properties, see mtd-physmap.txt.
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The device tree may optionally contain sub-nodes describing partitions of the
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address space. See partition.txt for more detail.
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Example:
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flash@34000000 {
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compatible = "arm,versatile-flash", "cfi-flash";
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reg = <0x34000000 0x4000000>;
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bank-width = <4>;
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};
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@ -9,7 +9,7 @@ Required properties:
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- syscon : must be a phandle to the system controller
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- bank-width : width in bytes of flash interface, should be <2>
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For the rest of the properties, see mtd-physmap.txt.
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For the rest of the properties, see mtd-physmap.yaml.
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The device tree may optionally contain sub-nodes describing partitions of the
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address space. See partition.txt for more detail.
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@ -1,13 +0,0 @@
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Bindings for HyperFlash NOR flash chips compliant with Cypress HyperBus
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specification and supports Cypress CFI specification 1.5 command set.
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Required properties:
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- compatible : "cypress,hyperflash", "cfi-flash" for HyperFlash NOR chips
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- reg : Address of flash's memory map
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Example:
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flash@0 {
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compatible = "cypress,hyperflash", "cfi-flash";
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reg = <0x0 0x4000000>;
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};
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@ -1,22 +0,0 @@
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Flash device on Intel IXP4xx SoC
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This flash is regular CFI compatible (Intel or AMD extended) flash chips with
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specific big-endian or mixed-endian memory access pattern.
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Required properties:
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- compatible : must be "intel,ixp4xx-flash", "cfi-flash";
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- reg : memory address for the flash chip
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- bank-width : width in bytes of flash interface, should be <2>
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For the rest of the properties, see mtd-physmap.txt.
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The device tree may optionally contain sub-nodes describing partitions of the
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address space. See partition.txt for more detail.
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Example:
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flash@50000000 {
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compatible = "intel,ixp4xx-flash", "cfi-flash";
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reg = <0x50000000 0x01000000>;
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bank-width = <2>;
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};
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@ -1,114 +0,0 @@
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CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
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Flash chips (Memory Technology Devices) are often used for solid state
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file systems on embedded devices.
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- compatible : should contain the specific model of mtd chip(s)
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used, if known, followed by either "cfi-flash", "jedec-flash",
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"mtd-ram" or "mtd-rom".
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- reg : Address range(s) of the mtd chip(s)
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It's possible to (optionally) define multiple "reg" tuples so that
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non-identical chips can be described in one node.
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- bank-width : Width (in bytes) of the bank. Equal to the
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device width times the number of interleaved chips.
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- device-width : (optional) Width of a single mtd chip. If
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omitted, assumed to be equal to 'bank-width'.
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- #address-cells, #size-cells : Must be present if the device has
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sub-nodes representing partitions (see below). In this case
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both #address-cells and #size-cells must be equal to 1.
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- no-unaligned-direct-access: boolean to disable the default direct
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mapping of the flash.
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On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause
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problems with JFFS2 usage, as the local bus (LPB) doesn't support
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unaligned accesses as implemented in the JFFS2 code via memcpy().
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By defining "no-unaligned-direct-access", the flash will not be
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exposed directly to the MTD users (e.g. JFFS2) any more.
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- linux,mtd-name: allow to specify the mtd name for retro capability with
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physmap-flash drivers as boot loader pass the mtd partition via the old
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device name physmap-flash.
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- use-advanced-sector-protection: boolean to enable support for the
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advanced sector protection (Spansion: PPB - Persistent Protection
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Bits) locking.
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- addr-gpios : (optional) List of GPIO descriptors that will be used to
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address the MSBs address lines. The order goes from LSB to MSB.
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For JEDEC compatible devices, the following additional properties
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are defined:
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- vendor-id : Contains the flash chip's vendor id (1 byte).
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- device-id : Contains the flash chip's device id (1 byte).
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For ROM compatible devices (and ROM fallback from cfi-flash), the following
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additional (optional) property is defined:
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- erase-size : The chip's physical erase block size in bytes.
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The device tree may optionally contain endianness property.
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little-endian or big-endian : It Represents the endianness that should be used
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by the controller to properly read/write data
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from/to the flash. If this property is missing,
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the endianness is chosen by the system
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(potentially based on extra configuration options).
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The device tree may optionally contain sub-nodes describing partitions of the
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address space. See partition.txt for more detail.
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Example:
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flash@ff000000 {
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compatible = "amd,am29lv128ml", "cfi-flash";
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reg = <ff000000 01000000>;
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bank-width = <4>;
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device-width = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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fs@0 {
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label = "fs";
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reg = <0 f80000>;
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};
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firmware@f80000 {
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label ="firmware";
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reg = <f80000 80000>;
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read-only;
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};
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};
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Here an example with multiple "reg" tuples:
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flash@f0000000,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "intel,PC48F4400P0VB", "cfi-flash";
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reg = <0 0x00000000 0x02000000
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0 0x02000000 0x02000000>;
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bank-width = <2>;
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partition@0 {
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label = "test-part1";
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reg = <0 0x04000000>;
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};
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};
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An example using SRAM:
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sram@2,0 {
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compatible = "samsung,k6f1616u6a", "mtd-ram";
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reg = <2 0 0x00200000>;
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bank-width = <2>;
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};
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An example using gpio-addrs
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flash@20000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "cfi-flash", "jedec-flash";
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reg = <0x20000000 0x02000000>;
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ranges = <0 0x00000000 0x02000000
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1 0x02000000 0x02000000>;
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bank-width = <2>;
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addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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partition@0 {
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label = "test-part1";
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reg = <0 0x04000000>;
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};
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};
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208
Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
Normal file
208
Documentation/devicetree/bindings/mtd/mtd-physmap.yaml
Normal file
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
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maintainers:
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- Rob Herring <robh@kernel.org>
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description: |
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Flash chips (Memory Technology Devices) are often used for solid state
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file systems on embedded devices.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- amd,s29gl01gp
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- amd,s29gl032a
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- amd,s29gl256n
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- amd,s29gl512n
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- arm,versatile-flash
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- cortina,gemini-flash
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- cypress,hyperflash
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- ge,imp3a-firmware-mirror
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- ge,imp3a-paged-flash
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- gef,ppc9a-firmware-mirror
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- gef,ppc9a-paged-flash
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- gef,sbc310-firmware-mirror
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- gef,sbc310-paged-flash
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- gef,sbc610-firmware-mirror
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- gef,sbc610-paged-flash
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- intel,28f128j3
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- intel,dt28f160
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- intel,ixp4xx-flash
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- intel,JS28F128
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- intel,JS28F640
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- intel,PC28F640P30T85
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- numonyx,js28f00a
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- numonyx,js28f128
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- sst,sst39vf320
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- xlnx,xps-mch-emc-2.00.a
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- const: cfi-flash
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- items:
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- enum:
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- cypress,cy7c1019dv33-10zsxi
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- arm,vexpress-psram
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- const: mtd-ram
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- enum:
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- cfi-flash
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- jedec-flash
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- mtd-ram
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- mtd-rom
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reg:
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description: |
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It's possible to (optionally) define multiple "reg" tuples so that
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non-identical chips can be described in one node.
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minItems: 1
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maxItems: 8
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bank-width:
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description: Width (in bytes) of the bank. Equal to the device width times
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the number of interleaved chips.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 2, 4 ]
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device-width:
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description:
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Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 2 ]
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no-unaligned-direct-access:
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type: boolean
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description: |
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Disables the default direct mapping of the flash.
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On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause problems
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with JFFS2 usage, as the local bus (LPB) doesn't support unaligned
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accesses as implemented in the JFFS2 code via memcpy(). By defining
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"no-unaligned-direct-access", the flash will not be exposed directly to
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the MTD users (e.g. JFFS2) any more.
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linux,mtd-name:
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description:
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Allows specifying the mtd name for retro capability with physmap-flash
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drivers as boot loader pass the mtd partition via the old device name
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physmap-flash.
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$ref: /schemas/types.yaml#/definitions/string
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use-advanced-sector-protection:
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type: boolean
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description: |
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Enables support for the advanced sector protection (Spansion: PPB -
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Persistent Protection Bits) locking.
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erase-size:
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description: The chip's physical erase block size in bytes.
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$ref: /schemas/types.yaml#/definitions/uint32
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addr-gpios:
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description:
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List of GPIO descriptors that will be used to address the MSBs address
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lines. The order goes from LSB to MSB.
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minItems: 1
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maxItems: 8
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'#address-cells':
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const: 1
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'#size-cells':
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const: 1
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big-endian: true
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little-endian: true
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patternProperties:
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'@[0-9a-f]+$':
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$ref: partitions/partition.yaml
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required:
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- compatible
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- reg
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# FIXME: A parent bus may define timing properties
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additionalProperties: true
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examples:
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- |
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flash@ff000000 {
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compatible = "cfi-flash";
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reg = <0xff000000 0x01000000>;
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bank-width = <4>;
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device-width = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0xff000000 0x01000000>;
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fs@0 {
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label = "fs";
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reg = <0 0xf80000>;
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};
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firmware@f80000 {
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label ="firmware";
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reg = <0xf80000 0x80000>;
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read-only;
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};
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};
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- |
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/* An example with multiple "reg" tuples */
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flash@0 {
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compatible = "intel,PC28F640P30T85", "cfi-flash";
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reg = <0x00000000 0x02000000>,
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<0x02000000 0x02000000>;
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bank-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0x04000000>;
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partition@0 {
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label = "test-part1";
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reg = <0 0x04000000>;
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};
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};
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- |
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/* An example using SRAM */
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bus {
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#address-cells = <2>;
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#size-cells = <1>;
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sram@2,0 {
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compatible = "mtd-ram";
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reg = <2 0 0x00200000>;
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bank-width = <2>;
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};
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};
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- |
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/* An example using addr-gpios */
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#include <dt-bindings/gpio/gpio.h>
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flash@20000000 {
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compatible = "cfi-flash";
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reg = <0x20000000 0x02000000>;
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bank-width = <2>;
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addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x00000000 0x02000000>,
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<1 0x02000000 0x02000000>;
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partition@0 {
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label = "test-part1";
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reg = <0 0x04000000>;
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};
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};
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...
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