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net: dsa: b53: Fix IMP port setup on BCM5301x

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Broadcom's b53 switches have one IMP (Inband Management Port) that needs
to be programmed using its own designed register. IMP port may be
different than CPU port - especially on devices with multiple CPU ports.

For that reason it's required to explicitly note IMP port index and
check for it when choosing a register to use.

This commit fixes BCM5301x support. Those switches use CPU port 5 while
their IMP port is 8. Before this patch b53 was trying to program port 5
with B53_PORT_OVERRIDE_CTRL instead of B53_GMII_PORT_OVERRIDE_CTRL(5).

It may be possible to also replace "cpu_port" usages with
dsa_is_cpu_port() but that is out of the scope of thix BCM5301x fix.

Fixes: 967dd82ffc ("net: dsa: b53: Add support for Broadcom RoboSwitch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Rafał Miłecki 2021-09-05 19:23:28 +02:00 committed by David S. Miller
parent 8a0ed250f9
commit 63f8428b40
2 changed files with 26 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
drivers/net/dsa/b53/b53_common.c
View File

@ -1144,7 +1144,7 @@ static void b53_force_link(struct b53_device *dev, int port, int link)
u8 reg, val, off; u8 reg, val, off;
/* Override the port settings */ /* Override the port settings */
if (port == dev->cpu_port) { if (port == dev->imp_port) {
off = B53_PORT_OVERRIDE_CTRL; off = B53_PORT_OVERRIDE_CTRL;
val = PORT_OVERRIDE_EN; val = PORT_OVERRIDE_EN;
} else { } else {
@ -1168,7 +1168,7 @@ static void b53_force_port_config(struct b53_device *dev, int port,
u8 reg, val, off; u8 reg, val, off;
/* Override the port settings */ /* Override the port settings */
if (port == dev->cpu_port) { if (port == dev->imp_port) {
off = B53_PORT_OVERRIDE_CTRL; off = B53_PORT_OVERRIDE_CTRL;
val = PORT_OVERRIDE_EN; val = PORT_OVERRIDE_EN;
} else { } else {
@ -1236,7 +1236,7 @@ static void b53_adjust_link(struct dsa_switch *ds, int port,
b53_force_link(dev, port, phydev->link); b53_force_link(dev, port, phydev->link);
if (is531x5(dev) && phy_interface_is_rgmii(phydev)) { if (is531x5(dev) && phy_interface_is_rgmii(phydev)) {
if (port == 8) if (port == dev->imp_port)
off = B53_RGMII_CTRL_IMP; off = B53_RGMII_CTRL_IMP;
else else
off = B53_RGMII_CTRL_P(port); off = B53_RGMII_CTRL_P(port);
@ -2280,6 +2280,7 @@ struct b53_chip_data {
const char *dev_name; const char *dev_name;
u16 vlans; u16 vlans;
u16 enabled_ports; u16 enabled_ports;
u8 imp_port;
u8 cpu_port; u8 cpu_port;
u8 vta_regs[3]; u8 vta_regs[3];
u8 arl_bins; u8 arl_bins;
@ -2304,6 +2305,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1f, .enabled_ports = 0x1f,
.arl_bins = 2, .arl_bins = 2,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 5,
.cpu_port = B53_CPU_PORT_25, .cpu_port = B53_CPU_PORT_25,
.duplex_reg = B53_DUPLEX_STAT_FE, .duplex_reg = B53_DUPLEX_STAT_FE,
}, },
@ -2314,6 +2316,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1f, .enabled_ports = 0x1f,
.arl_bins = 2, .arl_bins = 2,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 5,
.cpu_port = B53_CPU_PORT_25, .cpu_port = B53_CPU_PORT_25,
.duplex_reg = B53_DUPLEX_STAT_FE, .duplex_reg = B53_DUPLEX_STAT_FE,
}, },
@ -2324,6 +2327,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1f, .enabled_ports = 0x1f,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2337,6 +2341,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1f, .enabled_ports = 0x1f,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2350,6 +2355,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1f, .enabled_ports = 0x1f,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS_9798, .vta_regs = B53_VTA_REGS_9798,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2363,6 +2369,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x7f, .enabled_ports = 0x7f,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS_9798, .vta_regs = B53_VTA_REGS_9798,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2377,6 +2384,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK, .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
@ -2389,6 +2397,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0xff, .enabled_ports = 0xff,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2402,6 +2411,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1ff, .enabled_ports = 0x1ff,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2415,6 +2425,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0, /* pdata must provide them */ .enabled_ports = 0, /* pdata must provide them */
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS_63XX, .vta_regs = B53_VTA_REGS_63XX,
.duplex_reg = B53_DUPLEX_STAT_63XX, .duplex_reg = B53_DUPLEX_STAT_63XX,
@ -2428,6 +2439,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1f, .enabled_ports = 0x1f,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2441,6 +2453,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1bf, .enabled_ports = 0x1bf,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2454,6 +2467,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1bf, .enabled_ports = 0x1bf,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2467,6 +2481,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1f, .enabled_ports = 0x1f,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2480,6 +2495,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1f, .enabled_ports = 0x1f,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */ .cpu_port = B53_CPU_PORT_25, /* TODO: auto detect */
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2493,6 +2509,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1ff, .enabled_ports = 0x1ff,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2506,6 +2523,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x103, .enabled_ports = 0x103,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2520,6 +2538,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1bf, .enabled_ports = 0x1bf,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 256, .arl_buckets = 256,
.imp_port = 8,
.cpu_port = 8, /* TODO: ports 4, 5, 8 */ .cpu_port = 8, /* TODO: ports 4, 5, 8 */
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2533,6 +2552,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1ff, .enabled_ports = 0x1ff,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 1024, .arl_buckets = 1024,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2546,6 +2566,7 @@ static const struct b53_chip_data b53_switch_chips[] = {
.enabled_ports = 0x1ff, .enabled_ports = 0x1ff,
.arl_bins = 4, .arl_bins = 4,
.arl_buckets = 256, .arl_buckets = 256,
.imp_port = 8,
.cpu_port = B53_CPU_PORT, .cpu_port = B53_CPU_PORT,
.vta_regs = B53_VTA_REGS, .vta_regs = B53_VTA_REGS,
.duplex_reg = B53_DUPLEX_STAT_GE, .duplex_reg = B53_DUPLEX_STAT_GE,
@ -2571,6 +2592,7 @@ static int b53_switch_init(struct b53_device *dev)
dev->vta_regs[1] = chip->vta_regs[1]; dev->vta_regs[1] = chip->vta_regs[1];
dev->vta_regs[2] = chip->vta_regs[2]; dev->vta_regs[2] = chip->vta_regs[2];
dev->jumbo_pm_reg = chip->jumbo_pm_reg; dev->jumbo_pm_reg = chip->jumbo_pm_reg;
dev->imp_port = chip->imp_port;
dev->cpu_port = chip->cpu_port; dev->cpu_port = chip->cpu_port;
dev->num_vlans = chip->vlans; dev->num_vlans = chip->vlans;
dev->num_arl_bins = chip->arl_bins; dev->num_arl_bins = chip->arl_bins;

1
drivers/net/dsa/b53/b53_priv.h
View File

@ -123,6 +123,7 @@ struct b53_device {
/* used ports mask */ /* used ports mask */
u16 enabled_ports; u16 enabled_ports;
unsigned int imp_port;
unsigned int cpu_port; unsigned int cpu_port;
/* connect specific data */ /* connect specific data */