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arm64: dts: marvell: add gpio support for Armada 7K/8K
Enable gpio support for CP and AP on the Marvell Armada 7K/8K SoCs. The Armada 8K has two CP110 blocks, each having two GPIO controllers. However, in each CP110 block, one of the GPIO controller cannot be used: in the master CP110, only the second GPIO controller can be used, while on the slave CP110, only the first GPIO controller can be used. On the other side, the Armada 7K has only one CP110, but both its GPIO controllers can be used. For this reason, the GPIO controllers are marked as "disabled" in the armada-cp110-master.dtsi and armada-cp110-slave.dtsi files, and only enabled in the per-SoC dtsi files. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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ae701b6002
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@ -46,6 +46,21 @@
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#include "armada-cp110-master.dtsi"
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/ {
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aliases {
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gpio1 = &cpm_gpio1;
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gpio2 = &cpm_gpio2;
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};
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};
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&cpm_gpio1 {
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status = "okay";
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};
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&cpm_gpio2 {
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status = "okay";
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};
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&cpm_syscon0 {
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cpm_pinctrl: pinctrl {
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compatible = "marvell,armada-7k-pinctrl";
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@ -47,6 +47,22 @@
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#include "armada-cp110-master.dtsi"
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#include "armada-cp110-slave.dtsi"
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/ {
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aliases {
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gpio1 = &cps_gpio1;
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gpio2 = &cpm_gpio2;
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};
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};
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/* The 80x0 has two CP blocks, but uses only one block from each. */
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&cps_gpio1 {
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status = "okay";
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};
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&cpm_gpio2 {
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status = "okay";
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};
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&cpm_syscon0 {
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cpm_pinctrl: pinctrl {
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compatible = "marvell,armada-8k-cpm-pinctrl";
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@ -57,6 +57,7 @@
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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gpio0 = &ap_gpio;
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};
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psci {
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@ -256,6 +257,15 @@
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ap_pinctrl: pinctrl {
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compatible = "marvell,ap806-pinctrl";
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};
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ap_gpio: gpio {
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compatible = "marvell,armada-8k-gpio";
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offset = <0x1040>;
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ngpios = <19>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&ap_pinctrl 0 0 19>;
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};
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};
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};
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};
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@ -114,6 +114,27 @@
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compatible = "marvell,cp110-clock";
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#clock-cells = <2>;
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};
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cpm_gpio1: gpio@100 {
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compatible = "marvell,armada-8k-gpio";
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offset = <0x100>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&cpm_pinctrl 0 0 32>;
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status = "disabled";
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};
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cpm_gpio2: gpio@140 {
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compatible = "marvell,armada-8k-gpio";
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offset = <0x140>;
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ngpios = <31>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&cpm_pinctrl 0 32 31>;
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status = "disabled";
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};
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};
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cpm_rtc: rtc@284000 {
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@ -121,6 +121,28 @@
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compatible = "marvell,cp110-clock";
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#clock-cells = <2>;
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};
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cps_gpio1: gpio@100 {
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compatible = "marvell,armada-8k-gpio";
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offset = <0x100>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&cps_pinctrl 0 0 32>;
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status = "disabled";
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};
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cps_gpio2: gpio@140 {
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compatible = "marvell,armada-8k-gpio";
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offset = <0x140>;
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ngpios = <31>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&cps_pinctrl 0 32 31>;
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status = "disabled";
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};
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};
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cps_sata0: sata@540000 {
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