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x86: apic - unify init_bsp_APIC
- remove redundant read of APIC_LVR register in 64bit mode - APIC is always integrated for 64bit mode so gcc will eliminate lapic_is_integrated call Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com> Acked-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -925,7 +925,7 @@ void __init sync_Arb_IDs(void)
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*/
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void __init init_bsp_APIC(void)
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{
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unsigned long value;
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unsigned int value;
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/*
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* Don't do the setup now if we have a SMP BIOS as the
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@ -946,11 +946,13 @@ void __init init_bsp_APIC(void)
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value &= ~APIC_VECTOR_MASK;
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value |= APIC_SPIV_APIC_ENABLED;
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#ifdef CONFIG_X86_32
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/* This bit is reserved on P4/Xeon and should be cleared */
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if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
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(boot_cpu_data.x86 == 15))
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value &= ~APIC_SPIV_FOCUS_DISABLED;
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else
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#endif
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value |= APIC_SPIV_FOCUS_DISABLED;
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value |= SPURIOUS_APIC_VECTOR;
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apic_write(APIC_SPIV, value);
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@ -773,8 +773,6 @@ void __init init_bsp_APIC(void)
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if (smp_found_config || !cpu_has_apic)
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return;
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value = apic_read(APIC_LVR);
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/*
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* Do not trust the local APIC being empty at bootup.
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*/
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@ -786,7 +784,15 @@ void __init init_bsp_APIC(void)
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value = apic_read(APIC_SPIV);
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value &= ~APIC_VECTOR_MASK;
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value |= APIC_SPIV_APIC_ENABLED;
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value |= APIC_SPIV_FOCUS_DISABLED;
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#ifdef CONFIG_X86_32
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/* This bit is reserved on P4/Xeon and should be cleared */
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if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) &&
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(boot_cpu_data.x86 == 15))
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value &= ~APIC_SPIV_FOCUS_DISABLED;
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else
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#endif
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value |= APIC_SPIV_FOCUS_DISABLED;
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value |= SPURIOUS_APIC_VECTOR;
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apic_write(APIC_SPIV, value);
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@ -795,6 +801,8 @@ void __init init_bsp_APIC(void)
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*/
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apic_write(APIC_LVT0, APIC_DM_EXTINT);
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value = APIC_DM_NMI;
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if (!lapic_is_integrated()) /* 82489DX */
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value |= APIC_LVT_LEVEL_TRIGGER;
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apic_write(APIC_LVT1, value);
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}
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