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i2c-i801: Implement I2C block read support
I2C block read is supported since the ICH5. I couldn't get it to work using the block buffer, so it's using the old-style byte-by-byte mode for now. Note: I'm also updating the driver author... The i2c-i801 driver was really written by Mark Studebaker, even though he based his work on the i2c-piix4 driver which was written by Philip Edelbrock. Signed-off-by: Jean Delvare <khali@linux-fr.org>
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@ -17,9 +17,8 @@ Supported adapters:
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Datasheets: Publicly available at the Intel website
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Authors:
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Frodo Looijaard <frodol@dds.nl>,
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Philip Edelbrock <phil@netroedge.com>,
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Mark Studebaker <mdsxyz123@yahoo.com>
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Jean Delvare <khali@linux-fr.org>
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Module Parameters
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@ -62,7 +61,7 @@ Not supported.
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I2C Block Read Support
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----------------------
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Not supported at the moment.
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I2C block read is supported on the 82801EB (ICH5) and later chips.
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SMBus 2.0 Support
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@ -4,6 +4,7 @@
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Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>,
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Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
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<mdsxyz123@yahoo.com>
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Copyright (C) 2007 Jean Delvare <khali@linux-fr.org>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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@ -46,7 +47,7 @@
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Hardware PEC yes
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Block buffer yes
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Block process call transaction no
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I2C block read transaction no
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I2C block read transaction yes (doesn't use the block buffer)
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See the file Documentation/i2c/busses/i2c-i801 for details.
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*/
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@ -102,9 +103,9 @@
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#define I801_WORD_DATA 0x0C
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#define I801_PROC_CALL 0x10 /* unimplemented */
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#define I801_BLOCK_DATA 0x14
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#define I801_I2C_BLOCK_DATA 0x18 /* unimplemented */
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#define I801_I2C_BLOCK_DATA 0x18 /* ICH5 and later */
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#define I801_BLOCK_LAST 0x34
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#define I801_I2C_BLOCK_LAST 0x38 /* unimplemented */
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#define I801_I2C_BLOCK_LAST 0x38 /* ICH5 and later */
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#define I801_START 0x40
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#define I801_PEC_EN 0x80 /* ICH3 and later */
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@ -256,7 +257,8 @@ static int i801_block_transaction_by_block(union i2c_smbus_data *data,
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}
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static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
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char read_write, int hwpec)
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char read_write, int command,
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int hwpec)
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{
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int i, len;
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int smbcmd;
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@ -273,16 +275,24 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
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}
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for (i = 1; i <= len; i++) {
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if (i == len && read_write == I2C_SMBUS_READ)
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smbcmd = I801_BLOCK_LAST;
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else
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smbcmd = I801_BLOCK_DATA;
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if (i == len && read_write == I2C_SMBUS_READ) {
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if (command == I2C_SMBUS_I2C_BLOCK_DATA)
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smbcmd = I801_I2C_BLOCK_LAST;
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else
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smbcmd = I801_BLOCK_LAST;
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} else {
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if (command == I2C_SMBUS_I2C_BLOCK_DATA
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&& read_write == I2C_SMBUS_READ)
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smbcmd = I801_I2C_BLOCK_DATA;
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else
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smbcmd = I801_BLOCK_DATA;
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}
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outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT);
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dev_dbg(&I801_dev->dev, "Block (pre %d): CNT=%02x, CMD=%02x, "
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"ADD=%02x, DAT0=%02x, BLKDAT=%02x\n", i,
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"ADD=%02x, DAT0=%02x, DAT1=%02x, BLKDAT=%02x\n", i,
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inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
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inb_p(SMBHSTDAT0), inb_p(SMBBLKDAT));
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inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1), inb_p(SMBBLKDAT));
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/* Make sure the SMBus host is ready to start transmitting */
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temp = inb_p(SMBHSTSTS);
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@ -346,7 +356,8 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
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dev_dbg(&I801_dev->dev, "Error: no response!\n");
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}
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if (i == 1 && read_write == I2C_SMBUS_READ) {
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if (i == 1 && read_write == I2C_SMBUS_READ
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&& command != I2C_SMBUS_I2C_BLOCK_DATA) {
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len = inb_p(SMBHSTDAT0);
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if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
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return -1;
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@ -367,9 +378,9 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
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temp);
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}
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dev_dbg(&I801_dev->dev, "Block (post %d): CNT=%02x, CMD=%02x, "
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"ADD=%02x, DAT0=%02x, BLKDAT=%02x\n", i,
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"ADD=%02x, DAT0=%02x, DAT1=%02x, BLKDAT=%02x\n", i,
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inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
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inb_p(SMBHSTDAT0), inb_p(SMBBLKDAT));
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inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1), inb_p(SMBBLKDAT));
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if (result < 0)
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return result;
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@ -398,34 +409,38 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
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pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc);
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pci_write_config_byte(I801_dev, SMBHSTCFG,
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hostc | SMBHSTCFG_I2C_EN);
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} else {
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} else if (!(i801_features & FEATURE_I2C_BLOCK_READ)) {
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dev_err(&I801_dev->dev,
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"I2C_SMBUS_I2C_BLOCK_READ not DB!\n");
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"I2C block read is unsupported!\n");
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return -1;
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}
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}
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if (read_write == I2C_SMBUS_WRITE) {
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if (read_write == I2C_SMBUS_WRITE
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|| command == I2C_SMBUS_I2C_BLOCK_DATA) {
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if (data->block[0] < 1)
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data->block[0] = 1;
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if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
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data->block[0] = I2C_SMBUS_BLOCK_MAX;
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} else {
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data->block[0] = 32; /* max for reads */
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data->block[0] = 32; /* max for SMBus block reads */
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}
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if ((i801_features & FEATURE_BLOCK_BUFFER)
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&& !(command == I2C_SMBUS_I2C_BLOCK_DATA
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&& read_write == I2C_SMBUS_READ)
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&& i801_set_block_buffer_mode() == 0)
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result = i801_block_transaction_by_block(data, read_write,
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hwpec);
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else
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result = i801_block_transaction_byte_by_byte(data, read_write,
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hwpec);
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command, hwpec);
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if (result == 0 && hwpec)
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i801_wait_hwpec();
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if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
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if (command == I2C_SMBUS_I2C_BLOCK_DATA
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&& read_write == I2C_SMBUS_WRITE) {
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/* restore saved configuration register value */
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pci_write_config_byte(I801_dev, SMBHSTCFG, hostc);
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}
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@ -477,12 +492,23 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr,
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xact = I801_WORD_DATA;
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break;
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case I2C_SMBUS_BLOCK_DATA:
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case I2C_SMBUS_I2C_BLOCK_DATA:
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outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
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SMBHSTADD);
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outb_p(command, SMBHSTCMD);
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block = 1;
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break;
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case I2C_SMBUS_I2C_BLOCK_DATA:
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/* NB: page 240 of ICH5 datasheet shows that the R/#W
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* bit should be cleared here, even when reading */
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outb_p((addr & 0x7f) << 1, SMBHSTADD);
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if (read_write == I2C_SMBUS_READ) {
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/* NB: page 240 of ICH5 datasheet also shows
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* that DATA1 is the cmd field when reading */
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outb_p(command, SMBHSTDAT1);
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} else
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outb_p(command, SMBHSTCMD);
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block = 1;
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break;
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case I2C_SMBUS_PROC_CALL:
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default:
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dev_err(&I801_dev->dev, "Unsupported transaction %d\n", size);
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@ -531,7 +557,9 @@ static u32 i801_func(struct i2c_adapter *adapter)
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return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
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((i801_features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0);
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((i801_features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
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((i801_features & FEATURE_I2C_BLOCK_READ) ?
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I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
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}
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static const struct i2c_algorithm smbus_algorithm = {
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@ -573,7 +601,6 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
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I801_dev = dev;
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i801_features = 0;
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switch (dev->device) {
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case PCI_DEVICE_ID_INTEL_82801DB_3:
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case PCI_DEVICE_ID_INTEL_82801EB_3:
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case PCI_DEVICE_ID_INTEL_ESB_4:
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case PCI_DEVICE_ID_INTEL_ICH6_16:
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@ -581,6 +608,9 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
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case PCI_DEVICE_ID_INTEL_ESB2_17:
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case PCI_DEVICE_ID_INTEL_ICH8_5:
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case PCI_DEVICE_ID_INTEL_ICH9_6:
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i801_features |= FEATURE_I2C_BLOCK_READ;
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/* fall through */
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case PCI_DEVICE_ID_INTEL_82801DB_3:
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case PCI_DEVICE_ID_INTEL_TOLAPAI_1:
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i801_features |= FEATURE_SMBUS_PEC;
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i801_features |= FEATURE_BLOCK_BUFFER;
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@ -698,9 +728,8 @@ static void __exit i2c_i801_exit(void)
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pci_unregister_driver(&i801_driver);
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}
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MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, "
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"Philip Edelbrock <phil@netroedge.com>, "
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"and Mark D. Studebaker <mdsxyz123@yahoo.com>");
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MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>, "
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"Jean Delvare <khali@linux-fr.org>");
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MODULE_DESCRIPTION("I801 SMBus driver");
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MODULE_LICENSE("GPL");
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