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RDMA/vmw_pvrdma: Return the correct opcode when creating WR
Since the IB_WR_REG_MR opcode value changed, let's set the PVRDMA device
opcodes explicitly.
Reported-by: Ruishuang Wang <ruishuangw@vmware.com>
Fixes: 9a59739bd0
("IB/rxe: Revise the ib_wr_opcode enum")
Cc: stable@vger.kernel.org
Reviewed-by: Bryan Tan <bryantan@vmware.com>
Reviewed-by: Ruishuang Wang <ruishuangw@vmware.com>
Reviewed-by: Vishnu Dasa <vdasa@vmware.com>
Signed-off-by: Adit Ranadive <aditr@vmware.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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parent
917cb8a72a
commit
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@ -427,7 +427,40 @@ static inline enum ib_qp_state pvrdma_qp_state_to_ib(enum pvrdma_qp_state state)
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static inline enum pvrdma_wr_opcode ib_wr_opcode_to_pvrdma(enum ib_wr_opcode op)
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{
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return (enum pvrdma_wr_opcode)op;
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switch (op) {
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case IB_WR_RDMA_WRITE:
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return PVRDMA_WR_RDMA_WRITE;
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case IB_WR_RDMA_WRITE_WITH_IMM:
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return PVRDMA_WR_RDMA_WRITE_WITH_IMM;
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case IB_WR_SEND:
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return PVRDMA_WR_SEND;
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case IB_WR_SEND_WITH_IMM:
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return PVRDMA_WR_SEND_WITH_IMM;
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case IB_WR_RDMA_READ:
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return PVRDMA_WR_RDMA_READ;
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case IB_WR_ATOMIC_CMP_AND_SWP:
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return PVRDMA_WR_ATOMIC_CMP_AND_SWP;
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case IB_WR_ATOMIC_FETCH_AND_ADD:
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return PVRDMA_WR_ATOMIC_FETCH_AND_ADD;
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case IB_WR_LSO:
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return PVRDMA_WR_LSO;
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case IB_WR_SEND_WITH_INV:
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return PVRDMA_WR_SEND_WITH_INV;
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case IB_WR_RDMA_READ_WITH_INV:
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return PVRDMA_WR_RDMA_READ_WITH_INV;
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case IB_WR_LOCAL_INV:
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return PVRDMA_WR_LOCAL_INV;
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case IB_WR_REG_MR:
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return PVRDMA_WR_FAST_REG_MR;
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case IB_WR_MASKED_ATOMIC_CMP_AND_SWP:
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return PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP;
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case IB_WR_MASKED_ATOMIC_FETCH_AND_ADD:
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return PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD;
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case IB_WR_REG_SIG_MR:
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return PVRDMA_WR_REG_SIG_MR;
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default:
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return PVRDMA_WR_ERROR;
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}
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}
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static inline enum ib_wc_status pvrdma_wc_status_to_ib(
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@ -721,6 +721,12 @@ int pvrdma_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
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wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM)
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wqe_hdr->ex.imm_data = wr->ex.imm_data;
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if (unlikely(wqe_hdr->opcode == PVRDMA_WR_ERROR)) {
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*bad_wr = wr;
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ret = -EINVAL;
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goto out;
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}
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switch (qp->ibqp.qp_type) {
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case IB_QPT_GSI:
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case IB_QPT_UD:
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@ -78,6 +78,7 @@ enum pvrdma_wr_opcode {
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PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,
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PVRDMA_WR_BIND_MW,
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PVRDMA_WR_REG_SIG_MR,
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PVRDMA_WR_ERROR,
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};
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enum pvrdma_wc_status {
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