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PCI: Introduce pci_pcie_type(dev) to replace pci_dev->pcie_type
Introduce an inline function pci_pcie_type(dev) to extract PCIe device type from pci_dev->pcie_flags_reg field, and prepare for removing pci_dev->pcie_type. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
786e22885d
commit
62f87c0e31
@ -855,7 +855,7 @@ static void __devinit pnv_ioda_setup_PEs(struct pci_bus *bus)
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if (pe == NULL)
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continue;
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/* Leaving the PCIe domain ... single PE# */
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if (dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE)
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE)
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pnv_ioda_setup_bus_PE(dev, pe);
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else if (dev->subordinate)
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pnv_ioda_setup_PEs(dev->subordinate);
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@ -2350,7 +2350,7 @@ static int iommu_should_identity_map(struct pci_dev *pdev, int startup)
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return 0;
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if (pdev->class >> 8 == PCI_CLASS_BRIDGE_PCI)
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return 0;
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} else if (pdev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE)
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} else if (pci_pcie_type(pdev) == PCI_EXP_TYPE_PCI_BRIDGE)
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return 0;
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/*
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@ -3545,10 +3545,10 @@ found:
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struct pci_dev *bridge = bus->self;
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if (!bridge || !pci_is_pcie(bridge) ||
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bridge->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE)
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pci_pcie_type(bridge) == PCI_EXP_TYPE_PCI_BRIDGE)
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return 0;
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if (bridge->pcie_type == PCI_EXP_TYPE_ROOT_PORT) {
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if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT) {
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for (i = 0; i < atsru->devices_cnt; i++)
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if (atsru->devices[i] == bridge)
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return 1;
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@ -7527,7 +7527,7 @@ static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
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goto skip_bad_vf_detection;
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bdev = pdev->bus->self;
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while (bdev && (bdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT))
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while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
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bdev = bdev->bus->self;
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if (!bdev)
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@ -1382,7 +1382,7 @@ static void netxen_mask_aer_correctable(struct netxen_adapter *adapter)
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adapter->ahw.board_type != NETXEN_BRDTYPE_P3_10G_TP)
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return;
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if (root->pcie_type != PCI_EXP_TYPE_ROOT_PORT)
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if (pci_pcie_type(root) != PCI_EXP_TYPE_ROOT_PORT)
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return;
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aer_pos = pci_find_ext_capability(root, PCI_EXT_CAP_ID_ERR);
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@ -433,8 +433,8 @@ static int sriov_init(struct pci_dev *dev, int pos)
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struct resource *res;
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struct pci_dev *pdev;
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if (dev->pcie_type != PCI_EXP_TYPE_RC_END &&
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dev->pcie_type != PCI_EXP_TYPE_ENDPOINT)
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if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
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pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
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return -ENODEV;
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pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
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@ -503,7 +503,7 @@ found:
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iov->self = dev;
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pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
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pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
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if (dev->pcie_type == PCI_EXP_TYPE_RC_END)
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
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iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
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if (pdev)
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@ -885,7 +885,7 @@ static struct pci_cap_saved_state *pci_find_saved_cap(
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static int pci_save_pcie_state(struct pci_dev *dev)
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{
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int pos, i = 0;
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int type, pos, i = 0;
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struct pci_cap_saved_state *save_state;
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u16 *cap;
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u16 flags;
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@ -903,13 +903,14 @@ static int pci_save_pcie_state(struct pci_dev *dev)
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pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
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if (pcie_cap_has_devctl(dev->pcie_type, flags))
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type = pci_pcie_type(dev);
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if (pcie_cap_has_devctl(type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &cap[i++]);
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if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
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if (pcie_cap_has_lnkctl(type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &cap[i++]);
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if (pcie_cap_has_sltctl(dev->pcie_type, flags))
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if (pcie_cap_has_sltctl(type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_SLTCTL, &cap[i++]);
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if (pcie_cap_has_rtctl(dev->pcie_type, flags))
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if (pcie_cap_has_rtctl(type, flags))
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pci_read_config_word(dev, pos + PCI_EXP_RTCTL, &cap[i++]);
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pos = pci_pcie_cap2(dev);
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@ -924,7 +925,7 @@ static int pci_save_pcie_state(struct pci_dev *dev)
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static void pci_restore_pcie_state(struct pci_dev *dev)
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{
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int i = 0, pos;
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int i = 0, pos, type;
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struct pci_cap_saved_state *save_state;
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u16 *cap;
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u16 flags;
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@ -937,13 +938,14 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
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pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &flags);
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if (pcie_cap_has_devctl(dev->pcie_type, flags))
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type = pci_pcie_type(dev);
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if (pcie_cap_has_devctl(type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, cap[i++]);
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if (pcie_cap_has_lnkctl(dev->pcie_type, flags))
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if (pcie_cap_has_lnkctl(type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, cap[i++]);
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if (pcie_cap_has_sltctl(dev->pcie_type, flags))
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if (pcie_cap_has_sltctl(type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_SLTCTL, cap[i++]);
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if (pcie_cap_has_rtctl(dev->pcie_type, flags))
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if (pcie_cap_has_rtctl(type, flags))
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pci_write_config_word(dev, pos + PCI_EXP_RTCTL, cap[i++]);
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pos = pci_pcie_cap2(dev);
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@ -2459,8 +2461,8 @@ bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags)
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acs_flags &= (PCI_ACS_RR | PCI_ACS_CR |
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PCI_ACS_EC | PCI_ACS_DT);
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if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM ||
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pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
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if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM ||
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pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
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pdev->multifunction) {
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ACS);
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if (!pos)
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@ -288,7 +288,7 @@ static struct pci_dev *pcie_find_root_port(struct pci_dev *dev)
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while (1) {
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if (!pci_is_pcie(dev))
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break;
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if (dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
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return dev;
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if (!dev->bus->self)
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break;
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@ -81,10 +81,11 @@ bool pci_aer_available(void)
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static int set_device_error_reporting(struct pci_dev *dev, void *data)
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{
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bool enable = *((bool *)data);
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int type = pci_pcie_type(dev);
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if ((dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) ||
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(dev->pcie_type == PCI_EXP_TYPE_UPSTREAM) ||
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(dev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)) {
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if ((type == PCI_EXP_TYPE_ROOT_PORT) ||
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(type == PCI_EXP_TYPE_UPSTREAM) ||
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(type == PCI_EXP_TYPE_DOWNSTREAM)) {
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if (enable)
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pci_enable_pcie_error_reporting(dev);
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else
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@ -60,7 +60,7 @@ static int aer_hest_parse(struct acpi_hest_header *hest_hdr, void *data)
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p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
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if (p->flags & ACPI_HEST_GLOBAL) {
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if ((pci_is_pcie(info->pci_dev) &&
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info->pci_dev->pcie_type == pcie_type) || bridge)
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pci_pcie_type(info->pci_dev) == pcie_type) || bridge)
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ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
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} else
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if (hest_match_pci(p, info->pci_dev))
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@ -465,7 +465,7 @@ static pci_ers_result_t reset_link(struct pci_dev *dev)
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if (driver && driver->reset_link) {
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status = driver->reset_link(udev);
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} else if (udev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
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} else if (pci_pcie_type(udev) == PCI_EXP_TYPE_DOWNSTREAM) {
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status = default_downstream_reset_link(udev);
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} else {
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dev_printk(KERN_DEBUG, &dev->dev,
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@ -412,7 +412,7 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
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* do ASPM for now.
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*/
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list_for_each_entry(child, &linkbus->devices, bus_list) {
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if (child->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
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if (pci_pcie_type(child) == PCI_EXP_TYPE_PCI_BRIDGE) {
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link->aspm_disable = ASPM_STATE_ALL;
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break;
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}
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@ -425,8 +425,8 @@ static void pcie_aspm_cap_init(struct pcie_link_state *link, int blacklist)
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struct aspm_latency *acceptable =
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&link->acceptable[PCI_FUNC(child->devfn)];
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if (child->pcie_type != PCI_EXP_TYPE_ENDPOINT &&
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child->pcie_type != PCI_EXP_TYPE_LEG_END)
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if (pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT &&
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pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END)
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continue;
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pos = pci_pcie_cap(child);
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@ -552,7 +552,7 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev)
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INIT_LIST_HEAD(&link->children);
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INIT_LIST_HEAD(&link->link);
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link->pdev = pdev;
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if (pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
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if (pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM) {
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struct pcie_link_state *parent;
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parent = pdev->bus->parent->self->link_state;
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if (!parent) {
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@ -585,12 +585,12 @@ void pcie_aspm_init_link_state(struct pci_dev *pdev)
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if (!pci_is_pcie(pdev) || pdev->link_state)
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return;
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if (pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
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pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)
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if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
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pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM)
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return;
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/* VIA has a strange chipset, root port is under a bridge */
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if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT &&
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if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT &&
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pdev->bus->self)
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return;
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@ -647,8 +647,8 @@ static void pcie_update_aspm_capable(struct pcie_link_state *root)
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if (link->root != root)
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continue;
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list_for_each_entry(child, &linkbus->devices, bus_list) {
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if ((child->pcie_type != PCI_EXP_TYPE_ENDPOINT) &&
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(child->pcie_type != PCI_EXP_TYPE_LEG_END))
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if ((pci_pcie_type(child) != PCI_EXP_TYPE_ENDPOINT) &&
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(pci_pcie_type(child) != PCI_EXP_TYPE_LEG_END))
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continue;
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pcie_aspm_check_latency(child);
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}
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@ -663,8 +663,8 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
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if (!pci_is_pcie(pdev) || !parent || !parent->link_state)
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return;
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if ((parent->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
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(parent->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
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if ((pci_pcie_type(parent) != PCI_EXP_TYPE_ROOT_PORT) &&
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(pci_pcie_type(parent) != PCI_EXP_TYPE_DOWNSTREAM))
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return;
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down_read(&pci_bus_sem);
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@ -704,8 +704,8 @@ void pcie_aspm_pm_state_change(struct pci_dev *pdev)
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if (aspm_disabled || !pci_is_pcie(pdev) || !link)
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return;
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if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
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(pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
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if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
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(pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
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return;
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/*
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* Devices changed PM state, we should recheck if latency
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@ -729,8 +729,8 @@ void pcie_aspm_powersave_config_link(struct pci_dev *pdev)
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if (aspm_policy != POLICY_POWERSAVE)
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return;
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if ((pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
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(pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM))
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if ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) &&
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(pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
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return;
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down_read(&pci_bus_sem);
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@ -757,8 +757,8 @@ static void __pci_disable_link_state(struct pci_dev *pdev, int state, bool sem,
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if (!pci_is_pcie(pdev))
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return;
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if (pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
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pdev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM)
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if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
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pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM)
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parent = pdev;
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if (!parent || !parent->link_state)
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return;
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@ -933,8 +933,8 @@ void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev)
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struct pcie_link_state *link_state = pdev->link_state;
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if (!pci_is_pcie(pdev) ||
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(pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
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pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
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(pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
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pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
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return;
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if (link_state->aspm_support)
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@ -950,8 +950,8 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev)
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struct pcie_link_state *link_state = pdev->link_state;
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if (!pci_is_pcie(pdev) ||
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(pdev->pcie_type != PCI_EXP_TYPE_ROOT_PORT &&
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pdev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
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(pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
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pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM) || !link_state)
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return;
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if (link_state->aspm_support)
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@ -120,7 +120,7 @@ static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
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if (!dev)
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return false;
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if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
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if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
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down_read(&pci_bus_sem);
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if (pcie_pme_walk_bus(bus))
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found = true;
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@ -335,13 +335,13 @@ static void pcie_pme_mark_devices(struct pci_dev *port)
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struct pci_dev *dev;
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/* Check if this is a root port event collector. */
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if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus)
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if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
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return;
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down_read(&pci_bus_sem);
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list_for_each_entry(dev, &bus->devices, bus_list)
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if (pci_is_pcie(dev)
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&& dev->pcie_type == PCI_EXP_TYPE_RC_END)
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&& pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
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pcie_pme_set_native(dev, NULL);
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up_read(&pci_bus_sem);
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}
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@ -38,7 +38,7 @@ static int pcie_port_bus_match(struct device *dev, struct device_driver *drv)
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return 0;
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if ((driver->port_type != PCIE_ANY_PORT) &&
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(driver->port_type != pciedev->port->pcie_type))
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(driver->port_type != pci_pcie_type(pciedev->port)))
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return 0;
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return 1;
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@ -298,7 +298,7 @@ static int get_port_device_capability(struct pci_dev *dev)
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services |= PCIE_PORT_SERVICE_VC;
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/* Root ports are capable of generating PME too */
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if ((cap_mask & PCIE_PORT_SERVICE_PME)
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&& dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) {
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&& pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
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services |= PCIE_PORT_SERVICE_PME;
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/*
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* Disable PME interrupt on this port in case it's been enabled
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@ -336,7 +336,7 @@ static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
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device->release = release_pcie_device; /* callback to free pcie dev */
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dev_set_name(device, "%s:pcie%02x",
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pci_name(pdev),
|
||||
get_descriptor_id(pdev->pcie_type, service));
|
||||
get_descriptor_id(pci_pcie_type(pdev), service));
|
||||
device->parent = &pdev->dev;
|
||||
device_enable_async_suspend(device);
|
||||
|
||||
|
@ -95,7 +95,7 @@ static int pcie_port_resume_noirq(struct device *dev)
|
||||
* which breaks ACPI-based runtime wakeup on PCI Express, so clear those
|
||||
* bits now just in case (shouldn't hurt).
|
||||
*/
|
||||
if(pdev->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
|
||||
if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
|
||||
pcie_clear_root_pme_status(pdev);
|
||||
return 0;
|
||||
}
|
||||
@ -186,9 +186,9 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
|
||||
int status;
|
||||
|
||||
if (!pci_is_pcie(dev) ||
|
||||
((dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT) &&
|
||||
(dev->pcie_type != PCI_EXP_TYPE_UPSTREAM) &&
|
||||
(dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)))
|
||||
((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
|
||||
(pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
|
||||
(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
|
||||
return -ENODEV;
|
||||
|
||||
if (!dev->irq && dev->pin) {
|
||||
|
@ -1384,9 +1384,9 @@ static int only_one_child(struct pci_bus *bus)
|
||||
|
||||
if (!parent || !pci_is_pcie(parent))
|
||||
return 0;
|
||||
if (parent->pcie_type == PCI_EXP_TYPE_ROOT_PORT)
|
||||
if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
|
||||
return 1;
|
||||
if (parent->pcie_type == PCI_EXP_TYPE_DOWNSTREAM &&
|
||||
if (pci_pcie_type(parent) == PCI_EXP_TYPE_DOWNSTREAM &&
|
||||
!pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
|
||||
return 1;
|
||||
return 0;
|
||||
@ -1463,7 +1463,7 @@ static int pcie_find_smpss(struct pci_dev *dev, void *data)
|
||||
*/
|
||||
if (dev->is_hotplug_bridge && (!list_is_singular(&dev->bus->devices) ||
|
||||
(dev->bus->self &&
|
||||
dev->bus->self->pcie_type != PCI_EXP_TYPE_ROOT_PORT)))
|
||||
pci_pcie_type(dev->bus->self) != PCI_EXP_TYPE_ROOT_PORT)))
|
||||
*smpss = 0;
|
||||
|
||||
if (*smpss > dev->pcie_mpss)
|
||||
@ -1479,7 +1479,8 @@ static void pcie_write_mps(struct pci_dev *dev, int mps)
|
||||
if (pcie_bus_config == PCIE_BUS_PERFORMANCE) {
|
||||
mps = 128 << dev->pcie_mpss;
|
||||
|
||||
if (dev->pcie_type != PCI_EXP_TYPE_ROOT_PORT && dev->bus->self)
|
||||
if (pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT &&
|
||||
dev->bus->self)
|
||||
/* For "Performance", the assumption is made that
|
||||
* downstream communication will never be larger than
|
||||
* the MRRS. So, the MPS only needs to be configured
|
||||
|
@ -41,7 +41,7 @@ pci_find_upstream_pcie_bridge(struct pci_dev *pdev)
|
||||
continue;
|
||||
}
|
||||
/* PCI device should connect to a PCIe bridge */
|
||||
if (pdev->pcie_type != PCI_EXP_TYPE_PCI_BRIDGE) {
|
||||
if (pci_pcie_type(pdev) != PCI_EXP_TYPE_PCI_BRIDGE) {
|
||||
/* Busted hardware? */
|
||||
WARN_ON_ONCE(1);
|
||||
return NULL;
|
||||
|
Loading…
Reference in New Issue
Block a user