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ARM: 8739/1: NOMMU: Setup VBAR/Hivecs for secondaries cores
With switch to dynamic exception base address setting, VBAR/Hivecs
set only for boot CPU, but secondaries stay unaware of that. That
might lead to weird effects when trying up to bring up secondaries.
Fixes: ad475117d2
("ARM: 8649/2: nommu: remove Hivecs configuration is asm")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@ -88,6 +88,7 @@
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#else /* CONFIG_MMU */
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#ifndef __ASSEMBLY__
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extern unsigned long setup_vectors_base(void);
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extern unsigned long vectors_base;
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#define VECTORS_BASE vectors_base
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#endif
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@ -379,6 +379,9 @@ asmlinkage void secondary_start_kernel(void)
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cpu_init();
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#ifndef CONFIG_MMU
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setup_vectors_base();
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#endif
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pr_debug("CPU%u: Booted secondary processor\n", cpu);
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preempt_disable();
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@ -31,7 +31,7 @@ struct mpu_rgn_info mpu_rgn_info;
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#ifdef CONFIG_CPU_CP15
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#ifdef CONFIG_CPU_HIGH_VECTOR
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static unsigned long __init setup_vectors_base(void)
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unsigned long setup_vectors_base(void)
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{
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unsigned long reg = get_cr();
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@ -57,7 +57,7 @@ static inline bool security_extensions_enabled(void)
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return 0;
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}
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static unsigned long __init setup_vectors_base(void)
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unsigned long setup_vectors_base(void)
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{
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unsigned long base = 0, reg = get_cr();
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