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drm/i915: Share the computation of ring size for RING_CTL register
Since both legacy and execlists want to populate the RING_CTL register, share the computation of the right bits for the ring->size. We can then stop masking errors and explicitly forbid them during creation! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20161004201132.21801-1-chris@chris-wilson.co.uk
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@ -1605,6 +1605,7 @@ enum skl_disp_power_wells {
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#define RING_HEAD(base) _MMIO((base)+0x34)
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#define RING_START(base) _MMIO((base)+0x38)
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#define RING_CTL(base) _MMIO((base)+0x3c)
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#define RING_CTL_SIZE(size) ((size) - PAGE_SIZE) /* in bytes -> pages */
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#define RING_SYNC_0(base) _MMIO((base)+0x40)
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#define RING_SYNC_1(base) _MMIO((base)+0x44)
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#define RING_SYNC_2(base) _MMIO((base)+0x48)
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@ -1946,7 +1946,7 @@ populate_lr_context(struct i915_gem_context *ctx,
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RING_START(engine->mmio_base), 0);
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ASSIGN_CTX_REG(reg_state, CTX_RING_BUFFER_CONTROL,
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RING_CTL(engine->mmio_base),
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((ring->size - PAGE_SIZE) & RING_NR_PAGES) | RING_VALID);
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RING_CTL_SIZE(ring->size) | RING_VALID);
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ASSIGN_CTX_REG(reg_state, CTX_BB_HEAD_U,
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RING_BBADDR_UDW(engine->mmio_base), 0);
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ASSIGN_CTX_REG(reg_state, CTX_BB_HEAD_L,
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@ -585,9 +585,7 @@ static int init_ring_common(struct intel_engine_cs *engine)
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I915_WRITE_TAIL(engine, ring->tail);
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(void)I915_READ_TAIL(engine);
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I915_WRITE_CTL(engine,
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((ring->size - PAGE_SIZE) & RING_NR_PAGES)
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| RING_VALID);
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I915_WRITE_CTL(engine, RING_CTL_SIZE(ring->size) | RING_VALID);
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/* If the head is still not zero, the ring is dead */
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if (intel_wait_for_register_fw(dev_priv, RING_CTL(engine->mmio_base),
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@ -1951,6 +1949,7 @@ intel_engine_create_ring(struct intel_engine_cs *engine, int size)
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struct i915_vma *vma;
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GEM_BUG_ON(!is_power_of_2(size));
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GEM_BUG_ON(RING_CTL_SIZE(size) & ~RING_NR_PAGES);
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ring = kzalloc(sizeof(*ring), GFP_KERNEL);
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if (!ring)
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