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clocksource/drivers/exynos_mct: Increase priority over ARM arch timer
Exynos SoCs based on CA7/CA15 have 2 timer interfaces: custom Exynos MCT (Multi Core Timer) and standard ARM Architected Timers. There are use cases, where both timer interfaces are used simultanously. One of such examples is using Exynos MCT for the main system timer and ARM Architected Timers for the KVM and virtualized guests (KVM requires arch timers). Exynos Multi-Core Timer driver (exynos_mct) must be however started before ARM Architected Timers (arch_timer), because they both share some common hardware blocks (global system counter) and turning on MCT is needed to get ARM Architected Timer working properly. To ensure selecting Exynos MCT as the main system timer, increase MCT timer rating. To ensure proper starting order of both timers during suspend/resume cycle, increase MCT hotplug priority over ARM Archictected Timers. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -209,7 +209,7 @@ static void exynos4_frc_resume(struct clocksource *cs)
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static struct clocksource mct_frc = {
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static struct clocksource mct_frc = {
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.name = "mct-frc",
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.name = "mct-frc",
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.rating = 400,
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.rating = 450, /* use value higher than ARM arch timer */
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.read = exynos4_frc_read,
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.read = exynos4_frc_read,
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.mask = CLOCKSOURCE_MASK(32),
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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@ -464,7 +464,7 @@ static int exynos4_mct_starting_cpu(unsigned int cpu)
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evt->set_state_oneshot_stopped = set_state_shutdown;
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evt->set_state_oneshot_stopped = set_state_shutdown;
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evt->tick_resume = set_state_shutdown;
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evt->tick_resume = set_state_shutdown;
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evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
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evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
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evt->rating = 450;
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evt->rating = 500; /* use value higher than ARM arch timer */
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exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
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exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
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@ -116,10 +116,10 @@ enum cpuhp_state {
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CPUHP_AP_PERF_ARM_ACPI_STARTING,
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CPUHP_AP_PERF_ARM_ACPI_STARTING,
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CPUHP_AP_PERF_ARM_STARTING,
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CPUHP_AP_PERF_ARM_STARTING,
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CPUHP_AP_ARM_L2X0_STARTING,
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CPUHP_AP_ARM_L2X0_STARTING,
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CPUHP_AP_EXYNOS4_MCT_TIMER_STARTING,
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CPUHP_AP_ARM_ARCH_TIMER_STARTING,
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CPUHP_AP_ARM_ARCH_TIMER_STARTING,
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CPUHP_AP_ARM_GLOBAL_TIMER_STARTING,
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CPUHP_AP_ARM_GLOBAL_TIMER_STARTING,
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CPUHP_AP_JCORE_TIMER_STARTING,
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CPUHP_AP_JCORE_TIMER_STARTING,
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CPUHP_AP_EXYNOS4_MCT_TIMER_STARTING,
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CPUHP_AP_ARM_TWD_STARTING,
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CPUHP_AP_ARM_TWD_STARTING,
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CPUHP_AP_QCOM_TIMER_STARTING,
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CPUHP_AP_QCOM_TIMER_STARTING,
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CPUHP_AP_TEGRA_TIMER_STARTING,
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CPUHP_AP_TEGRA_TIMER_STARTING,
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