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cxgb4vf: Add support for Chelsio T5 adapter
Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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7d6727cfe5
commit
622c62b52f
@ -344,6 +344,7 @@ struct adapter {
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unsigned long registered_device_map;
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unsigned long open_device_map;
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unsigned long flags;
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enum chip_type chip;
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struct adapter_params params;
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/* queue and interrupt resources */
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@ -54,8 +54,8 @@
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/*
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* Generic information about the driver.
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*/
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#define DRV_VERSION "1.0.0"
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#define DRV_DESC "Chelsio T4 Virtual Function (VF) Network Driver"
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#define DRV_VERSION "2.0.0-ko"
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#define DRV_DESC "Chelsio T4/T5 Virtual Function (VF) Network Driver"
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/*
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* Module Parameters.
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@ -1050,7 +1050,7 @@ static inline unsigned int mk_adap_vers(const struct adapter *adapter)
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/*
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* Chip version 4, revision 0x3f (cxgb4vf).
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*/
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return 4 | (0x3f << 10);
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return CHELSIO_CHIP_VERSION(adapter->chip) | (0x3f << 10);
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}
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/*
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@ -2099,6 +2099,15 @@ static int adap_init0(struct adapter *adapter)
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return err;
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}
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switch (adapter->pdev->device >> 12) {
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case CHELSIO_T4:
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adapter->chip = CHELSIO_CHIP_CODE(CHELSIO_T4, 0);
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break;
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case CHELSIO_T5:
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adapter->chip = CHELSIO_CHIP_CODE(CHELSIO_T5, 0);
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break;
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}
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/*
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* Grab basic operational parameters. These will predominantly have
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* been set up by the Physical Function Driver or will be hard coded
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@ -2888,6 +2897,26 @@ static struct pci_device_id cxgb4vf_pci_tbl[] = {
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CH_DEVICE(0x480a, 0), /* T404-bt */
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CH_DEVICE(0x480d, 0), /* T480-cr */
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CH_DEVICE(0x480e, 0), /* T440-lp-cr */
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CH_DEVICE(0x5800, 0), /* T580-dbg */
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CH_DEVICE(0x5801, 0), /* T520-cr */
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CH_DEVICE(0x5802, 0), /* T522-cr */
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CH_DEVICE(0x5803, 0), /* T540-cr */
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CH_DEVICE(0x5804, 0), /* T520-bch */
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CH_DEVICE(0x5805, 0), /* T540-bch */
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CH_DEVICE(0x5806, 0), /* T540-ch */
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CH_DEVICE(0x5807, 0), /* T520-so */
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CH_DEVICE(0x5808, 0), /* T520-cx */
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CH_DEVICE(0x5809, 0), /* T520-bt */
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CH_DEVICE(0x580a, 0), /* T504-bt */
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CH_DEVICE(0x580b, 0), /* T520-sr */
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CH_DEVICE(0x580c, 0), /* T504-bt */
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CH_DEVICE(0x580d, 0), /* T580-cr */
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CH_DEVICE(0x580e, 0), /* T540-lp-cr */
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CH_DEVICE(0x580f, 0), /* Amsterdam */
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CH_DEVICE(0x5810, 0), /* T580-lp-cr */
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CH_DEVICE(0x5811, 0), /* T520-lp-cr */
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CH_DEVICE(0x5812, 0), /* T560-cr */
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CH_DEVICE(0x5813, 0), /* T580-cr */
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{ 0, }
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};
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@ -528,17 +528,21 @@ static void unmap_rx_buf(struct adapter *adapter, struct sge_fl *fl)
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*/
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static inline void ring_fl_db(struct adapter *adapter, struct sge_fl *fl)
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{
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u32 val;
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/*
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* The SGE keeps track of its Producer and Consumer Indices in terms
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* of Egress Queue Units so we can only tell it about integral numbers
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* of multiples of Free List Entries per Egress Queue Units ...
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*/
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if (fl->pend_cred >= FL_PER_EQ_UNIT) {
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val = PIDX(fl->pend_cred / FL_PER_EQ_UNIT);
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if (!is_t4(adapter->chip))
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val |= DBTYPE(1);
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wmb();
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t4_write_reg(adapter, T4VF_SGE_BASE_ADDR + SGE_VF_KDOORBELL,
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DBPRIO(1) |
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QID(fl->cntxt_id) |
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PIDX(fl->pend_cred / FL_PER_EQ_UNIT));
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QID(fl->cntxt_id) | val);
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fl->pend_cred %= FL_PER_EQ_UNIT;
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}
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}
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@ -38,6 +38,25 @@
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#include "../cxgb4/t4fw_api.h"
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#define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
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#define CHELSIO_CHIP_VERSION(code) ((code) >> 4)
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#define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
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#define CHELSIO_T4 0x4
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#define CHELSIO_T5 0x5
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enum chip_type {
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T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 0),
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T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
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T4_A3 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
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T4_FIRST_REV = T4_A1,
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T4_LAST_REV = T4_A3,
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T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
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T5_FIRST_REV = T5_A1,
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T5_LAST_REV = T5_A1,
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};
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/*
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* The "len16" field of a Firmware Command Structure ...
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*/
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@ -232,6 +251,11 @@ static inline int t4vf_wr_mbox_ns(struct adapter *adapter, const void *cmd,
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return t4vf_wr_mbox_core(adapter, cmd, size, rpl, false);
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}
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static inline int is_t4(enum chip_type chip)
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{
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return (chip >= T4_FIRST_REV && chip <= T4_LAST_REV);
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}
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int t4vf_wait_dev_ready(struct adapter *);
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int t4vf_port_init(struct adapter *, int);
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@ -1027,8 +1027,11 @@ int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free,
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unsigned nfilters = 0;
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unsigned int rem = naddr;
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struct fw_vi_mac_cmd cmd, rpl;
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unsigned int max_naddr = is_t4(adapter->chip) ?
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NUM_MPS_CLS_SRAM_L_INSTANCES :
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NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
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if (naddr > FW_CLS_TCAM_NUM_ENTRIES)
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if (naddr > max_naddr)
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return -EINVAL;
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for (offset = 0; offset < naddr; /**/) {
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@ -1069,10 +1072,10 @@ int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free,
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if (idx)
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idx[offset+i] =
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(index >= FW_CLS_TCAM_NUM_ENTRIES
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(index >= max_naddr
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? 0xffff
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: index);
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if (index < FW_CLS_TCAM_NUM_ENTRIES)
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if (index < max_naddr)
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nfilters++;
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else if (hash)
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*hash |= (1ULL << hash_mac_addr(addr[offset+i]));
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@ -1118,6 +1121,9 @@ int t4vf_change_mac(struct adapter *adapter, unsigned int viid,
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struct fw_vi_mac_exact *p = &cmd.u.exact[0];
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size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd,
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u.exact[1]), 16);
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unsigned int max_naddr = is_t4(adapter->chip) ?
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NUM_MPS_CLS_SRAM_L_INSTANCES :
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NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
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/*
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* If this is a new allocation, determine whether it should be
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@ -1140,7 +1146,7 @@ int t4vf_change_mac(struct adapter *adapter, unsigned int viid,
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if (ret == 0) {
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p = &rpl.u.exact[0];
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ret = FW_VI_MAC_CMD_IDX_GET(be16_to_cpu(p->valid_to_idx));
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if (ret >= FW_CLS_TCAM_NUM_ENTRIES)
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if (ret >= max_naddr)
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ret = -ENOMEM;
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}
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return ret;
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