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scsi: ufs: ufs-mediatek: fix TX LCC disabling timing

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MediaTek UFS host requires TX LCC to be disabled on both host and device
sides. This can be done by disabling host's local TX LCC before link
startup. Correct TX LCC disabling timing in MediaTek UFS driver.

Link: https://lore.kernel.org/r/20200207070357.17169-2-stanley.chu@mediatek.com
Reviewed-by: Avri Altman <avri.altman@wdc.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Stanley Chu 2020-02-07 15:03:56 +08:00 committed by Martin K. Petersen
parent 145e5a8a5c
commit 618b4d07a4
1 changed files with 9 additions and 3 deletions
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12
drivers/scsi/ufs/ufs-mediatek.c
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@ -313,6 +313,15 @@ static int ufs_mtk_pre_link(struct ufs_hba *hba)
ufs_mtk_unipro_powerdown(hba, 0); ufs_mtk_unipro_powerdown(hba, 0);
/*
* Setting PA_Local_TX_LCC_Enable to 0 before link startup
* to make sure that both host and device TX LCC are disabled
* once link startup is completed.
*/
ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
if (ret)
return ret;
/* disable deep stall */ /* disable deep stall */
ret = ufshcd_dme_get(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp); ret = ufshcd_dme_get(hba, UIC_ARG_MIB(VS_SAVEPOWERCONTROL), &tmp);
if (ret) if (ret)
@ -344,9 +353,6 @@ static void ufs_mtk_setup_clk_gating(struct ufs_hba *hba)
static int ufs_mtk_post_link(struct ufs_hba *hba) static int ufs_mtk_post_link(struct ufs_hba *hba)
{ {
/* disable device LCC */
ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
/* enable unipro clock gating feature */ /* enable unipro clock gating feature */
ufs_mtk_cfg_unipro_cg(hba, true); ufs_mtk_cfg_unipro_cg(hba, true);