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drm/i915/tgl: Add missing ddi clock select during DP init sequence
Step 4.b was complete missed because it is only required to TC and TBT. Bspec: 49190 Reviewed-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Clinton A Taylor <clinton.a.taylor@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190920205810.211048-2-jose.souza@intel.com
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@ -3230,11 +3230,14 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
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intel_edp_panel_on(intel_dp);
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/*
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* 1.b, 3. and 4. is done before tgl_ddi_pre_enable_dp() by:
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* 1.b, 3. and 4.a is done before tgl_ddi_pre_enable_dp() by:
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* haswell_crtc_enable()->intel_encoders_pre_pll_enable() and
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* haswell_crtc_enable()->intel_enable_shared_dpll()
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*/
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/* 4.b */
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intel_ddi_clk_select(encoder, crtc_state);
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/* 5. */
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if (!intel_phy_is_tc(dev_priv, phy) ||
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dig_port->tc_mode != TC_PORT_TBT_ALT)
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