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edac mpc85xx: add support for mpc8572

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This adds support for the dual-core MPC8572 processor.  We have
to support making SPR changes on each core.  Also, since we can
have multiple memory controllers sharing an interrupt, flag the
interrupts with IRQF_SHARED.

Signed-off-by: Andrew Kilkenny <akilkenny@xes-inc.com>
Signed-off-by: Nate Case <ncase@xes-inc.com>
Acked-by: Dave Jiang <djiang@mvista.com>
Signed-off-by: Doug Thompson <dougthompson@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Andrew Kilkenny 2008-10-15 22:04:28 -07:00 committed by Linus Torvalds
parent 53a2fe5804
commit 60be75515e
1 changed files with 26 additions and 7 deletions
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33
drivers/edac/mpc85xx_edac.c
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@ -17,6 +17,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/mod_devicetable.h> #include <linux/mod_devicetable.h>
#include <linux/edac.h> #include <linux/edac.h>
#include <linux/smp.h>
#include <linux/of_platform.h> #include <linux/of_platform.h>
#include <linux/of_device.h> #include <linux/of_device.h>
@ -40,7 +41,7 @@ static u32 orig_pci_err_en;
#endif #endif
static u32 orig_l2_err_disable; static u32 orig_l2_err_disable;
static u32 orig_hid1; static u32 orig_hid1[2];
/************************ MC SYSFS parts ***********************************/ /************************ MC SYSFS parts ***********************************/
@ -647,6 +648,9 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = {
{ {
.compatible = "fsl,8568-l2-cache-controller", .compatible = "fsl,8568-l2-cache-controller",
}, },
{
.compatible = "fsl,mpc8572-l2-cache-controller",
},
{}, {},
}; };
@ -912,7 +916,8 @@ static int __devinit mpc85xx_mc_err_probe(struct of_device *op,
/* register interrupts */ /* register interrupts */
pdata->irq = irq_of_parse_and_map(op->node, 0); pdata->irq = irq_of_parse_and_map(op->node, 0);
res = devm_request_irq(&op->dev, pdata->irq, res = devm_request_irq(&op->dev, pdata->irq,
mpc85xx_mc_isr, IRQF_DISABLED, mpc85xx_mc_isr,
IRQF_DISABLED | IRQF_SHARED,
"[EDAC] MC err", mci); "[EDAC] MC err", mci);
if (res < 0) { if (res < 0) {
printk(KERN_ERR "%s: Unable to request irq %d for " printk(KERN_ERR "%s: Unable to request irq %d for "
@ -980,6 +985,9 @@ static struct of_device_id mpc85xx_mc_err_of_match[] = {
{ {
.compatible = "fsl,8568-memory-controller", .compatible = "fsl,8568-memory-controller",
}, },
{
.compatible = "fsl,mpc8572-memory-controller",
},
{}, {},
}; };
@ -995,6 +1003,14 @@ static struct of_platform_driver mpc85xx_mc_err_driver = {
}, },
}; };
static void __init mpc85xx_mc_clear_rfxe(void *data)
{
orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1);
mtspr(SPRN_HID1, (orig_hid1[smp_processor_id()] & ~0x20000));
}
static int __init mpc85xx_mc_init(void) static int __init mpc85xx_mc_init(void)
{ {
int res = 0; int res = 0;
@ -1030,19 +1046,22 @@ static int __init mpc85xx_mc_init(void)
* need to clear HID1[RFXE] to disable machine check int * need to clear HID1[RFXE] to disable machine check int
* so we can catch it * so we can catch it
*/ */
if (edac_op_state == EDAC_OPSTATE_INT) { if (edac_op_state == EDAC_OPSTATE_INT)
orig_hid1 = mfspr(SPRN_HID1); on_each_cpu(mpc85xx_mc_clear_rfxe, NULL, 0);
mtspr(SPRN_HID1, (orig_hid1 & ~0x20000));
}
return 0; return 0;
} }
module_init(mpc85xx_mc_init); module_init(mpc85xx_mc_init);
static void __exit mpc85xx_mc_restore_hid1(void *data)
{
mtspr(SPRN_HID1, orig_hid1[smp_processor_id()]);
}
static void __exit mpc85xx_mc_exit(void) static void __exit mpc85xx_mc_exit(void)
{ {
mtspr(SPRN_HID1, orig_hid1); on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
#ifdef CONFIG_PCI #ifdef CONFIG_PCI
of_unregister_platform_driver(&mpc85xx_pci_err_driver); of_unregister_platform_driver(&mpc85xx_pci_err_driver);
#endif #endif