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OpenRISC updates for 5.15

Browse Source 
A few cleanups and compiler warning fixes for OpenRISC.  Also, this
 includes dts and defconfig updates to enable Ethernet on OpenRISC/Litex
 FPGA SoC's now that the LiteEth driver has gone upstream.
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Merge tag 'for-linus' of git://github.com/openrisc/linux

Pull OpenRISC updates from Stafford Horne:
 "A few cleanups and compiler warning fixes for OpenRISC.

  Also, this includes dts and defconfig updates to enable Ethernet on
  OpenRISC/Litex FPGA SoC's now that the LiteEth driver has gone
  upstream"

* tag 'for-linus' of git://github.com/openrisc/linux:
  openrisc/litex: Update defconfig
  openrisc/litex: Add ethernet device
  openrisc/litex: Update uart address
  openrisc: Fix compiler warnings in setup
  openrisc: rename or32 code & comments to or1k
  openrisc: don't printk() unconditionally
This commit is contained in:
Linus Torvalds 2021-09-03 11:03:00 -07:00
commit 603eefda5f
10 changed files with 58 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
arch/openrisc/boot/dts/or1klitex.dts
View File

@ -41,10 +41,10 @@
interrupt-controller;
};
serial0: serial@e0002000 {
serial0: serial@e0006800 {
device_type = "serial";
compatible = "litex,liteuart";
reg = <0xe0002000 0x100>;
reg = <0xe0006800 0x100>;
};
soc_ctrl0: soc_controller@e0000000 {
@ -52,4 +52,13 @@
reg = <0xe0000000 0xc>;
status = "okay";
};
ethernet@e0001000 {
compatible = "litex,liteeth";
reg = <0xe0001000 0x7c>,
<0xe0001800 0x0a>,
<0x80000000 0x2000>;
reg-names = "mac", "mdio", "buffer";
interrupts = <2>;
};
};

26
arch/openrisc/configs/or1klitex_defconfig
View File

@ -1,18 +1,24 @@
CONFIG_BLK_DEV_INITRD=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
CONFIG_BUG_ON_DATA_CORRUPTION=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EMBEDDED=y
CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"
CONFIG_HZ_100=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_EMBEDDED=y
CONFIG_HZ_100=y
CONFIG_INITRAMFS_SOURCE="openrisc-rootfs.cpio.gz"
CONFIG_OF_OVERLAY=y
CONFIG_OPENRISC_BUILTIN_DTB="or1klitex"
CONFIG_PANIC_ON_OOPS=y
CONFIG_PRINTK_TIME=y
CONFIG_LITEX_SOC_CONTROLLER=y
CONFIG_NETDEVICES=y
CONFIG_LITEX_LITEETH=y
CONFIG_SERIAL_LITEUART=y
CONFIG_SERIAL_LITEUART_CONSOLE=y
CONFIG_SOFTLOCKUP_DETECTOR=y
CONFIG_TTY_PRINTK=y
CONFIG_LITEX_SOC_CONTROLLER=y
CONFIG_TMPFS=y
CONFIG_PRINTK_TIME=y
CONFIG_PANIC_ON_OOPS=y
CONFIG_SOFTLOCKUP_DETECTOR=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
CONFIG_BUG_ON_DATA_CORRUPTION=y

6
arch/openrisc/include/asm/pgtable.h
View File

@ -12,7 +12,7 @@
* et al.
*/
/* or32 pgtable.h - macros and functions to manipulate page tables
/* or1k pgtable.h - macros and functions to manipulate page tables
*
* Based on:
* include/asm-cris/pgtable.h
@ -29,14 +29,14 @@
/*
* The Linux memory management assumes a three-level page table setup. On
* or32, we use that, but "fold" the mid level into the top-level page
* or1k, we use that, but "fold" the mid level into the top-level page
* table. Since the MMU TLB is software loaded through an interrupt, it
* supports any page table structure, so we could have used a three-level
* setup, but for the amounts of memory we normally use, a two-level is
* probably more efficient.
*
* This file contains the functions and defines necessary to modify and use
* the or32 page table tree.
* the or1k page table tree.
*/
extern void paging_init(void);

15
arch/openrisc/include/asm/setup.h Normal file
View File

@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2021 Stafford Horne
*/
#ifndef _ASM_OR1K_SETUP_H
#define _ASM_OR1K_SETUP_H
#include <linux/init.h>
#include <asm-generic/setup.h>
#ifndef __ASSEMBLY__
void __init or1k_early_setup(void *fdt);
#endif
#endif /* _ASM_OR1K_SETUP_H */

2
arch/openrisc/include/asm/thread_info.h
View File

@ -25,7 +25,7 @@
/* THREAD_SIZE is the size of the task_struct/kernel_stack combo.
* normally, the stack is found by doing something like p + THREAD_SIZE
* in or32, a page is 8192 bytes, which seems like a sane size
* in or1k, a page is 8192 bytes, which seems like a sane size
*/
#define THREAD_SIZE_ORDER 0

6
arch/openrisc/kernel/entry.S
View File

@ -326,7 +326,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler)
1: l.ori r6,r0,0x0 // !write access
2:
/* call fault.c handler in or32/mm/fault.c */
/* call fault.c handler in openrisc/mm/fault.c */
l.jal do_page_fault
l.nop
l.j _ret_from_exception
@ -348,7 +348,7 @@ EXCEPTION_ENTRY(_insn_page_fault_handler)
/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
l.ori r6,r0,0x0 // !write access
/* call fault.c handler in or32/mm/fault.c */
/* call fault.c handler in openrisc/mm/fault.c */
l.jal do_page_fault
l.nop
l.j _ret_from_exception
@ -547,6 +547,7 @@ EXCEPTION_ENTRY(_external_irq_handler)
l.bnf 1f // ext irq enabled, all ok.
l.nop
#ifdef CONFIG_PRINTK
l.addi r1,r1,-0x8
l.movhi r3,hi(42f)
l.ori r3,r3,lo(42f)
@ -560,6 +561,7 @@ EXCEPTION_ENTRY(_external_irq_handler)
.string "\n\rESR interrupt bug: in _external_irq_handler (ESR %x)\n\r"
.align 4
.previous
#endif
l.ori r4,r4,SPR_SR_IEE // fix the bug
// l.sw PT_SR(r1),r4

6
arch/openrisc/kernel/head.S
View File

@ -599,7 +599,7 @@ flush_tlb:
l.jal _flush_tlb
l.nop
/* The MMU needs to be enabled before or32_early_setup is called */
/* The MMU needs to be enabled before or1k_early_setup is called */
enable_mmu:
/*
@ -641,9 +641,9 @@ enable_mmu:
/* magic number mismatch, set fdt pointer to null */
l.or r25,r0,r0
_fdt_found:
/* pass fdt pointer to or32_early_setup in r3 */
/* pass fdt pointer to or1k_early_setup in r3 */
l.or r3,r0,r25
LOAD_SYMBOL_2_GPR(r24, or32_early_setup)
LOAD_SYMBOL_2_GPR(r24, or1k_early_setup)
l.jalr r24
l.nop

20
arch/openrisc/kernel/setup.c
View File

@ -209,7 +209,8 @@ void __init setup_cpuinfo(void)
}
/**
* or32_early_setup
* or1k_early_setup
* @fdt: pointer to the start of the device tree in memory or NULL
*
* Handles the pointer to the device tree that this kernel is to use
* for establishing the available platform devices.
@ -217,7 +218,7 @@ void __init setup_cpuinfo(void)
* Falls back on built-in device tree in case null pointer is passed.
*/
void __init or32_early_setup(void *fdt)
void __init or1k_early_setup(void *fdt)
{
if (fdt)
pr_info("FDT at %p\n", fdt);
@ -243,21 +244,6 @@ static inline unsigned long extract_value(unsigned long reg, unsigned long mask)
return mask & reg;
}
void __init detect_unit_config(unsigned long upr, unsigned long mask,
char *text, void (*func) (void))
{
if (text != NULL)
printk("%s", text);
if (upr & mask) {
if (func != NULL)
func();
else
printk("present\n");
} else
printk("not present\n");
}
/*
* calibrate_delay
*

2
arch/openrisc/lib/Makefile
View File

@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Makefile for or32 specific library files..
# Makefile for or1k specific library files..
#
obj-y := delay.o string.o memset.o memcpy.o

2
arch/openrisc/mm/fault.c
View File

@ -28,7 +28,7 @@ unsigned long pte_misses; /* updated by do_page_fault() */
unsigned long pte_errors; /* updated by do_page_fault() */
/* __PHX__ :: - check the vmalloc_fault in do_page_fault()
* - also look into include/asm-or32/mmu_context.h
* - also look into include/asm/mmu_context.h
*/
volatile pgd_t *current_pgd[NR_CPUS];