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mtd: rawnand: denali: remove denali_reset_banks()
In nand_scan_ident(), the controller driver resets every NAND chip. This is done by sending NAND_CMD_RESET. The Denali IP provides another way to do the equivalent thing; if a bit is set in the DEVICE_RESET register, the controller sends the RESET command to the corresponding device. denali_reset_banks() uses it to reset all devices beforehand. This redundant reset sequence was needed to know the actual number of chips before calling nand_scan_ident(); if DEVICE_RESET fails, there is no chip in that chip select. Then, denali_reset_banks() sets denali->max_banks to the number of detected chips. As commitf486287d23
("mtd: nand: denali: fix bank reset function to detect the number of chips") explained, nand_scan_ident() issued Set Features (0xEF) command to all CS lines, some of which may not be connected with a chip. Then, the driver would wait for R/B# response, which never happens. This problem was solved by commit107b7d6a7a
("mtd: rawnand: avoid setting again the timings to mode 0 after a reset"). In the current code, nand_setup_data_interface() is called from nand_scan_tail(), which is invoked after the chip detection. Now, we can really remove the redundant denali_nand_banks() by simply passing the maximum number of chip selects supported by this IP (typically 4 or 8) to nand_scan(). Let's leave all the chip detection process to nand_scan_ident(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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parent
a2a05c2f53
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@ -1045,29 +1045,6 @@ static int denali_setup_data_interface(struct nand_chip *chip, int chipnr,
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return 0;
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}
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static void denali_reset_banks(struct denali_nand_info *denali)
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{
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u32 irq_status;
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int i;
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for (i = 0; i < denali->max_banks; i++) {
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denali->active_bank = i;
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denali_reset_irq(denali);
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iowrite32(DEVICE_RESET__BANK(i),
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denali->reg + DEVICE_RESET);
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irq_status = denali_wait_for_irq(denali,
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INTR__RST_COMP | INTR__INT_ACT | INTR__TIME_OUT);
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if (!(irq_status & INTR__INT_ACT))
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break;
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}
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dev_dbg(denali->dev, "%d chips connected\n", i);
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denali->max_banks = i;
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}
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static void denali_hw_init(struct denali_nand_info *denali)
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{
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/*
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@ -1322,12 +1299,6 @@ int denali_init(struct denali_nand_info *denali)
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}
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denali_enable_irq(denali);
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denali_reset_banks(denali);
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if (!denali->max_banks) {
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/* Error out earlier if no chip is found for some reasons. */
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ret = -ENODEV;
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goto disable_irq;
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}
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denali->active_bank = DENALI_INVALID_BANK;
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