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s390/mcck: move register validation to C code
This update partially reverts commit 3037a52f98 ("s390/nmi:
do register validation as early as possible").
Storage error checks and control registers validation are left
in the assembler code, since correct ASCEs and page tables are
required to enable DAT - which is done before the C handler is
entered.
System damage, kernel instruction address and PSW MWP checks
are left in the assembler code as well, since there is no way
to proceed if one of these checks is failed.
The getcpu vdso syscall reads CPU number from the programmable
field of the TOD clock. Disregard the TOD programmable register
validity bit and load the CPU number into the TOD programmable
field unconditionally.
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
Reviewed-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
This commit is contained in:
Alexander Gordeev
Vasily Gorbik
parent
9f744abb46
commit
5fa2ea0714
@ -21,8 +21,6 @@
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#define CR0_INTERRUPT_KEY_SUBMASK BIT(63 - 57)
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#define CR0_MEASUREMENT_ALERT_SUBMASK BIT(63 - 58)
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#define CR2_GUARDED_STORAGE BIT(63 - 59)
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#define CR14_UNUSED_32 BIT(63 - 32)
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#define CR14_UNUSED_33 BIT(63 - 33)
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#define CR14_CHANNEL_REPORT_SUBMASK BIT(63 - 35)
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@ -14,8 +14,6 @@
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#include <linux/pgtable.h>
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#include <asm/idle.h>
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#include <asm/gmap.h>
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#include <asm/nmi.h>
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#include <asm/setup.h>
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#include <asm/stacktrace.h>
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int main(void)
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@ -108,7 +106,6 @@ int main(void)
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OFFSET(__LC_LAST_UPDATE_CLOCK, lowcore, last_update_clock);
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OFFSET(__LC_INT_CLOCK, lowcore, int_clock);
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OFFSET(__LC_MCCK_CLOCK, lowcore, mcck_clock);
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OFFSET(__LC_CLOCK_COMPARATOR, lowcore, clock_comparator);
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OFFSET(__LC_BOOT_CLOCK, lowcore, boot_clock);
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OFFSET(__LC_CURRENT, lowcore, current_task);
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OFFSET(__LC_KERNEL_STACK, lowcore, kernel_stack);
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@ -145,9 +142,6 @@ int main(void)
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OFFSET(__LC_CREGS_SAVE_AREA, lowcore, cregs_save_area);
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OFFSET(__LC_PGM_TDB, lowcore, pgm_tdb);
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BLANK();
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/* extended machine check save area */
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OFFSET(__MCESA_GS_SAVE_AREA, mcesa, guarded_storage_save_area);
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BLANK();
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/* gmap/sie offsets */
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OFFSET(__GMAP_ASCE, gmap, asce);
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OFFSET(__SIE_PROG0C, kvm_s390_sie_block, prog0c);
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@ -14,7 +14,6 @@
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#include <asm/alternative-asm.h>
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#include <asm/processor.h>
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#include <asm/cache.h>
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#include <asm/ctl_reg.h>
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#include <asm/dwarf.h>
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#include <asm/errno.h>
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#include <asm/ptrace.h>
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@ -506,8 +505,6 @@ ENTRY(mcck_int_handler)
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BPOFF
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la %r1,4095 # validate r1
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spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
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sckc __LC_CLOCK_COMPARATOR # validate comparator
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lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
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lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
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lg %r12,__LC_CURRENT
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lmg %r8,%r9,__LC_MCK_OLD_PSW
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@ -518,41 +515,7 @@ ENTRY(mcck_int_handler)
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la %r14,4095
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lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
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ptlb
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lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
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nill %r11,0xfc00 # MCESA_ORIGIN_MASK
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TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
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jno 0f
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TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
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jno 0f
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.insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
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0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
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TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
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jo 0f
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sr %r14,%r14
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0: sfpc %r14
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TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
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jo 0f
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lghi %r14,__LC_FPREGS_SAVE_AREA
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ld %f0,0(%r14)
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ld %f1,8(%r14)
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ld %f2,16(%r14)
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ld %f3,24(%r14)
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ld %f4,32(%r14)
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ld %f5,40(%r14)
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ld %f6,48(%r14)
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ld %f7,56(%r14)
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ld %f8,64(%r14)
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ld %f9,72(%r14)
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ld %f10,80(%r14)
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ld %f11,88(%r14)
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ld %f12,96(%r14)
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ld %f13,104(%r14)
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ld %f14,112(%r14)
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ld %f15,120(%r14)
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j 1f
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0: VLM %v0,%v15,0,%r11
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VLM %v16,%v31,256,%r11
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1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
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lghi %r14,__LC_CPU_TIMER_SAVE_AREA
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mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
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TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
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jo 3f
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@ -189,12 +189,16 @@ void noinstr s390_handle_mcck(void)
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* returns 0 if all required registers are available
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* returns 1 otherwise
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*/
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static int notrace s390_check_registers(union mci mci, int umode)
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static int notrace s390_validate_registers(union mci mci, int umode)
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{
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struct mcesa *mcesa;
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void *fpt_save_area;
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union ctlreg2 cr2;
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int kill_task;
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u64 zero;
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kill_task = 0;
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zero = 0;
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if (!mci.gr) {
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/*
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@ -217,35 +221,89 @@ static int notrace s390_check_registers(union mci mci, int umode)
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if (!test_cpu_flag(CIF_FPU))
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kill_task = 1;
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}
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fpt_save_area = &S390_lowcore.floating_pt_save_area;
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if (!mci.fc) {
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/*
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* Floating point control register can't be restored.
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* If the kernel currently uses the floating pointer
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* registers and needs the FPC register the system is
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* stopped. If the process has its floating pointer
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* registers loaded it is terminated.
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* registers loaded it is terminated. Otherwise the
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* FPC is just validated.
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*/
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if (S390_lowcore.fpu_flags & KERNEL_FPC)
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s390_handle_damage();
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asm volatile(
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" lfpc %0\n"
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:
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: "Q" (zero));
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if (!test_cpu_flag(CIF_FPU))
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kill_task = 1;
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} else {
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asm volatile(
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" lfpc %0\n"
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:
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: "Q" (S390_lowcore.fpt_creg_save_area));
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}
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if (MACHINE_HAS_VX) {
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mcesa = (struct mcesa *)(S390_lowcore.mcesad & MCESA_ORIGIN_MASK);
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if (!MACHINE_HAS_VX) {
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/* Validate floating point registers */
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asm volatile(
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" ld 0,0(%0)\n"
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" ld 1,8(%0)\n"
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" ld 2,16(%0)\n"
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" ld 3,24(%0)\n"
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" ld 4,32(%0)\n"
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" ld 5,40(%0)\n"
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" ld 6,48(%0)\n"
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" ld 7,56(%0)\n"
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" ld 8,64(%0)\n"
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" ld 9,72(%0)\n"
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" ld 10,80(%0)\n"
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" ld 11,88(%0)\n"
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" ld 12,96(%0)\n"
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" ld 13,104(%0)\n"
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" ld 14,112(%0)\n"
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" ld 15,120(%0)\n"
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:
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: "a" (fpt_save_area)
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: "memory");
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} else {
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/* Validate vector registers */
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union ctlreg0 cr0;
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if (!mci.vr) {
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/*
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* Vector registers can't be restored. If the kernel
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* currently uses vector registers the system is
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* stopped. If the process has its vector registers
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* loaded it is terminated.
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* loaded it is terminated. Otherwise just validate
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* the registers.
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*/
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if (S390_lowcore.fpu_flags & KERNEL_VXR)
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s390_handle_damage();
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if (!test_cpu_flag(CIF_FPU))
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kill_task = 1;
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}
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cr0.val = S390_lowcore.cregs_save_area[0];
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cr0.afp = cr0.vx = 1;
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__ctl_load(cr0.val, 0, 0);
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asm volatile(
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" la 1,%0\n"
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" .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */
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" .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */
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:
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: "Q" (*(struct vx_array *)mcesa->vector_save_area)
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: "1");
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__ctl_load(S390_lowcore.cregs_save_area[0], 0, 0);
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}
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/* Check if access registers are valid */
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/* Validate access registers */
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asm volatile(
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" lam 0,15,0(%0)\n"
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:
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: "a" (&S390_lowcore.access_regs_save_area)
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: "memory");
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if (!mci.ar) {
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/*
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* Access registers have unknown contents.
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@ -253,7 +311,7 @@ static int notrace s390_check_registers(union mci mci, int umode)
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*/
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kill_task = 1;
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}
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/* Check guarded storage registers */
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/* Validate guarded storage registers */
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cr2.val = S390_lowcore.cregs_save_area[2];
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if (cr2.gse) {
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if (!mci.gs) {
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@ -263,15 +321,26 @@ static int notrace s390_check_registers(union mci mci, int umode)
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* It has to be terminated.
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*/
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kill_task = 1;
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} else {
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load_gs_cb((struct gs_cb *)mcesa->guarded_storage_save_area);
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}
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}
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/*
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* The getcpu vdso syscall reads CPU number from the programmable
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* field of the TOD clock. Disregard the TOD programmable register
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* validity bit and load the CPU number into the TOD programmable
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* field unconditionally.
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*/
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set_tod_programmable_field(raw_smp_processor_id());
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/* Validate clock comparator register */
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set_clock_comparator(S390_lowcore.clock_comparator);
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if (!mci.ms || !mci.pm || !mci.ia)
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kill_task = 1;
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return kill_task;
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}
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NOKPROBE_SYMBOL(s390_check_registers);
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NOKPROBE_SYMBOL(s390_validate_registers);
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/*
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* Backup the guest's machine check info to its description block
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@ -369,7 +438,7 @@ int notrace s390_do_machine_check(struct pt_regs *regs)
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s390_handle_damage();
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}
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}
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if (s390_check_registers(mci, user_mode(regs))) {
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if (s390_validate_registers(mci, user_mode(regs))) {
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/*
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* Couldn't restore all register contents for the
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* user space process -> mark task for termination.
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