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drm/amdgpu: add psp ras subsystem infrastructure (v2)
Add ras fw loading, init, terminate. Add ras cmd submit helper. Add ras feature enable/disable common function. v2: squash in unused variable warning fix Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
xinhui pan
Alex Deucher
parent
7da674535d
commit
5e5d315457
@ -466,6 +466,206 @@ static int psp_xgmi_initialize(struct psp_context *psp)
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return ret;
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}
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// ras begin
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static void psp_prep_ras_ta_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,
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uint64_t ras_ta_mc, uint64_t ras_mc_shared,
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uint32_t ras_ta_size, uint32_t shared_size)
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{
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cmd->cmd_id = GFX_CMD_ID_LOAD_TA;
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cmd->cmd.cmd_load_ta.app_phy_addr_lo = lower_32_bits(ras_ta_mc);
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cmd->cmd.cmd_load_ta.app_phy_addr_hi = upper_32_bits(ras_ta_mc);
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cmd->cmd.cmd_load_ta.app_len = ras_ta_size;
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cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_lo = lower_32_bits(ras_mc_shared);
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cmd->cmd.cmd_load_ta.cmd_buf_phy_addr_hi = upper_32_bits(ras_mc_shared);
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cmd->cmd.cmd_load_ta.cmd_buf_len = shared_size;
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}
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static int psp_ras_init_shared_buf(struct psp_context *psp)
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{
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int ret;
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/*
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* Allocate 16k memory aligned to 4k from Frame Buffer (local
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* physical) for ras ta <-> Driver
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*/
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ret = amdgpu_bo_create_kernel(psp->adev, PSP_RAS_SHARED_MEM_SIZE,
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PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
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&psp->ras.ras_shared_bo,
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&psp->ras.ras_shared_mc_addr,
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&psp->ras.ras_shared_buf);
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return ret;
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}
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static int psp_ras_load(struct psp_context *psp)
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{
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int ret;
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struct psp_gfx_cmd_resp *cmd;
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/*
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* TODO: bypass the loading in sriov for now
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*/
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if (amdgpu_sriov_vf(psp->adev))
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return 0;
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cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
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if (!cmd)
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return -ENOMEM;
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memset(psp->fw_pri_buf, 0, PSP_1_MEG);
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memcpy(psp->fw_pri_buf, psp->ta_ras_start_addr, psp->ta_ras_ucode_size);
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psp_prep_ras_ta_load_cmd_buf(cmd, psp->fw_pri_mc_addr,
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psp->ras.ras_shared_mc_addr,
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psp->ta_ras_ucode_size, PSP_RAS_SHARED_MEM_SIZE);
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ret = psp_cmd_submit_buf(psp, NULL, cmd,
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psp->fence_buf_mc_addr);
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if (!ret) {
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psp->ras.ras_initialized = 1;
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psp->ras.session_id = cmd->resp.session_id;
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}
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kfree(cmd);
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return ret;
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}
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static void psp_prep_ras_ta_unload_cmd_buf(struct psp_gfx_cmd_resp *cmd,
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uint32_t ras_session_id)
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{
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cmd->cmd_id = GFX_CMD_ID_UNLOAD_TA;
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cmd->cmd.cmd_unload_ta.session_id = ras_session_id;
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}
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static int psp_ras_unload(struct psp_context *psp)
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{
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int ret;
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struct psp_gfx_cmd_resp *cmd;
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/*
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* TODO: bypass the unloading in sriov for now
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*/
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if (amdgpu_sriov_vf(psp->adev))
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return 0;
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cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
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if (!cmd)
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return -ENOMEM;
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psp_prep_ras_ta_unload_cmd_buf(cmd, psp->ras.session_id);
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ret = psp_cmd_submit_buf(psp, NULL, cmd,
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psp->fence_buf_mc_addr);
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kfree(cmd);
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return ret;
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}
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static void psp_prep_ras_ta_invoke_cmd_buf(struct psp_gfx_cmd_resp *cmd,
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uint32_t ta_cmd_id,
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uint32_t ras_session_id)
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{
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cmd->cmd_id = GFX_CMD_ID_INVOKE_CMD;
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cmd->cmd.cmd_invoke_cmd.session_id = ras_session_id;
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cmd->cmd.cmd_invoke_cmd.ta_cmd_id = ta_cmd_id;
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/* Note: cmd_invoke_cmd.buf is not used for now */
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}
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int psp_ras_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
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{
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int ret;
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struct psp_gfx_cmd_resp *cmd;
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/*
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* TODO: bypass the loading in sriov for now
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*/
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if (amdgpu_sriov_vf(psp->adev))
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return 0;
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cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
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if (!cmd)
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return -ENOMEM;
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psp_prep_ras_ta_invoke_cmd_buf(cmd, ta_cmd_id,
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psp->ras.session_id);
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ret = psp_cmd_submit_buf(psp, NULL, cmd,
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psp->fence_buf_mc_addr);
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kfree(cmd);
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return ret;
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}
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int psp_ras_enable_features(struct psp_context *psp,
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union ta_ras_cmd_input *info, bool enable)
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{
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struct ta_ras_shared_memory *ras_cmd;
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int ret;
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if (!psp->ras.ras_initialized)
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return -EINVAL;
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ras_cmd = (struct ta_ras_shared_memory *)psp->ras.ras_shared_buf;
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memset(ras_cmd, 0, sizeof(struct ta_ras_shared_memory));
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if (enable)
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ras_cmd->cmd_id = TA_RAS_COMMAND__ENABLE_FEATURES;
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else
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ras_cmd->cmd_id = TA_RAS_COMMAND__DISABLE_FEATURES;
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ras_cmd->ras_in_message = *info;
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ret = psp_ras_invoke(psp, ras_cmd->cmd_id);
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if (ret)
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return -EINVAL;
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return ras_cmd->ras_status;
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}
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static int psp_ras_terminate(struct psp_context *psp)
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{
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int ret;
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if (!psp->ras.ras_initialized)
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return 0;
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ret = psp_ras_unload(psp);
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if (ret)
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return ret;
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psp->ras.ras_initialized = 0;
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/* free ras shared memory */
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amdgpu_bo_free_kernel(&psp->ras.ras_shared_bo,
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&psp->ras.ras_shared_mc_addr,
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&psp->ras.ras_shared_buf);
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return 0;
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}
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static int psp_ras_initialize(struct psp_context *psp)
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{
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int ret;
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if (!psp->ras.ras_initialized) {
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ret = psp_ras_init_shared_buf(psp);
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if (ret)
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return ret;
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}
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ret = psp_ras_load(psp);
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if (ret)
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return ret;
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return 0;
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}
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// ras end
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static int psp_hw_start(struct psp_context *psp)
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{
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struct amdgpu_device *adev = psp->adev;
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@ -502,6 +702,12 @@ static int psp_hw_start(struct psp_context *psp)
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dev_err(psp->adev->dev,
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"XGMI: Failed to initialize XGMI session\n");
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}
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ret = psp_ras_initialize(psp);
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if (ret)
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dev_err(psp->adev->dev,
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"RAS: Failed to initialize RAS\n");
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return 0;
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}
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@ -753,6 +959,8 @@ static int psp_hw_fini(void *handle)
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psp->xgmi_context.initialized == 1)
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psp_xgmi_terminate(psp);
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psp_ras_terminate(psp);
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psp_ring_destroy(psp, PSP_RING_TYPE__KM);
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amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, &psp->tmr_buf);
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@ -786,6 +994,12 @@ static int psp_suspend(void *handle)
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}
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}
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ret = psp_ras_terminate(psp);
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if (ret) {
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DRM_ERROR("Failed to terminate ras ta\n");
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return ret;
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}
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ret = psp_ring_stop(psp, PSP_RING_TYPE__KM);
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if (ret) {
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DRM_ERROR("PSP ring stop failed\n");
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@ -34,6 +34,7 @@
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#define PSP_CMD_BUFFER_SIZE 0x1000
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#define PSP_ASD_SHARED_MEM_SIZE 0x4000
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#define PSP_XGMI_SHARED_MEM_SIZE 0x4000
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#define PSP_RAS_SHARED_MEM_SIZE 0x4000
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#define PSP_1_MEG 0x100000
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#define PSP_TMR_SIZE 0x400000
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@ -102,6 +103,15 @@ struct psp_xgmi_context {
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void *xgmi_shared_buf;
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};
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struct psp_ras_context {
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/*ras fw*/
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bool ras_initialized;
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uint32_t session_id;
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struct amdgpu_bo *ras_shared_bo;
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uint64_t ras_shared_mc_addr;
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void *ras_shared_buf;
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};
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struct psp_context
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{
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struct amdgpu_device *adev;
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@ -162,6 +172,7 @@ struct psp_context
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uint32_t ta_ras_ucode_size;
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uint8_t *ta_ras_start_addr;
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struct psp_xgmi_context xgmi_context;
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struct psp_ras_context ras;
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};
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struct amdgpu_psp_funcs {
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@ -232,6 +243,11 @@ extern const struct amdgpu_ip_block_version psp_v10_0_ip_block;
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int psp_gpu_reset(struct amdgpu_device *adev);
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int psp_xgmi_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
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int psp_ras_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
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int psp_ras_enable_features(struct psp_context *psp,
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union ta_ras_cmd_input *info, bool enable);
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extern const struct amdgpu_ip_block_version psp_v11_0_ip_block;
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#endif
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