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MIPS: mipsregs.h: Add write_32bit_cp1_register()

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Add a write_32bit_cp1_register() macro to compliment the
read_32bit_cp1_register() macro. This is to abstract whether .set
hardfloat needs to be used based on GAS_HAS_SET_HARDFLOAT.

The implementation of _read_32bit_cp1_register() .sets mips1 due to
failure of gas v2.19 to assemble cfc1 for Octeon (see commit
25c3000300 ("MIPS: Override assembler target architecture for
octeon.")). I haven't copied this over to _write_32bit_cp1_register() as
I'm uncertain whether it applies to ctc1 too, or whether anybody cares
about that version of binutils any longer.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9172/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
James Hogan 2015-01-30 15:40:19 +00:00 committed by Ralf Baechle
parent c7754e7510
commit 5e32033e14
1 changed files with 15 additions and 0 deletions
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15
arch/mips/include/asm/mipsregs.h
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@ -1386,12 +1386,27 @@ do { \
__res; \
})
#define _write_32bit_cp1_register(dest, val, gas_hardfloat) \
do { \
__asm__ __volatile__( \
" .set push \n" \
" .set reorder \n" \
" "STR(gas_hardfloat)" \n" \
" ctc1 %0,"STR(dest)" \n" \
" .set pop \n" \
: : "r" (val)); \
} while (0)
#ifdef GAS_HAS_SET_HARDFLOAT
#define read_32bit_cp1_register(source) \
_read_32bit_cp1_register(source, .set hardfloat)
#define write_32bit_cp1_register(dest, val) \
_write_32bit_cp1_register(dest, val, .set hardfloat)
#else
#define read_32bit_cp1_register(source) \
_read_32bit_cp1_register(source, )
#define write_32bit_cp1_register(dest, val) \
_write_32bit_cp1_register(dest, val, )
#endif
#ifdef HAVE_AS_DSP