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riscv: dts: sophgo: Use common "interrupt-parent" for all peripherals for sg2042

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As all peripherals of sg2042 share the same "interrupt-parent",
there is no need to use peripherals specific "interrupt-parent".
Define "interrupt-parent" in the SoC level.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49531F6DFD2F116207C1397DBBB72@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
This commit is contained in:
Inochi Amaoto 2024-07-29 10:13:33 +08:00 committed by Chen Wang
parent 63c33528b7
commit 5d9e6bc82b
1 changed files with 1 additions and 1 deletions
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2
arch/riscv/boot/dts/sophgo/sg2042.dtsi
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@ -44,6 +44,7 @@
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&intc>;
ranges;
pllclk: clock-controller@70300100c0 {
@ -388,7 +389,6 @@
uart0: serial@7040000000 {
compatible = "snps,dw-apb-uart";
reg = <0x00000070 0x40000000 0x00000000 0x00001000>;
interrupt-parent = <&intc>;
interrupts = <112 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <500000000>;
clocks = <&clkgen GATE_CLK_UART_500M>,