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crypto: caam - add support for rfc4543(gcm(aes))
Add AES-GMAC as an IPSec ESP mechanism to provide data origin authentication, but not confidentiality. This method is referred as ENCR_NULL_AUTH_AES_GMAC. Signed-off-by: Tudor Ambarus <tudor.ambarus@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Tudor Ambarus
Herbert Xu
parent
f129430dd8
commit
5d0429a30f
@ -83,13 +83,18 @@
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#define DESC_RFC4106_DEC_LEN (DESC_RFC4106_BASE + 14 * CAAM_CMD_SZ)
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#define DESC_RFC4106_GIVENC_LEN (DESC_RFC4106_BASE + 21 * CAAM_CMD_SZ)
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#define DESC_RFC4543_BASE (3 * CAAM_CMD_SZ)
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#define DESC_RFC4543_ENC_LEN (DESC_RFC4543_BASE + 25 * CAAM_CMD_SZ)
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#define DESC_RFC4543_DEC_LEN (DESC_RFC4543_BASE + 27 * CAAM_CMD_SZ)
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#define DESC_RFC4543_GIVENC_LEN (DESC_RFC4543_BASE + 30 * CAAM_CMD_SZ)
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#define DESC_ABLKCIPHER_BASE (3 * CAAM_CMD_SZ)
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#define DESC_ABLKCIPHER_ENC_LEN (DESC_ABLKCIPHER_BASE + \
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20 * CAAM_CMD_SZ)
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#define DESC_ABLKCIPHER_DEC_LEN (DESC_ABLKCIPHER_BASE + \
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15 * CAAM_CMD_SZ)
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#define DESC_MAX_USED_BYTES (DESC_AEAD_GIVENC_LEN + \
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#define DESC_MAX_USED_BYTES (DESC_RFC4543_GIVENC_LEN + \
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CAAM_MAX_KEY_SIZE)
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#define DESC_MAX_USED_LEN (DESC_MAX_USED_BYTES / CAAM_CMD_SZ)
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@ -1150,6 +1155,401 @@ static int rfc4106_setauthsize(struct crypto_aead *authenc,
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return 0;
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}
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static int rfc4543_set_sh_desc(struct crypto_aead *aead)
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{
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struct aead_tfm *tfm = &aead->base.crt_aead;
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struct caam_ctx *ctx = crypto_aead_ctx(aead);
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struct device *jrdev = ctx->jrdev;
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bool keys_fit_inline = false;
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u32 *key_jump_cmd, *write_iv_cmd, *write_aad_cmd;
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u32 *read_move_cmd, *write_move_cmd;
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u32 *desc;
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u32 geniv;
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if (!ctx->enckeylen || !ctx->authsize)
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return 0;
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/*
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* RFC4543 encrypt shared descriptor
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* Job Descriptor and Shared Descriptor
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* must fit into the 64-word Descriptor h/w Buffer
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*/
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if (DESC_RFC4543_ENC_LEN + DESC_JOB_IO_LEN +
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ctx->enckeylen <= CAAM_DESC_BYTES_MAX)
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keys_fit_inline = true;
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desc = ctx->sh_desc_enc;
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init_sh_desc(desc, HDR_SHARE_SERIAL);
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/* Skip key loading if it is loaded due to sharing */
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key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
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JUMP_COND_SHRD);
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if (keys_fit_inline)
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append_key_as_imm(desc, (void *)ctx->key, ctx->enckeylen,
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ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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else
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append_key(desc, ctx->key_dma, ctx->enckeylen,
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CLASS_1 | KEY_DEST_CLASS_REG);
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set_jump_tgt_here(desc, key_jump_cmd);
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/* Class 1 operation */
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append_operation(desc, ctx->class1_alg_type |
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OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
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/* Load AES-GMAC ESP IV into Math1 register */
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append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_WORD_DECO_MATH1 |
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LDST_CLASS_DECO | tfm->ivsize);
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/* Wait the DMA transaction to finish */
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append_jump(desc, JUMP_TEST_ALL | JUMP_COND_CALM |
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(1 << JUMP_OFFSET_SHIFT));
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/* Overwrite blank immediate AES-GMAC ESP IV data */
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write_iv_cmd = append_move(desc, MOVE_SRC_MATH1 | MOVE_DEST_DESCBUF |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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/* Overwrite blank immediate AAD data */
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write_aad_cmd = append_move(desc, MOVE_SRC_MATH1 | MOVE_DEST_DESCBUF |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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/* cryptlen = seqoutlen - authsize */
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append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize);
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/* assoclen = (seqinlen - ivsize) - cryptlen */
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append_math_sub(desc, VARSEQINLEN, SEQINLEN, REG3, CAAM_CMD_SZ);
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/* Read Salt and AES-GMAC ESP IV */
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append_cmd(desc, CMD_FIFO_LOAD | FIFOLD_CLASS_CLASS1 | IMMEDIATE |
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FIFOLD_TYPE_IV | FIFOLD_TYPE_FLUSH1 | (4 + tfm->ivsize));
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/* Append Salt */
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append_data(desc, (void *)(ctx->key + ctx->enckeylen), 4);
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set_move_tgt_here(desc, write_iv_cmd);
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/* Blank commands. Will be overwritten by AES-GMAC ESP IV. */
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append_cmd(desc, 0x00000000);
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append_cmd(desc, 0x00000000);
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/* End of blank commands */
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/* Read assoc data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_AAD);
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/* Will read cryptlen bytes */
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append_math_add(desc, VARSEQINLEN, ZERO, REG3, CAAM_CMD_SZ);
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/* Will write cryptlen bytes */
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append_math_add(desc, VARSEQOUTLEN, ZERO, REG3, CAAM_CMD_SZ);
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/*
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* MOVE_LEN opcode is not available in all SEC HW revisions,
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* thus need to do some magic, i.e. self-patch the descriptor
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* buffer.
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*/
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read_move_cmd = append_move(desc, MOVE_SRC_DESCBUF | MOVE_DEST_MATH3 |
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(0x6 << MOVE_LEN_SHIFT));
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write_move_cmd = append_move(desc, MOVE_SRC_MATH3 | MOVE_DEST_DESCBUF |
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(0x8 << MOVE_LEN_SHIFT));
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/* Authenticate AES-GMAC ESP IV */
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append_cmd(desc, CMD_FIFO_LOAD | FIFOLD_CLASS_CLASS1 | IMMEDIATE |
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FIFOLD_TYPE_AAD | tfm->ivsize);
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set_move_tgt_here(desc, write_aad_cmd);
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/* Blank commands. Will be overwritten by AES-GMAC ESP IV. */
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append_cmd(desc, 0x00000000);
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append_cmd(desc, 0x00000000);
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/* End of blank commands */
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/* Read and write cryptlen bytes */
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aead_append_src_dst(desc, FIFOLD_TYPE_AAD);
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set_move_tgt_here(desc, read_move_cmd);
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set_move_tgt_here(desc, write_move_cmd);
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append_cmd(desc, CMD_LOAD | DISABLE_AUTO_INFO_FIFO);
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/* Move payload data to OFIFO */
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append_move(desc, MOVE_SRC_INFIFO_CL | MOVE_DEST_OUTFIFO);
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/* Write ICV */
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append_seq_store(desc, ctx->authsize, LDST_CLASS_1_CCB |
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LDST_SRCDST_BYTE_CONTEXT);
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ctx->sh_desc_enc_dma = dma_map_single(jrdev, desc,
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desc_bytes(desc),
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DMA_TO_DEVICE);
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if (dma_mapping_error(jrdev, ctx->sh_desc_enc_dma)) {
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dev_err(jrdev, "unable to map shared descriptor\n");
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return -ENOMEM;
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}
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "rfc4543 enc shdesc@"__stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, desc,
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desc_bytes(desc), 1);
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#endif
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/*
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* Job Descriptor and Shared Descriptors
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* must all fit into the 64-word Descriptor h/w Buffer
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*/
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keys_fit_inline = false;
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if (DESC_RFC4543_DEC_LEN + DESC_JOB_IO_LEN +
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ctx->enckeylen <= CAAM_DESC_BYTES_MAX)
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keys_fit_inline = true;
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desc = ctx->sh_desc_dec;
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init_sh_desc(desc, HDR_SHARE_SERIAL);
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/* Skip key loading if it is loaded due to sharing */
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key_jump_cmd = append_jump(desc, JUMP_JSL |
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JUMP_TEST_ALL | JUMP_COND_SHRD);
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if (keys_fit_inline)
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append_key_as_imm(desc, (void *)ctx->key, ctx->enckeylen,
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ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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else
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append_key(desc, ctx->key_dma, ctx->enckeylen,
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CLASS_1 | KEY_DEST_CLASS_REG);
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set_jump_tgt_here(desc, key_jump_cmd);
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/* Class 1 operation */
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append_operation(desc, ctx->class1_alg_type |
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OP_ALG_AS_INITFINAL | OP_ALG_DECRYPT | OP_ALG_ICV_ON);
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/* Load AES-GMAC ESP IV into Math1 register */
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append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_WORD_DECO_MATH1 |
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LDST_CLASS_DECO | tfm->ivsize);
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/* Wait the DMA transaction to finish */
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append_jump(desc, JUMP_TEST_ALL | JUMP_COND_CALM |
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(1 << JUMP_OFFSET_SHIFT));
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/* assoclen + cryptlen = (seqinlen - ivsize) - icvsize */
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append_math_sub_imm_u32(desc, REG3, SEQINLEN, IMM, ctx->authsize);
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/* Overwrite blank immediate AES-GMAC ESP IV data */
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write_iv_cmd = append_move(desc, MOVE_SRC_MATH1 | MOVE_DEST_DESCBUF |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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/* Overwrite blank immediate AAD data */
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write_aad_cmd = append_move(desc, MOVE_SRC_MATH1 | MOVE_DEST_DESCBUF |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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/* assoclen = (assoclen + cryptlen) - cryptlen */
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append_math_sub(desc, REG2, SEQOUTLEN, REG0, CAAM_CMD_SZ);
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append_math_sub(desc, VARSEQINLEN, REG3, REG2, CAAM_CMD_SZ);
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/*
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* MOVE_LEN opcode is not available in all SEC HW revisions,
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* thus need to do some magic, i.e. self-patch the descriptor
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* buffer.
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*/
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read_move_cmd = append_move(desc, MOVE_SRC_DESCBUF | MOVE_DEST_MATH3 |
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(0x6 << MOVE_LEN_SHIFT));
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write_move_cmd = append_move(desc, MOVE_SRC_MATH3 | MOVE_DEST_DESCBUF |
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(0x8 << MOVE_LEN_SHIFT));
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/* Read Salt and AES-GMAC ESP IV */
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append_cmd(desc, CMD_FIFO_LOAD | FIFOLD_CLASS_CLASS1 | IMMEDIATE |
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FIFOLD_TYPE_IV | FIFOLD_TYPE_FLUSH1 | (4 + tfm->ivsize));
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/* Append Salt */
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append_data(desc, (void *)(ctx->key + ctx->enckeylen), 4);
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set_move_tgt_here(desc, write_iv_cmd);
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/* Blank commands. Will be overwritten by AES-GMAC ESP IV. */
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append_cmd(desc, 0x00000000);
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append_cmd(desc, 0x00000000);
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/* End of blank commands */
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/* Read assoc data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_AAD);
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/* Will read cryptlen bytes */
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append_math_add(desc, VARSEQINLEN, ZERO, REG2, CAAM_CMD_SZ);
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/* Will write cryptlen bytes */
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append_math_add(desc, VARSEQOUTLEN, ZERO, REG2, CAAM_CMD_SZ);
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/* Authenticate AES-GMAC ESP IV */
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append_cmd(desc, CMD_FIFO_LOAD | FIFOLD_CLASS_CLASS1 | IMMEDIATE |
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FIFOLD_TYPE_AAD | tfm->ivsize);
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set_move_tgt_here(desc, write_aad_cmd);
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/* Blank commands. Will be overwritten by AES-GMAC ESP IV. */
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append_cmd(desc, 0x00000000);
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append_cmd(desc, 0x00000000);
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/* End of blank commands */
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/* Store payload data */
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append_seq_fifo_store(desc, 0, FIFOST_TYPE_MESSAGE_DATA | FIFOLDST_VLF);
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/* In-snoop cryptlen data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_BOTH | FIFOLDST_VLF |
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FIFOLD_TYPE_AAD | FIFOLD_TYPE_LAST2FLUSH1);
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set_move_tgt_here(desc, read_move_cmd);
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set_move_tgt_here(desc, write_move_cmd);
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append_cmd(desc, CMD_LOAD | DISABLE_AUTO_INFO_FIFO);
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/* Move payload data to OFIFO */
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append_move(desc, MOVE_SRC_INFIFO_CL | MOVE_DEST_OUTFIFO);
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append_cmd(desc, CMD_LOAD | ENABLE_AUTO_INFO_FIFO);
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/* Read ICV */
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append_seq_fifo_load(desc, ctx->authsize, FIFOLD_CLASS_CLASS1 |
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FIFOLD_TYPE_ICV | FIFOLD_TYPE_LAST1);
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ctx->sh_desc_dec_dma = dma_map_single(jrdev, desc,
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desc_bytes(desc),
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DMA_TO_DEVICE);
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if (dma_mapping_error(jrdev, ctx->sh_desc_dec_dma)) {
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dev_err(jrdev, "unable to map shared descriptor\n");
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return -ENOMEM;
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}
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#ifdef DEBUG
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print_hex_dump(KERN_ERR, "rfc4543 dec shdesc@"__stringify(__LINE__)": ",
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DUMP_PREFIX_ADDRESS, 16, 4, desc,
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desc_bytes(desc), 1);
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#endif
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/*
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* Job Descriptor and Shared Descriptors
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* must all fit into the 64-word Descriptor h/w Buffer
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*/
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keys_fit_inline = false;
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if (DESC_RFC4543_GIVENC_LEN + DESC_JOB_IO_LEN +
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ctx->enckeylen <= CAAM_DESC_BYTES_MAX)
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keys_fit_inline = true;
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/* rfc4543_givencrypt shared descriptor */
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desc = ctx->sh_desc_givenc;
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init_sh_desc(desc, HDR_SHARE_SERIAL);
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/* Skip key loading if it is loaded due to sharing */
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key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
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JUMP_COND_SHRD);
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if (keys_fit_inline)
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append_key_as_imm(desc, (void *)ctx->key, ctx->enckeylen,
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ctx->enckeylen, CLASS_1 | KEY_DEST_CLASS_REG);
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else
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append_key(desc, ctx->key_dma, ctx->enckeylen,
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CLASS_1 | KEY_DEST_CLASS_REG);
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set_jump_tgt_here(desc, key_jump_cmd);
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/* Generate IV */
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geniv = NFIFOENTRY_STYPE_PAD | NFIFOENTRY_DEST_DECO |
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NFIFOENTRY_DTYPE_MSG | NFIFOENTRY_LC1 |
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NFIFOENTRY_PTYPE_RND | (tfm->ivsize << NFIFOENTRY_DLEN_SHIFT);
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append_load_imm_u32(desc, geniv, LDST_CLASS_IND_CCB |
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LDST_SRCDST_WORD_INFO_FIFO | LDST_IMM);
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append_cmd(desc, CMD_LOAD | DISABLE_AUTO_INFO_FIFO);
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/* Move generated IV to Math1 register */
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append_move(desc, MOVE_SRC_INFIFO | MOVE_DEST_MATH1 |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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append_cmd(desc, CMD_LOAD | ENABLE_AUTO_INFO_FIFO);
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/* Overwrite blank immediate AES-GMAC IV data */
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write_iv_cmd = append_move(desc, MOVE_SRC_MATH1 | MOVE_DEST_DESCBUF |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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/* Overwrite blank immediate AAD data */
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write_aad_cmd = append_move(desc, MOVE_SRC_MATH1 | MOVE_DEST_DESCBUF |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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/* Copy generated IV to OFIFO */
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append_move(desc, MOVE_SRC_MATH1 | MOVE_DEST_OUTFIFO |
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(tfm->ivsize << MOVE_LEN_SHIFT));
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/* Class 1 operation */
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append_operation(desc, ctx->class1_alg_type |
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OP_ALG_AS_INITFINAL | OP_ALG_ENCRYPT);
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/* ivsize + cryptlen = seqoutlen - authsize */
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append_math_sub_imm_u32(desc, REG3, SEQOUTLEN, IMM, ctx->authsize);
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/* assoclen = seqinlen - (ivsize + cryptlen) */
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append_math_sub(desc, VARSEQINLEN, SEQINLEN, REG3, CAAM_CMD_SZ);
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/* Will write ivsize + cryptlen */
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append_math_add(desc, VARSEQOUTLEN, REG3, REG0, CAAM_CMD_SZ);
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/*
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* MOVE_LEN opcode is not available in all SEC HW revisions,
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* thus need to do some magic, i.e. self-patch the descriptor
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* buffer.
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*/
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read_move_cmd = append_move(desc, MOVE_SRC_DESCBUF | MOVE_DEST_MATH3 |
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(0x6 << MOVE_LEN_SHIFT));
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write_move_cmd = append_move(desc, MOVE_SRC_MATH3 | MOVE_DEST_DESCBUF |
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(0x8 << MOVE_LEN_SHIFT));
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/* Read Salt and AES-GMAC generated IV */
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append_cmd(desc, CMD_FIFO_LOAD | FIFOLD_CLASS_CLASS1 | IMMEDIATE |
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FIFOLD_TYPE_IV | FIFOLD_TYPE_FLUSH1 | (4 + tfm->ivsize));
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/* Append Salt */
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append_data(desc, (void *)(ctx->key + ctx->enckeylen), 4);
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set_move_tgt_here(desc, write_iv_cmd);
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/* Blank commands. Will be overwritten by AES-GMAC generated IV. */
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append_cmd(desc, 0x00000000);
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append_cmd(desc, 0x00000000);
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/* End of blank commands */
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/* No need to reload iv */
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append_seq_fifo_load(desc, tfm->ivsize, FIFOLD_CLASS_SKIP);
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/* Read assoc data */
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append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | FIFOLDST_VLF |
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FIFOLD_TYPE_AAD);
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/* Will read cryptlen */
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append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
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/* Authenticate AES-GMAC IV */
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append_cmd(desc, CMD_FIFO_LOAD | FIFOLD_CLASS_CLASS1 | IMMEDIATE |
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FIFOLD_TYPE_AAD | tfm->ivsize);
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set_move_tgt_here(desc, write_aad_cmd);
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/* Blank commands. Will be overwritten by AES-GMAC IV. */
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append_cmd(desc, 0x00000000);
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append_cmd(desc, 0x00000000);
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/* End of blank commands */
|
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|
||||
/* Read and write cryptlen bytes */
|
||||
aead_append_src_dst(desc, FIFOLD_TYPE_AAD);
|
||||
|
||||
set_move_tgt_here(desc, read_move_cmd);
|
||||
set_move_tgt_here(desc, write_move_cmd);
|
||||
append_cmd(desc, CMD_LOAD | DISABLE_AUTO_INFO_FIFO);
|
||||
/* Move payload data to OFIFO */
|
||||
append_move(desc, MOVE_SRC_INFIFO_CL | MOVE_DEST_OUTFIFO);
|
||||
|
||||
/* Write ICV */
|
||||
append_seq_store(desc, ctx->authsize, LDST_CLASS_1_CCB |
|
||||
LDST_SRCDST_BYTE_CONTEXT);
|
||||
|
||||
ctx->sh_desc_givenc_dma = dma_map_single(jrdev, desc,
|
||||
desc_bytes(desc),
|
||||
DMA_TO_DEVICE);
|
||||
if (dma_mapping_error(jrdev, ctx->sh_desc_givenc_dma)) {
|
||||
dev_err(jrdev, "unable to map shared descriptor\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
#ifdef DEBUG
|
||||
print_hex_dump(KERN_ERR,
|
||||
"rfc4543 givenc shdesc@"__stringify(__LINE__)": ",
|
||||
DUMP_PREFIX_ADDRESS, 16, 4, desc,
|
||||
desc_bytes(desc), 1);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rfc4543_setauthsize(struct crypto_aead *authenc,
|
||||
unsigned int authsize)
|
||||
{
|
||||
struct caam_ctx *ctx = crypto_aead_ctx(authenc);
|
||||
|
||||
ctx->authsize = authsize;
|
||||
rfc4543_set_sh_desc(authenc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static u32 gen_split_aead_key(struct caam_ctx *ctx, const u8 *key_in,
|
||||
u32 authkeylen)
|
||||
{
|
||||
@ -1292,6 +1692,45 @@ static int rfc4106_setkey(struct crypto_aead *aead,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rfc4543_setkey(struct crypto_aead *aead,
|
||||
const u8 *key, unsigned int keylen)
|
||||
{
|
||||
struct caam_ctx *ctx = crypto_aead_ctx(aead);
|
||||
struct device *jrdev = ctx->jrdev;
|
||||
int ret = 0;
|
||||
|
||||
if (keylen < 4)
|
||||
return -EINVAL;
|
||||
|
||||
#ifdef DEBUG
|
||||
print_hex_dump(KERN_ERR, "key in @"__stringify(__LINE__)": ",
|
||||
DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
|
||||
#endif
|
||||
|
||||
memcpy(ctx->key, key, keylen);
|
||||
|
||||
/*
|
||||
* The last four bytes of the key material are used as the salt value
|
||||
* in the nonce. Update the AES key length.
|
||||
*/
|
||||
ctx->enckeylen = keylen - 4;
|
||||
|
||||
ctx->key_dma = dma_map_single(jrdev, ctx->key, ctx->enckeylen,
|
||||
DMA_TO_DEVICE);
|
||||
if (dma_mapping_error(jrdev, ctx->key_dma)) {
|
||||
dev_err(jrdev, "unable to map key i/o memory\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
ret = rfc4543_set_sh_desc(aead);
|
||||
if (ret) {
|
||||
dma_unmap_single(jrdev, ctx->key_dma, ctx->enckeylen,
|
||||
DMA_TO_DEVICE);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
|
||||
const u8 *key, unsigned int keylen)
|
||||
{
|
||||
@ -3011,6 +3450,23 @@ static struct caam_alg_template driver_algs[] = {
|
||||
},
|
||||
.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM,
|
||||
},
|
||||
{
|
||||
.name = "rfc4543(gcm(aes))",
|
||||
.driver_name = "rfc4543-gcm-aes-caam",
|
||||
.blocksize = 1,
|
||||
.type = CRYPTO_ALG_TYPE_AEAD,
|
||||
.template_aead = {
|
||||
.setkey = rfc4543_setkey,
|
||||
.setauthsize = rfc4543_setauthsize,
|
||||
.encrypt = aead_encrypt,
|
||||
.decrypt = aead_decrypt,
|
||||
.givencrypt = aead_givencrypt,
|
||||
.geniv = "<built-in>",
|
||||
.ivsize = 8,
|
||||
.maxauthsize = AES_BLOCK_SIZE,
|
||||
},
|
||||
.class1_alg_type = OP_ALG_ALGSEL_AES | OP_ALG_AAI_GCM,
|
||||
},
|
||||
/* Galois Counter Mode */
|
||||
{
|
||||
.name = "gcm(aes)",
|
||||
|
||||
Loading…
Reference in New Issue
Block a user