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powerpc: support KASAN instrumentation of bitops
The powerpc-specific bitops are not being picked up by the KASAN test suite. Instrumentation is done via the bitops/instrumented-{atomic,lock}.h headers. They require that arch-specific versions of bitop functions are renamed to arch_*. Do this renaming. For clear_bit_unlock_is_negative_byte, the current implementation uses the PG_waiters constant. This works because it's a preprocessor macro - so it's only actually evaluated in contexts where PG_waiters is defined. With instrumentation however, it becomes a static inline function, and all of a sudden we need the actual value of PG_waiters. Because of the order of header includes, it's not available and we fail to compile. Instead, manually specify that we care about bit 7. This is still correct: bit 7 is the bit that would mark a negative byte. While we're at it, replace __inline__ with inline across the file. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Daniel Axtens <dja@axtens.net> Tested-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20190820024941.12640-2-dja@axtens.net
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@ -64,7 +64,7 @@
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/* Macro for generating the ***_bits() functions */
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#define DEFINE_BITOP(fn, op, prefix) \
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static __inline__ void fn(unsigned long mask, \
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static inline void fn(unsigned long mask, \
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volatile unsigned long *_p) \
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{ \
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unsigned long old; \
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@ -86,22 +86,22 @@ DEFINE_BITOP(clear_bits, andc, "")
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DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER)
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DEFINE_BITOP(change_bits, xor, "")
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static __inline__ void set_bit(int nr, volatile unsigned long *addr)
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static inline void arch_set_bit(int nr, volatile unsigned long *addr)
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{
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set_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
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}
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static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
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static inline void arch_clear_bit(int nr, volatile unsigned long *addr)
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{
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clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
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}
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static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
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static inline void arch_clear_bit_unlock(int nr, volatile unsigned long *addr)
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{
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clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr));
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}
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static __inline__ void change_bit(int nr, volatile unsigned long *addr)
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static inline void arch_change_bit(int nr, volatile unsigned long *addr)
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{
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change_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
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}
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@ -109,7 +109,7 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr)
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/* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output
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* operands. */
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#define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \
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static __inline__ unsigned long fn( \
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static inline unsigned long fn( \
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unsigned long mask, \
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volatile unsigned long *_p) \
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{ \
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@ -138,34 +138,34 @@ DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER,
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DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
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PPC_ATOMIC_EXIT_BARRIER, 0)
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static __inline__ int test_and_set_bit(unsigned long nr,
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volatile unsigned long *addr)
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static inline int arch_test_and_set_bit(unsigned long nr,
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volatile unsigned long *addr)
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{
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return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
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}
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static __inline__ int test_and_set_bit_lock(unsigned long nr,
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volatile unsigned long *addr)
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static inline int arch_test_and_set_bit_lock(unsigned long nr,
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volatile unsigned long *addr)
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{
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return test_and_set_bits_lock(BIT_MASK(nr),
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addr + BIT_WORD(nr)) != 0;
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}
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static __inline__ int test_and_clear_bit(unsigned long nr,
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volatile unsigned long *addr)
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static inline int arch_test_and_clear_bit(unsigned long nr,
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volatile unsigned long *addr)
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{
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return test_and_clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
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}
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static __inline__ int test_and_change_bit(unsigned long nr,
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volatile unsigned long *addr)
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static inline int arch_test_and_change_bit(unsigned long nr,
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volatile unsigned long *addr)
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{
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return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
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}
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#ifdef CONFIG_PPC64
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static __inline__ unsigned long clear_bit_unlock_return_word(int nr,
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volatile unsigned long *addr)
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static inline unsigned long
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clear_bit_unlock_return_word(int nr, volatile unsigned long *addr)
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{
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unsigned long old, t;
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unsigned long *p = (unsigned long *)addr + BIT_WORD(nr);
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@ -185,15 +185,18 @@ static __inline__ unsigned long clear_bit_unlock_return_word(int nr,
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return old;
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}
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/* This is a special function for mm/filemap.c */
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#define clear_bit_unlock_is_negative_byte(nr, addr) \
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(clear_bit_unlock_return_word(nr, addr) & BIT_MASK(PG_waiters))
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/*
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* This is a special function for mm/filemap.c
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* Bit 7 corresponds to PG_waiters.
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*/
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#define arch_clear_bit_unlock_is_negative_byte(nr, addr) \
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(clear_bit_unlock_return_word(nr, addr) & BIT_MASK(7))
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#endif /* CONFIG_PPC64 */
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#include <asm-generic/bitops/non-atomic.h>
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static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
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static inline void arch___clear_bit_unlock(int nr, volatile unsigned long *addr)
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{
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__asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory");
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__clear_bit(nr, addr);
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@ -215,14 +218,14 @@ static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
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* fls: find last (most-significant) bit set.
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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static __inline__ int fls(unsigned int x)
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static inline int fls(unsigned int x)
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{
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return 32 - __builtin_clz(x);
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}
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#include <asm-generic/bitops/builtin-__fls.h>
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static __inline__ int fls64(__u64 x)
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static inline int fls64(__u64 x)
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{
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return 64 - __builtin_clzll(x);
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}
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@ -239,6 +242,10 @@ unsigned long __arch_hweight64(__u64 w);
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#include <asm-generic/bitops/find.h>
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/* wrappers that deal with KASAN instrumentation */
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#include <asm-generic/bitops/instrumented-atomic.h>
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#include <asm-generic/bitops/instrumented-lock.h>
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/* Little-endian versions */
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#include <asm-generic/bitops/le.h>
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