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x86/cpu, kvm: Add the Null Selector Clears Base feature
The Null Selector Clears Base feature was being open-coded for KVM. Add it to its newly added native CPUID leaf 0x80000021 EAX proper. Also drop the bit description comments now it's more self-describing. [ bp: Convert test in check_null_seg_clears_base() too. ] Signed-off-by: Kim Phillips <kim.phillips@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Acked-by: Sean Christopherson <seanjc@google.com> Link: https://lore.kernel.org/r/20230124163319.2277355-6-kim.phillips@amd.com
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@ -430,6 +430,7 @@
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/* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */
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#define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* "" No Nested Data Breakpoints */
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#define X86_FEATURE_LFENCE_RDTSC (20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */
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#define X86_FEATURE_NULL_SEL_CLR_BASE (20*32+ 6) /* "" Null Selector Clears Base */
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/*
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* BUG word(s)
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@ -1685,9 +1685,7 @@ void check_null_seg_clears_base(struct cpuinfo_x86 *c)
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if (!IS_ENABLED(CONFIG_X86_64))
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return;
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/* Zen3 CPUs advertise Null Selector Clears Base in CPUID. */
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if (c->extended_cpuid_level >= 0x80000021 &&
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cpuid_eax(0x80000021) & BIT(6))
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if (cpu_has(c, X86_FEATURE_NULL_SEL_CLR_BASE))
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return;
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/*
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@ -743,7 +743,7 @@ void kvm_set_cpu_caps(void)
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kvm_cpu_cap_mask(CPUID_8000_0021_EAX,
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F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | 0 /* SmmPgCfgLock */ |
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BIT(6) /* NULL_SEL_CLR_BASE */ | 0 /* PrefetchCtlMsr */
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F(NULL_SEL_CLR_BASE) | 0 /* PrefetchCtlMsr */
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);
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/*
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@ -759,7 +759,7 @@ void kvm_set_cpu_caps(void)
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if (cpu_feature_enabled(X86_FEATURE_LFENCE_RDTSC))
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kvm_cpu_cap_set(X86_FEATURE_LFENCE_RDTSC);
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if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
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kvm_cpu_caps[CPUID_8000_0021_EAX] |= BIT(6) /* NULL_SEL_CLR_BASE */;
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kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE);
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kvm_cpu_caps[CPUID_8000_0021_EAX] |= BIT(9) /* NO_SMM_CTL_MSR */;
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kvm_cpu_cap_mask(CPUID_C000_0001_EDX,
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