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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6

Browse Source 
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (38 commits)
  sh: R7785RP board updates.
  sh: Update r7780rp defconfig.
  sh: Add die chain notifiers.
  sh: Fix APM emulation on hp6xx.
  sh: Wire up more IRQs for SH7709.
  sh: Solution Engine 7722 board support.
  sh: Fix r7780rp build.
  sh: kdump support.
  sh: Move clock reporting to its own proc entry.
  sh: Solution Engine SH7705 board and CPU updates.
  serial: sh-sci: Fix module clock refcount for serial console.
  serial: sh-sci: Fix module clock refcounting.
  sh: SH7722 clock framework support.
  sh: hp6xx pata_platform support.
  sh: Obey CONFIG_HZ for HZ definition.
  sh: Fix fstatat64() syscall.
  sh: se7780 PCI support.
  sh: SH7780 Solution Engine board support.
  sh: Add a dummy SH-4 PCIC fixup.
  sh: Tidy up L-BOX area5 addresses.
  ...
This commit is contained in:
Linus Torvalds 2007-05-07 12:17:40 -07:00
commit 5b6b549822
114 changed files with 10127 additions and 2434 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
Documentation/sh/clk.txt Normal file
View File

@ -0,0 +1,32 @@
Clock framework on SuperH architecture
The framework on SH extends existing API by the function clk_set_rate_ex,
which prototype is as follows:
clk_set_rate_ex (struct clk *clk, unsigned long rate, int algo_id)
The algo_id parameter is used to specify algorithm used to recalculate clocks,
adjanced to clock, specified as first argument. It is assumed that algo_id==0
means no changes to adjanced clock
Internally, the clk_set_rate_ex forwards request to clk->ops->set_rate method,
if it is present in ops structure. The method should set the clock rate and adjust
all needed clocks according to the passed algo_id.
Exact values for algo_id are machine-dependend. For the sh7722, the following
values are defined:
NO_CHANGE = 0,
IUS_N1_N1, /* I:U = N:1, U:Sh = N:1 */
IUS_322, /* I:U:Sh = 3:2:2 */
IUS_522, /* I:U:Sh = 5:2:2 */
IUS_N11, /* I:U:Sh = N:1:1 */
SB_N1, /* Sh:B = N:1 */
SB3_N1, /* Sh:B3 = N:1 */
SB3_32, /* Sh:B3 = 3:2 */
SB3_43, /* Sh:B3 = 4:3 */
SB3_54, /* Sh:B3 = 5:4 */
BP_N1, /* B:P = N:1 */
IP_N1 /* I:P = N:1 */
Each of these constants means relation between clocks that can be set via the FRQCR
register

4
Documentation/sysrq.txt
View File

@ -1,6 +1,6 @@
Linux Magic System Request Key Hacks
Documentation for sysrq.c
Last update: 2007-JAN-06
Last update: 2007-MAR-14
* What is the magic SysRq key?
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@ -75,7 +75,7 @@ On all - write a character to /proc/sysrq-trigger. e.g.:
'f' - Will call oom_kill to kill a memory hog process.
'g' - Used by kgdb on ppc platforms.
'g' - Used by kgdb on ppc and sh platforms.
'h' - Will display help (actually any other key than those listed
above will display help. but 'h' is easy to remember :-)

97
arch/sh/Kconfig
View File

@ -22,6 +22,10 @@ config RWSEM_GENERIC_SPINLOCK
config RWSEM_XCHGADD_ALGORITHM
bool
config GENERIC_BUG
def_bool y
depends on BUG
config GENERIC_FIND_NEXT_BIT
bool
default y
@ -88,6 +92,14 @@ config SH_SOLUTION_ENGINE
Select SolutionEngine if configuring for a Hitachi SH7709
or SH7750 evaluation board.
config SH_7722_SOLUTION_ENGINE
bool "SolutionEngine7722"
select SOLUTION_ENGINE
select CPU_SUBTYPE_SH7722
help
Select 7722 SolutionEngine if configuring for a Hitachi SH772
evaluation board.
config SH_7751_SOLUTION_ENGINE
bool "SolutionEngine7751"
select SOLUTION_ENGINE
@ -95,6 +107,14 @@ config SH_7751_SOLUTION_ENGINE
help
Select 7751 SolutionEngine if configuring for a Hitachi SH7751
evaluation board.
config SH_7780_SOLUTION_ENGINE
bool "SolutionEngine7780"
select SOLUTION_ENGINE
select CPU_SUBTYPE_SH7780
help
Select 7780 SolutionEngine if configuring for a Renesas SH7780
evaluation board.
config SH_7300_SOLUTION_ENGINE
bool "SolutionEngine7300"
@ -193,12 +213,8 @@ config SH_RTS7751R2D
Select RTS7751R2D if configuring for a Renesas Technology
Sales SH-Graphics board.
config SH_R7780RP
bool "R7780RP-1"
select CPU_SUBTYPE_SH7780
help
Select R7780RP-1 if configuring for a Renesas Solutions
HIGHLANDER board.
config SH_HIGHLANDER
bool "Highlander"
config SH_EDOSK7705
bool "EDOSK7705"
@ -243,6 +259,12 @@ config SH_7619_SOLUTION_ENGINE
help
Select 7619 SolutionEngine if configuring for a Hitachi SH7619
evaluation board.
config SH_LBOX_RE2
bool "L-BOX RE2"
select CPU_SUBTYPE_SH7751R
help
Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
config SH_UNKNOWN
bool "BareCPU"
@ -258,6 +280,10 @@ config SH_UNKNOWN
endchoice
source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
source "arch/sh/boards/renesas/r7780rp/Kconfig"
source "arch/sh/mm/Kconfig"
config CF_ENABLER
@ -366,6 +392,16 @@ config SH_STORE_QUEUES
Selecting this option will enable an in-kernel API for manipulating
the store queues integrated in the SH-4 processors.
config SPECULATIVE_EXECUTION
bool "Speculative subroutine return"
depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL
help
This enables support for a speculative instruction fetch for
subroutine return. There are various pitfalls associated with
this, as outlined in the SH7780 hardware manual.
If unsure, say N.
config CPU_HAS_INTEVT
bool
@ -398,8 +434,9 @@ config CPU_HAS_PTEA
endmenu
menu "Timer support"
depends on !GENERIC_TIME
menu "Timer and clock configuration"
if !GENERIC_TIME
config SH_TMU
bool "TMU timer support"
@ -422,17 +459,11 @@ config SH_MTU2
help
This enables the use of the MTU2 as the system timer.
endmenu
source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
source "arch/sh/boards/renesas/r7780rp/Kconfig"
endif
config SH_TIMER_IRQ
int
default "28" if CPU_SUBTYPE_SH7780
default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
default "86" if CPU_SUBTYPE_SH7619
default "140" if CPU_SUBTYPE_SH7206
default "16"
@ -462,7 +493,8 @@ config SH_PCLK_FREQ
default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \
CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
CPU_SUBTYPE_SH7206
default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780
default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 || \
CPU_SUBTYPE_SH7785
default "60000000" if CPU_SUBTYPE_SH7751
default "66000000" if CPU_SUBTYPE_SH4_202
help
@ -477,6 +509,8 @@ config SH_CLK_MD
help
MD2 - MD0 pin setting.
endmenu
menu "CPU Frequency scaling"
source "drivers/cpufreq/Kconfig"
@ -495,21 +529,6 @@ config SH_CPU_FREQ
endmenu
source "arch/sh/drivers/dma/Kconfig"
source "arch/sh/cchips/Kconfig"
config HEARTBEAT
bool "Heartbeat LED"
depends on SH_MPC1211 || SH_SH03 || \
SOLUTION_ENGINE || \
SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK || \
SH_R7780RP
help
Use the power-on LED on your machine as a load meter. The exact
behavior is platform-dependent, but normally the flash frequency is
a hyperbolic function of the 5-minute load average.
source "arch/sh/drivers/Kconfig"
endmenu
@ -540,6 +559,20 @@ config KEXEC
support. As of this writing the exact hardware interface is
strongly in flux, so no good recommendation can be made.
config CRASH_DUMP
bool "kernel crash dumps (EXPERIMENTAL)"
depends on EXPERIMENTAL
help
Generate crash dump after being started by kexec.
This should be normally only set in special crash dump kernels
which are loaded in the main kernel with kexec-tools into
a specially reserved region and then later executed after
a crash by kdump/kexec. The crash dump kernel must be compiled
to a memory address not used by the main kernel using
MEMORY_START.
For more details see Documentation/kdump/kdump.txt
config SMP
bool "Symmetric multi-processing support"
---help---

20
arch/sh/Kconfig.debug
View File

@ -33,6 +33,7 @@ config EARLY_SCIF_CONSOLE_PORT
default "0xffe00000" if CPU_SUBTYPE_SH7780
default "0xfffe9800" if CPU_SUBTYPE_SH7206
default "0xf8420000" if CPU_SUBTYPE_SH7619
default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
default "0xffe80000" if CPU_SH4
config EARLY_PRINTK
@ -77,16 +78,17 @@ config 4KSTACKS
on the VM subsystem for higher order allocations. This option
will also use IRQ stacks to compensate for the reduced stackspace.
config KGDB
config SH_KGDB
bool "Include KGDB kernel debugger"
select FRAME_POINTER
select DEBUG_INFO
help
Include in-kernel hooks for kgdb, the Linux kernel source level
debugger. See <http://kgdb.sourceforge.net/> for more information.
Unless you are intending to debug the kernel, say N here.
menu "KGDB configuration options"
depends on KGDB
depends on SH_KGDB
config MORE_COMPILE_OPTIONS
bool "Add any additional compile options"
@ -103,22 +105,16 @@ config KGDB_NMI
bool "Enter KGDB on NMI"
default n
config KGDB_THREAD
bool "Include KGDB thread support"
default y
config SH_KGDB_CONSOLE
bool "Console messages through GDB"
depends on !SERIAL_SH_SCI_CONSOLE
select SERIAL_CORE_CONSOLE
default n
config KGDB_SYSRQ
bool "Allow SysRq 'G' to enter KGDB"
default y
config KGDB_KERNEL_ASSERTS
bool "Include KGDB kernel assertions"
default n
comment "Serial port setup"
config KGDB_DEFPORT
@ -131,7 +127,7 @@ config KGDB_DEFBAUD
choice
prompt "Parity"
depends on KGDB
depends on SH_KGDB
default KGDB_DEFPARITY_N
config KGDB_DEFPARITY_N
@ -147,7 +143,7 @@ endchoice
choice
prompt "Data bits"
depends on KGDB
depends on SH_KGDB
default KGDB_DEFBITS_8
config KGDB_DEFBITS_8

6
arch/sh/Makefile
View File

@ -47,7 +47,6 @@ cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml
cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),) -ffreestanding
cflags-$(CONFIG_SH_DSP) += -Wa,-dsp
cflags-$(CONFIG_SH_KGDB) += -g
cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \
$(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g')
@ -89,7 +88,9 @@ core-$(CONFIG_SH_FPU_EMU) += arch/sh/math-emu/
# Boards
machdir-$(CONFIG_SH_SOLUTION_ENGINE) := se/770x
machdir-$(CONFIG_SH_7722_SOLUTION_ENGINE) := se/7722
machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE) := se/7751
machdir-$(CONFIG_SH_7780_SOLUTION_ENGINE) := se/7780
machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE) := se/7300
machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE) := se/7343
machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE) := se/73180
@ -103,7 +104,7 @@ machdir-$(CONFIG_SH_HS7751RVOIP) := renesas/hs7751rvoip
machdir-$(CONFIG_SH_RTS7751R2D) := renesas/rts7751r2d
machdir-$(CONFIG_SH_7751_SYSTEMH) := renesas/systemh
machdir-$(CONFIG_SH_EDOSK7705) := renesas/edosk7705
machdir-$(CONFIG_SH_R7780RP) := renesas/r7780rp
machdir-$(CONFIG_SH_HIGHLANDER) := renesas/r7780rp
machdir-$(CONFIG_SH_7710VOIPGW) := renesas/sh7710voipgw
machdir-$(CONFIG_SH_SH4202_MICRODEV) := superh/microdev
machdir-$(CONFIG_SH_LANDISK) := landisk
@ -111,6 +112,7 @@ machdir-$(CONFIG_SH_TITAN) := titan
machdir-$(CONFIG_SH_SHMIN) := shmin
machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) := se/7206
machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) := se/7619
machdir-$(CONFIG_SH_LBOX_RE2) := lboxre2
machdir-$(CONFIG_SH_UNKNOWN) := unknown
incdir-y := $(notdir $(machdir-y))

4
arch/sh/boards/hp6xx/Makefile
View File

@ -2,6 +2,6 @@
# Makefile for the HP6xx specific parts of the kernel
#
obj-y := setup.o
obj-y := setup.o
obj-$(CONFIG_PM) += pm.o pm_wakeup.o
obj-$(CONFIG_APM) += hp6xx_apm.o
obj-$(CONFIG_APM_EMULATION) += hp6xx_apm.o

67
arch/sh/boards/hp6xx/setup.c
View File

@ -2,6 +2,7 @@
* linux/arch/sh/boards/hp6xx/setup.c
*
* Copyright (C) 2002 Andriy Skulysh
* Copyright (C) 2007 Kristoffer Ericson <Kristoffer_e1@hotmail.com>
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
@ -10,6 +11,7 @@
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/hd64461.h>
#include <asm/io.h>
#include <asm/irq.h>
@ -19,6 +21,40 @@
#define SCPCR 0xa4000116
#define SCPDR 0xa4000136
/* CF Slot */
static struct resource cf_ide_resources[] = {
[0] = {
.start = 0x15000000 + 0x1f0,
.end = 0x15000000 + 0x1f0 + 0x08 - 0x01,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 0x15000000 + 0x1fe,
.end = 0x15000000 + 0x1fe + 0x01,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = 93,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
};
static struct platform_device *hp6xx_devices[] __initdata = {
&cf_ide_device,
};
static int __init hp6xx_devices_setup(void)
{
return platform_add_devices(hp6xx_devices, ARRAY_SIZE(hp6xx_devices));
}
static void __init hp6xx_setup(char **cmdline_p)
{
u8 v8;
@ -60,41 +96,12 @@ static void __init hp6xx_setup(char **cmdline_p)
v |= SCPCR_TS_ENABLE;
ctrl_outw(v, SCPCR);
}
device_initcall(hp6xx_devices_setup);
/*
* XXX: This is stupid, we should have a generic machine vector for the cchips
* and just wrap the platform setup code in to this, as it's the only thing
* that ends up being different.
*/
struct sh_machine_vector mv_hp6xx __initmv = {
.mv_name = "hp6xx",
.mv_setup = hp6xx_setup,
.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM,
.mv_inb = hd64461_inb,
.mv_inw = hd64461_inw,
.mv_inl = hd64461_inl,
.mv_outb = hd64461_outb,
.mv_outw = hd64461_outw,
.mv_outl = hd64461_outl,
.mv_inb_p = hd64461_inb_p,
.mv_inw_p = hd64461_inw,
.mv_inl_p = hd64461_inl,
.mv_outb_p = hd64461_outb_p,
.mv_outw_p = hd64461_outw,
.mv_outl_p = hd64461_outl,
.mv_insb = hd64461_insb,
.mv_insw = hd64461_insw,
.mv_insl = hd64461_insl,
.mv_outsb = hd64461_outsb,
.mv_outsw = hd64461_outsw,
.mv_outsl = hd64461_outsl,
.mv_readw = hd64461_readw,
.mv_writew = hd64461_writew,
.mv_irq_demux = hd64461_irq_demux,
};
ALIAS_MV(hp6xx)

2
arch/sh/boards/landisk/Makefile
View File

@ -2,4 +2,4 @@
# Makefile for I-O DATA DEVICE, INC. "LANDISK Series"
#
obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o
obj-y := setup.o irq.o psw.o gio.o

167
arch/sh/boards/landisk/gio.c Normal file
View File

@ -0,0 +1,167 @@
/*
* arch/sh/boards/landisk/gio.c - driver for landisk
*
* This driver will also support the I-O DATA Device, Inc. LANDISK Board.
* LANDISK and USL-5P Button, LED and GIO driver drive function.
*
* Copylight (C) 2006 kogiidena
* Copylight (C) 2002 Atom Create Engineering Co., Ltd. *
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/kdev_t.h>
#include <linux/cdev.h>
#include <linux/fs.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/landisk/gio.h>
#include <asm/landisk/iodata_landisk.h>
#define DEVCOUNT 4
#define GIO_MINOR 2 /* GIO minor no. */
static dev_t dev;
static struct cdev *cdev_p;
static int openCnt;
static int gio_open(struct inode *inode, struct file *filp)
{
int minor;
minor = MINOR(inode->i_rdev);
if (minor < DEVCOUNT) {
if (openCnt > 0) {
return -EALREADY;
} else {
openCnt++;
return 0;
}
}
return -ENOENT;
}
static int gio_close(struct inode *inode, struct file *filp)
{
int minor;
minor = MINOR(inode->i_rdev);
if (minor < DEVCOUNT) {
openCnt--;
}
return 0;
}
static int gio_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
unsigned int data;
static unsigned int addr = 0;
if (cmd & 0x01) { /* write */
if (copy_from_user(&data, (int *)arg, sizeof(int))) {
return -EFAULT;
}
}
switch (cmd) {
case GIODRV_IOCSGIOSETADDR: /* addres set */
addr = data;
break;
case GIODRV_IOCSGIODATA1: /* write byte */
ctrl_outb((unsigned char)(0x0ff & data), addr);
break;
case GIODRV_IOCSGIODATA2: /* write word */
if (addr & 0x01) {
return -EFAULT;
}
ctrl_outw((unsigned short int)(0x0ffff & data), addr);
break;
case GIODRV_IOCSGIODATA4: /* write long */
if (addr & 0x03) {
return -EFAULT;
}
ctrl_outl(data, addr);
break;
case GIODRV_IOCGGIODATA1: /* read byte */
data = ctrl_inb(addr);
break;
case GIODRV_IOCGGIODATA2: /* read word */
if (addr & 0x01) {
return -EFAULT;
}
data = ctrl_inw(addr);
break;
case GIODRV_IOCGGIODATA4: /* read long */
if (addr & 0x03) {
return -EFAULT;
}
data = ctrl_inl(addr);
break;
default:
return -EFAULT;
break;
}
if ((cmd & 0x01) == 0) { /* read */
if (copy_to_user((int *)arg, &data, sizeof(int))) {
return -EFAULT;
}
}
return 0;
}
static struct file_operations gio_fops = {
.owner = THIS_MODULE,
.open = gio_open, /* open */
.release = gio_close, /* release */
.ioctl = gio_ioctl, /* ioctl */
};
static int __init gio_init(void)
{
int error;
printk(KERN_INFO "gio: driver initialized\n");
openCnt = 0;
if ((error = alloc_chrdev_region(&dev, 0, DEVCOUNT, "gio")) < 0) {
printk(KERN_ERR
"gio: Couldn't alloc_chrdev_region, error=%d\n",
error);
return 1;
}
cdev_p = cdev_alloc();
cdev_p->ops = &gio_fops;
error = cdev_add(cdev_p, dev, DEVCOUNT);
if (error) {
printk(KERN_ERR
"gio: Couldn't cdev_add, error=%d\n", error);
return 1;
}
return 0;
}
static void __exit gio_exit(void)
{
cdev_del(cdev_p);
unregister_chrdev_region(dev, DEVCOUNT);
}
module_init(gio_init);
module_exit(gio_exit);
MODULE_LICENSE("GPL");

250
arch/sh/boards/landisk/io.c
View File

@ -1,250 +0,0 @@
/*
* arch/sh/boards/landisk/io.c
*
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
*
* I/O routine for I-O Data Device, Inc. LANDISK.
*
* Initial version only to support LAN access; some
* placeholder code from io_landisk.c left in with the
* expectation of later SuperIO and PCMCIA access.
*/
/*
* modifed by kogiidena
* 2005.03.03
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <asm/landisk/iodata_landisk.h>
#include <asm/addrspace.h>
#include <asm/io.h>
extern void *area5_io_base; /* Area 5 I/O Base address */
extern void *area6_io_base; /* Area 6 I/O Base address */
static inline unsigned long port2adr(unsigned int port)
{
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
if (port == 0x3f6)
return ((unsigned long)area5_io_base + 0x2c);
else
return ((unsigned long)area5_io_base + PA_PIDE_OFFSET +
((port - 0x1f0) << 1));
else if ((0x170 <= port && port < 0x178) || port == 0x376)
if (port == 0x376)
return ((unsigned long)area6_io_base + 0x2c);
else
return ((unsigned long)area6_io_base + PA_SIDE_OFFSET +
((port - 0x170) << 1));
else
maybebadio((unsigned long)port);
return port;
}
/*
* General outline: remap really low stuff [eventually] to SuperIO,
* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
* is mapped through the PCI IO window. Stuff with high bits (PXSEG)
* should be way beyond the window, and is used w/o translation for
* compatibility.
*/
u8 landisk_inb(unsigned long port)
{
if (PXSEG(port))
return ctrl_inb(port);
else if (is_pci_ioaddr(port))
return ctrl_inb(pci_ioaddr(port));
return ctrl_inw(port2adr(port)) & 0xff;
}
u8 landisk_inb_p(unsigned long port)
{
u8 v;
if (PXSEG(port))
v = ctrl_inb(port);
else if (is_pci_ioaddr(port))
v = ctrl_inb(pci_ioaddr(port));
else
v = ctrl_inw(port2adr(port)) & 0xff;
ctrl_delay();
return v;
}
u16 landisk_inw(unsigned long port)
{
if (PXSEG(port))
return ctrl_inw(port);
else if (is_pci_ioaddr(port))
return ctrl_inw(pci_ioaddr(port));
else
maybebadio(port);
return 0;
}
u32 landisk_inl(unsigned long port)
{
if (PXSEG(port))
return ctrl_inl(port);
else if (is_pci_ioaddr(port))
return ctrl_inl(pci_ioaddr(port));
else
maybebadio(port);
return 0;
}
void landisk_outb(u8 value, unsigned long port)
{
if (PXSEG(port))
ctrl_outb(value, port);
else if (is_pci_ioaddr(port))
ctrl_outb(value, pci_ioaddr(port));
else
ctrl_outw(value, port2adr(port));
}
void landisk_outb_p(u8 value, unsigned long port)
{
if (PXSEG(port))
ctrl_outb(value, port);
else if (is_pci_ioaddr(port))
ctrl_outb(value, pci_ioaddr(port));
else
ctrl_outw(value, port2adr(port));
ctrl_delay();
}
void landisk_outw(u16 value, unsigned long port)
{
if (PXSEG(port))
ctrl_outw(value, port);
else if (is_pci_ioaddr(port))
ctrl_outw(value, pci_ioaddr(port));
else
maybebadio(port);
}
void landisk_outl(u32 value, unsigned long port)
{
if (PXSEG(port))
ctrl_outl(value, port);
else if (is_pci_ioaddr(port))
ctrl_outl(value, pci_ioaddr(port));
else
maybebadio(port);
}
void landisk_insb(unsigned long port, void *dst, unsigned long count)
{
volatile u16 *p;
u8 *buf = dst;
if (PXSEG(port)) {
while (count--)
*buf++ = *(volatile u8 *)port;
} else if (is_pci_ioaddr(port)) {
volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*buf++ = *bp;
} else {
p = (volatile u16 *)port2adr(port);
while (count--)
*buf++ = *p & 0xff;
}
}
void landisk_insw(unsigned long port, void *dst, unsigned long count)
{
volatile u16 *p;
u16 *buf = dst;
if (PXSEG(port))
p = (volatile u16 *)port;
else if (is_pci_ioaddr(port))
p = (volatile u16 *)pci_ioaddr(port);
else
p = (volatile u16 *)port2adr(port);
while (count--)
*buf++ = *p;
}
void landisk_insl(unsigned long port, void *dst, unsigned long count)
{
u32 *buf = dst;
if (is_pci_ioaddr(port)) {
volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
while (count--)
*buf++ = *p;
} else
maybebadio(port);
}
void landisk_outsb(unsigned long port, const void *src, unsigned long count)
{
volatile u16 *p;
const u8 *buf = src;
if (PXSEG(port))
while (count--)
ctrl_outb(*buf++, port);
else if (is_pci_ioaddr(port)) {
volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*bp = *buf++;
} else {
p = (volatile u16 *)port2adr(port);
while (count--)
*p = *buf++;
}
}
void landisk_outsw(unsigned long port, const void *src, unsigned long count)
{
volatile u16 *p;
const u16 *buf = src;
if (PXSEG(port))
p = (volatile u16 *)port;
else if (is_pci_ioaddr(port))
p = (volatile u16 *)pci_ioaddr(port);
else
p = (volatile u16 *)port2adr(port);
while (count--)
*p = *buf++;
}
void landisk_outsl(unsigned long port, const void *src, unsigned long count)
{
const u32 *buf = src;
if (is_pci_ioaddr(port)) {
volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
while (count--)
*p = *buf++;
} else
maybebadio(port);
}
void __iomem *landisk_ioport_map(unsigned long port, unsigned int size)
{
if (PXSEG(port))
return (void __iomem *)port;
else if (is_pci_ioaddr(port))
return (void __iomem *)pci_ioaddr(port);
return (void __iomem *)port2adr(port);
}

83
arch/sh/boards/landisk/irq.c
View File

@ -1,18 +1,16 @@
/*
* arch/sh/boards/landisk/irq.c
*
* I-O DATA Device, Inc. LANDISK Support
*
* Copyright (C) 2005-2007 kogiidena
*
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
*
* I/O routine for I-O Data Device, Inc. LANDISK.
*
* Initial version only to support LAN access; some
* placeholder code from io_landisk.c left in with the
* expectation of later SuperIO and PCMCIA access.
*/
/*
* modified by kogiidena
* 2005.03.03
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
@ -20,71 +18,27 @@
#include <linux/io.h>
#include <asm/landisk/iodata_landisk.h>
static void enable_landisk_irq(unsigned int irq);
static void disable_landisk_irq(unsigned int irq);
/* shutdown is same as "disable" */
#define shutdown_landisk_irq disable_landisk_irq
static void ack_landisk_irq(unsigned int irq);
static void end_landisk_irq(unsigned int irq);
static unsigned int startup_landisk_irq(unsigned int irq)
{
enable_landisk_irq(irq);
return 0; /* never anything pending */
}
static void disable_landisk_irq(unsigned int irq)
{
unsigned char val;
unsigned char mask = 0xff ^ (0x01 << (irq - 5));
/* Set the priority in IPR to 0 */
val = ctrl_inb(PA_IMASK);
val &= mask;
ctrl_outb(val, PA_IMASK);
ctrl_outb(ctrl_inb(PA_IMASK) & mask, PA_IMASK);
}
static void enable_landisk_irq(unsigned int irq)
{
unsigned char val;
unsigned char value = (0x01 << (irq - 5));
/* Set priority in IPR back to original value */
val = ctrl_inb(PA_IMASK);
val |= value;
ctrl_outb(val, PA_IMASK);
ctrl_outb(ctrl_inb(PA_IMASK) | value, PA_IMASK);
}
static void ack_landisk_irq(unsigned int irq)
{
disable_landisk_irq(irq);
}
static void end_landisk_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
enable_landisk_irq(irq);
}
static struct hw_interrupt_type landisk_irq_type = {
.typename = "LANDISK IRQ",
.startup = startup_landisk_irq,
.shutdown = shutdown_landisk_irq,
.enable = enable_landisk_irq,
.disable = disable_landisk_irq,
.ack = ack_landisk_irq,
.end = end_landisk_irq
static struct irq_chip landisk_irq_chip __read_mostly = {
.name = "LANDISK",
.mask = disable_landisk_irq,
.unmask = enable_landisk_irq,
.mask_ack = disable_landisk_irq,
};
static void make_landisk_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_desc[irq].chip = &landisk_irq_type;
disable_landisk_irq(irq);
}
/*
* Initialize IRQ setting
*/
@ -92,6 +46,11 @@ void __init init_landisk_IRQ(void)
{
int i;
for (i = 5; i < 14; i++)
make_landisk_irq(i);
for (i = 5; i < 14; i++) {
disable_irq_nosync(i);
set_irq_chip_and_handler_name(i, &landisk_irq_chip,
handle_level_irq, "level");
enable_landisk_irq(i);
}
ctrl_outb(0x00, PA_PWRINT_CLR);
}

346
arch/sh/boards/landisk/landisk_pwb.c
View File

@ -1,346 +0,0 @@
/*
* arch/sh/boards/landisk/landisk_pwb.c -- driver for the Power control switch.
*
* This driver will also support the I-O DATA Device, Inc. LANDISK Board.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copylight (C) 2002 Atom Create Engineering Co., Ltd.
*
* LED control drive function added by kogiidena
*/
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/signal.h>
#include <linux/major.h>
#include <linux/poll.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/interrupt.h>
#include <asm/system.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/landisk/iodata_landisk.h>
#define SHUTDOWN_BTN_MINOR 1 /* Shutdown button device minor no. */
#define LED_MINOR 21 /* LED minor no. */
#define BTN_MINOR 22 /* BUTTON minor no. */
#define GIO_MINOR 40 /* GIO minor no. */
static int openCnt;
static int openCntLED;
static int openCntGio;
static int openCntBtn;
static int landisk_btn;
static int landisk_btnctrlpid;
/*
* Functions prototypes
*/
static int gio_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
unsigned long arg);
static int swdrv_open(struct inode *inode, struct file *filp)
{
int minor;
minor = MINOR(inode->i_rdev);
filp->private_data = (void *)minor;
if (minor == SHUTDOWN_BTN_MINOR) {
if (openCnt > 0) {
return -EALREADY;
} else {
openCnt++;
return 0;
}
} else if (minor == LED_MINOR) {
if (openCntLED > 0) {
return -EALREADY;
} else {
openCntLED++;
return 0;
}
} else if (minor == BTN_MINOR) {
if (openCntBtn > 0) {
return -EALREADY;
} else {
openCntBtn++;
return 0;
}
} else if (minor == GIO_MINOR) {
if (openCntGio > 0) {
return -EALREADY;
} else {
openCntGio++;
return 0;
}
}
return -ENOENT;
}
static int swdrv_close(struct inode *inode, struct file *filp)
{
int minor;
minor = MINOR(inode->i_rdev);
if (minor == SHUTDOWN_BTN_MINOR) {
openCnt--;
} else if (minor == LED_MINOR) {
openCntLED--;
} else if (minor == BTN_MINOR) {
openCntBtn--;
} else if (minor == GIO_MINOR) {
openCntGio--;
}
return 0;
}
static int swdrv_read(struct file *filp, char *buff, size_t count,
loff_t * ppos)
{
int minor;
minor = (int)(filp->private_data);
if (!access_ok(VERIFY_WRITE, (void *)buff, count))
return -EFAULT;
if (minor == SHUTDOWN_BTN_MINOR) {
if (landisk_btn & 0x10) {
put_user(1, buff);
return 1;
} else {
return 0;
}
}
return 0;
}
static int swdrv_write(struct file *filp, const char *buff, size_t count,
loff_t * ppos)
{
int minor;
minor = (int)(filp->private_data);
if (minor == SHUTDOWN_BTN_MINOR) {
return count;
}
return count;
}
static irqreturn_t sw_interrupt(int irq, void *dev_id)
{
landisk_btn = (0x0ff & (~ctrl_inb(PA_STATUS)));
disable_irq(IRQ_BUTTON);
disable_irq(IRQ_POWER);
ctrl_outb(0x00, PA_PWRINT_CLR);
if (landisk_btnctrlpid != 0) {
kill_proc(landisk_btnctrlpid, SIGUSR1, 1);
landisk_btnctrlpid = 0;
}
return IRQ_HANDLED;
}
static const struct file_operations swdrv_fops = {
.read = swdrv_read, /* read */
.write = swdrv_write, /* write */
.open = swdrv_open, /* open */
.release = swdrv_close, /* release */
.ioctl = gio_ioctl, /* ioctl */
};
static char banner[] __initdata =
KERN_INFO "LANDISK and USL-5P Button, LED and GIO driver initialized\n";
int __init swdrv_init(void)
{
int error;
printk("%s", banner);
openCnt = 0;
openCntLED = 0;
openCntBtn = 0;
openCntGio = 0;
landisk_btn = 0;
landisk_btnctrlpid = 0;
if ((error = register_chrdev(SHUTDOWN_BTN_MAJOR, "swdrv", &swdrv_fops))) {
printk(KERN_ERR
"Button, LED and GIO driver:Couldn't register driver, error=%d\n",
error);
return 1;
}
if (request_irq(IRQ_POWER, sw_interrupt, 0, "SHUTDOWNSWITCH", NULL)) {
printk(KERN_ERR "Unable to get IRQ 11.\n");
return 1;
}
if (request_irq(IRQ_BUTTON, sw_interrupt, 0, "USL-5P BUTTON", NULL)) {
printk(KERN_ERR "Unable to get IRQ 12.\n");
return 1;
}
ctrl_outb(0x00, PA_PWRINT_CLR);
return 0;
}
module_init(swdrv_init);
/*
* gio driver
*
*/
#include <asm/landisk/gio.h>
static int gio_ioctl(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
{
int minor;
unsigned int data, mask;
static unsigned int addr = 0;
minor = (int)(filp->private_data);
/* access control */
if (minor == GIO_MINOR) {
;
} else if (minor == LED_MINOR) {
if (((cmd & 0x0ff) >= 9) && ((cmd & 0x0ff) < 20)) {
;
} else {
return -EINVAL;
}
} else if (minor == BTN_MINOR) {
if (((cmd & 0x0ff) >= 20) && ((cmd & 0x0ff) < 30)) {
;
} else {
return -EINVAL;
}
} else {
return -EINVAL;
}
if (cmd & 0x01) { /* write */
if (copy_from_user(&data, (int *)arg, sizeof(int))) {
return -EFAULT;
}
}
switch (cmd) {
case GIODRV_IOCSGIOSETADDR: /* addres set */
addr = data;
break;
case GIODRV_IOCSGIODATA1: /* write byte */
ctrl_outb((unsigned char)(0x0ff & data), addr);
break;
case GIODRV_IOCSGIODATA2: /* write word */
if (addr & 0x01) {
return -EFAULT;
}
ctrl_outw((unsigned short int)(0x0ffff & data), addr);
break;
case GIODRV_IOCSGIODATA4: /* write long */
if (addr & 0x03) {
return -EFAULT;
}
ctrl_outl(data, addr);
break;
case GIODRV_IOCGGIODATA1: /* read byte */
data = ctrl_inb(addr);
break;
case GIODRV_IOCGGIODATA2: /* read word */
if (addr & 0x01) {
return -EFAULT;
}
data = ctrl_inw(addr);
break;
case GIODRV_IOCGGIODATA4: /* read long */
if (addr & 0x03) {
return -EFAULT;
}
data = ctrl_inl(addr);
break;
case GIODRV_IOCSGIO_LED: /* write */
mask = ((data & 0x00ffffff) << 8)
| ((data & 0x0000ffff) << 16)
| ((data & 0x000000ff) << 24);
landisk_ledparam = data & (~mask);
if (landisk_arch == 0) { /* arch == landisk */
landisk_ledparam &= 0x03030303;
mask = (~(landisk_ledparam >> 22)) & 0x000c;
landisk_ledparam |= mask;
} else { /* arch == usl-5p */
mask = (landisk_ledparam >> 24) & 0x0001;
landisk_ledparam |= mask;
landisk_ledparam &= 0x007f7f7f;
}
landisk_ledparam |= 0x80;
break;
case GIODRV_IOCGGIO_LED: /* read */
data = landisk_ledparam;
if (landisk_arch == 0) { /* arch == landisk */
data &= 0x03030303;
} else { /* arch == usl-5p */
;
}
data &= (~0x080);
break;
case GIODRV_IOCSGIO_BUZZER: /* write */
landisk_buzzerparam = data;
landisk_ledparam |= 0x80;
break;
case GIODRV_IOCGGIO_LANDISK: /* read */
data = landisk_arch & 0x01;
break;
case GIODRV_IOCGGIO_BTN: /* read */
data = (0x0ff & ctrl_inb(PA_PWRINT_CLR));
data <<= 8;
data |= (0x0ff & ctrl_inb(PA_IMASK));
data <<= 8;
data |= (0x0ff & landisk_btn);
data <<= 8;
data |= (0x0ff & (~ctrl_inb(PA_STATUS)));
break;
case GIODRV_IOCSGIO_BTNPID: /* write */
landisk_btnctrlpid = data;
landisk_btn = 0;
if (irq_desc[IRQ_BUTTON].depth) {
enable_irq(IRQ_BUTTON);
}
if (irq_desc[IRQ_POWER].depth) {
enable_irq(IRQ_POWER);
}
break;
case GIODRV_IOCGGIO_BTNPID: /* read */
data = landisk_btnctrlpid;
break;
default:
return -EFAULT;
break;
}
if ((cmd & 0x01) == 0) { /* read */
if (copy_to_user((int *)arg, &data, sizeof(int))) {
return -EFAULT;
}
}
return 0;
}

143
arch/sh/boards/landisk/psw.c Normal file
View File

@ -0,0 +1,143 @@
/*
* arch/sh/boards/landisk/psw.c
*
* push switch support for LANDISK and USL-5P
*
* Copyright (C) 2006-2007 Paul Mundt
* Copyright (C) 2007 kogiidena
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/io.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <asm/landisk/iodata_landisk.h>
#include <asm/push-switch.h>
static irqreturn_t psw_irq_handler(int irq, void *arg)
{
struct platform_device *pdev = arg;
struct push_switch *psw = platform_get_drvdata(pdev);
struct push_switch_platform_info *psw_info = pdev->dev.platform_data;
unsigned int sw_value;
int ret = 0;
sw_value = (0x0ff & (~ctrl_inb(PA_STATUS)));
/* Nothing to do if there's no state change */
if (psw->state) {
ret = 1;
goto out;
}
/* Figure out who raised it */
if (sw_value & (1 << psw_info->bit)) {
psw->state = 1;
mod_timer(&psw->debounce, jiffies + 50);
ret = 1;
}
out:
/* Clear the switch IRQs */
ctrl_outb(0x00, PA_PWRINT_CLR);
return IRQ_RETVAL(ret);
}
static struct resource psw_power_resources[] = {
[0] = {
.start = IRQ_POWER,
.flags = IORESOURCE_IRQ,
},
};
static struct resource psw_usl5p_resources[] = {
[0] = {
.start = IRQ_BUTTON,
.flags = IORESOURCE_IRQ,
},
};
static struct push_switch_platform_info psw_power_platform_data = {
.name = "psw_power",
.bit = 4,
.irq_flags = IRQF_SHARED,
.irq_handler = psw_irq_handler,
};
static struct push_switch_platform_info psw1_platform_data = {
.name = "psw1",
.bit = 0,
.irq_flags = IRQF_SHARED,
.irq_handler = psw_irq_handler,
};
static struct push_switch_platform_info psw2_platform_data = {
.name = "psw2",
.bit = 2,
.irq_flags = IRQF_SHARED,
.irq_handler = psw_irq_handler,
};
static struct push_switch_platform_info psw3_platform_data = {
.name = "psw3",
.bit = 1,
.irq_flags = IRQF_SHARED,
.irq_handler = psw_irq_handler,
};
static struct platform_device psw_power_switch_device = {
.name = "push-switch",
.id = 0,
.num_resources = ARRAY_SIZE(psw_power_resources),
.resource = psw_power_resources,
.dev = {
.platform_data = &psw_power_platform_data,
},
};
static struct platform_device psw1_switch_device = {
.name = "push-switch",
.id = 1,
.num_resources = ARRAY_SIZE(psw_usl5p_resources),
.resource = psw_usl5p_resources,
.dev = {
.platform_data = &psw1_platform_data,
},
};
static struct platform_device psw2_switch_device = {
.name = "push-switch",
.id = 2,
.num_resources = ARRAY_SIZE(psw_usl5p_resources),
.resource = psw_usl5p_resources,
.dev = {
.platform_data = &psw2_platform_data,
},
};
static struct platform_device psw3_switch_device = {
.name = "push-switch",
.id = 3,
.num_resources = ARRAY_SIZE(psw_usl5p_resources),
.resource = psw_usl5p_resources,
.dev = {
.platform_data = &psw3_platform_data,
},
};
static struct platform_device *psw_devices[] = {
&psw_power_switch_device,
&psw1_switch_device,
&psw2_switch_device,
&psw3_switch_device,
};
static int __init psw_init(void)
{
return platform_add_devices(psw_devices, ARRAY_SIZE(psw_devices));
}
module_init(psw_init);

91
arch/sh/boards/landisk/rtc.c
View File

@ -1,91 +0,0 @@
/*
* arch/sh/boards/landisk/rtc.c -- RTC support
*
* Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
*/
/*
* modifed by kogiidena
* 2005.09.16
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/time.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/bcd.h>
#include <asm/rtc.h>
extern spinlock_t rtc_lock;
extern void
rs5c313_set_cmos_time(unsigned int BCD_yr, unsigned int BCD_mon,
unsigned int BCD_day, unsigned int BCD_hr,
unsigned int BCD_min, unsigned int BCD_sec);
extern unsigned long
rs5c313_get_cmos_time(unsigned int *BCD_yr, unsigned int *BCD_mon,
unsigned int *BCD_day, unsigned int *BCD_hr,
unsigned int *BCD_min, unsigned int *BCD_sec);
void landisk_rtc_gettimeofday(struct timespec *tv)
{
unsigned int BCD_yr, BCD_mon, BCD_day, BCD_hr, BCD_min, BCD_sec;
unsigned long flags;
spin_lock_irqsave(&rtc_lock, flags);
tv->tv_sec = rs5c313_get_cmos_time
(&BCD_yr, &BCD_mon, &BCD_day, &BCD_hr, &BCD_min, &BCD_sec);
tv->tv_nsec = 0;
spin_unlock_irqrestore(&rtc_lock, flags);
}
int landisk_rtc_settimeofday(const time_t secs)
{
int retval = 0;
int real_seconds, real_minutes, cmos_minutes;
unsigned long flags;
unsigned long nowtime = secs;
unsigned int BCD_yr, BCD_mon, BCD_day, BCD_hr, BCD_min, BCD_sec;
spin_lock_irqsave(&rtc_lock, flags);
rs5c313_get_cmos_time
(&BCD_yr, &BCD_mon, &BCD_day, &BCD_hr, &BCD_min, &BCD_sec);
cmos_minutes = BCD_min;
BCD_TO_BIN(cmos_minutes);
/*
* since we're only adjusting minutes and seconds,
* don't interfere with hour overflow. This avoids
* messing with unknown time zones but requires your
* RTC not to be off by more than 15 minutes
*/
real_seconds = nowtime % 60;
real_minutes = nowtime / 60;
if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
real_minutes += 30; /* correct for half hour time zone */
real_minutes %= 60;
if (abs(real_minutes - cmos_minutes) < 30) {
BIN_TO_BCD(real_seconds);
BIN_TO_BCD(real_minutes);
rs5c313_set_cmos_time(BCD_yr, BCD_mon, BCD_day, BCD_hr,
real_minutes, real_seconds);
} else {
printk(KERN_WARNING
"set_rtc_time: can't update from %d to %d\n",
cmos_minutes, real_minutes);
retval = -1;
}
spin_unlock_irqrestore(&rtc_lock, flags);
return retval;
}
void landisk_time_init(void)
{
rtc_sh_get_time = landisk_rtc_gettimeofday;
rtc_sh_set_time = landisk_rtc_settimeofday;
}

161
arch/sh/boards/landisk/setup.c
View File

@ -1,144 +1,90 @@
/*
* arch/sh/boards/landisk/setup.c
*
* Copyright (C) 2000 Kazumoto Kojima
* Copyright (C) 2002 Paul Mundt
*
* I-O DATA Device, Inc. LANDISK Support.
*
* Modified for LANDISK by
* Atom Create Engineering Co., Ltd. 2002.
*
* modifed by kogiidena
* 2005.09.16
* Copyright (C) 2000 Kazumoto Kojima
* Copyright (C) 2002 Paul Mundt
* Copylight (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2005-2007 kogiidena
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pata_platform.h>
#include <linux/pm.h>
#include <linux/mm.h>
#include <asm/machvec.h>
#include <asm/rtc.h>
#include <asm/landisk/iodata_landisk.h>
#include <asm/io.h>
void landisk_time_init(void);
void init_landisk_IRQ(void);
int landisk_ledparam;
int landisk_buzzerparam;
int landisk_arch;
/* cycle the led's in the clasic knightrider/sun pattern */
static void heartbeat_landisk(void)
{
static unsigned int cnt = 0, blink = 0x00, period = 25;
volatile u8 *p = (volatile u8 *)PA_LED;
char data;
if ((landisk_ledparam & 0x080) == 0)
return;
cnt += 1;
if (cnt < period)
return;
cnt = 0;
blink++;
data = (blink & 0x01) ? (landisk_ledparam >> 16) : 0;
data |= (blink & 0x02) ? (landisk_ledparam >> 8) : 0;
data |= landisk_ledparam;
/* buzzer */
if (landisk_buzzerparam & 0x1) {
data |= 0x80;
} else {
data &= 0x7f;
}
*p = data;
if (((landisk_ledparam & 0x007f7f00) == 0) &&
(landisk_buzzerparam == 0))
landisk_ledparam &= (~0x0080);
landisk_buzzerparam >>= 1;
}
static void landisk_power_off(void)
{
ctrl_outb(0x01, PA_SHUTDOWN);
}
static void check_usl5p(void)
{
volatile u8 *p = (volatile u8 *)PA_LED;
u8 tmp1, tmp2;
static struct resource cf_ide_resources[3];
tmp1 = *p;
*p = 0x40;
tmp2 = *p;
*p = tmp1;
static struct pata_platform_info pata_info = {
.ioport_shift = 1,
};
landisk_arch = (tmp2 == 0x40);
if (landisk_arch == 1) {
/* arch == usl-5p */
landisk_ledparam = 0x00000380;
landisk_ledparam |= (tmp1 & 0x07c);
} else {
/* arch == landisk */
landisk_ledparam = 0x02000180;
landisk_ledparam |= 0x04;
}
}
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
.dev = {
.platform_data = &pata_info,
},
};
void *area5_io_base;
void *area6_io_base;
static struct platform_device *landisk_devices[] __initdata = {
&cf_ide_device,
};
static int __init landisk_cf_init(void)
static int __init landisk_devices_setup(void)
{
pgprot_t prot;
unsigned long paddrbase, psize;
unsigned long paddrbase;
void *cf_ide_base;
/* open I/O area window */
paddrbase = virt_to_phys((void *)PA_AREA5_IO);
psize = PAGE_SIZE;
prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
area5_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
if (!area5_io_base) {
cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
if (!cf_ide_base) {
printk("allocate_cf_area : can't open CF I/O window!\n");
return -ENOMEM;
}
paddrbase = virt_to_phys((void *)PA_AREA6_IO);
psize = PAGE_SIZE;
prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
area6_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
if (!area6_io_base) {
printk("allocate_cf_area : can't open HDD I/O window!\n");
return -ENOMEM;
}
/* IDE cmd address : 0x1f0-0x1f7 and 0x3f6 */
cf_ide_resources[0].start = (unsigned long)cf_ide_base + 0x40;
cf_ide_resources[0].end = (unsigned long)cf_ide_base + 0x40 + 0x0f;
cf_ide_resources[0].flags = IORESOURCE_IO;
cf_ide_resources[1].start = (unsigned long)cf_ide_base + 0x2c;
cf_ide_resources[1].end = (unsigned long)cf_ide_base + 0x2c + 0x03;
cf_ide_resources[1].flags = IORESOURCE_IO;
cf_ide_resources[2].start = IRQ_FATA;
cf_ide_resources[2].flags = IORESOURCE_IRQ;
printk(KERN_INFO "Allocate Area5/6 success.\n");
/* XXX : do we need attribute and common-memory area also? */
return 0;
return platform_add_devices(landisk_devices,
ARRAY_SIZE(landisk_devices));
}
__initcall(landisk_devices_setup);
static void __init landisk_setup(char **cmdline_p)
{
device_initcall(landisk_cf_init);
landisk_buzzerparam = 0;
check_usl5p();
/* LED ON */
ctrl_outb(ctrl_inb(PA_LED) | 0x03, PA_LED);
printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n");
board_time_init = landisk_time_init;
pm_power_off = landisk_power_off;
}
@ -148,29 +94,6 @@ static void __init landisk_setup(char **cmdline_p)
struct sh_machine_vector mv_landisk __initmv = {
.mv_name = "LANDISK",
.mv_setup = landisk_setup,
.mv_nr_irqs = 72,
.mv_inb = landisk_inb,
.mv_inw = landisk_inw,
.mv_inl = landisk_inl,
.mv_outb = landisk_outb,
.mv_outw = landisk_outw,
.mv_outl = landisk_outl,
.mv_inb_p = landisk_inb_p,
.mv_inw_p = landisk_inw,
.mv_inl_p = landisk_inl,
.mv_outb_p = landisk_outb_p,
.mv_outw_p = landisk_outw,
.mv_outl_p = landisk_outl,
.mv_insb = landisk_insb,
.mv_insw = landisk_insw,
.mv_insl = landisk_insl,
.mv_outsb = landisk_outsb,
.mv_outsw = landisk_outsw,
.mv_outsl = landisk_outsl,
.mv_ioport_map = landisk_ioport_map,
.mv_init_irq = init_landisk_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_landisk,
#endif
};
ALIAS_MV(landisk)

5
arch/sh/boards/lboxre2/Makefile Normal file
View File

@ -0,0 +1,5 @@
#
# Makefile for the L-BOX RE2 specific parts of the kernel
# Copyright (c) 2007 Nobuhiro Iwamatsu
obj-y := setup.o irq.o

31
arch/sh/boards/lboxre2/irq.c Normal file
View File

@ -0,0 +1,31 @@
/*
* linux/arch/sh/boards/lboxre2/irq.c
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* NTT COMWARE L-BOX RE2 Support.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/lboxre2.h>
/*
* Initialize IRQ setting
*/
void __init init_lboxre2_IRQ(void)
{
make_imask_irq(IRQ_CF1);
make_imask_irq(IRQ_CF0);
make_imask_irq(IRQ_INTD);
make_imask_irq(IRQ_ETH1);
make_imask_irq(IRQ_ETH0);
make_imask_irq(IRQ_INTA);
}

85
arch/sh/boards/lboxre2/setup.c Normal file
View File

@ -0,0 +1,85 @@
/*
* linux/arch/sh/boards/lbox/setup.c
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* NTT COMWARE L-BOX RE2 Support
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pata_platform.h>
#include <asm/machvec.h>
#include <asm/addrspace.h>
#include <asm/lboxre2.h>
#include <asm/io.h>
static struct resource cf_ide_resources[] = {
[0] = {
.start = 0x1f0,
.end = 0x1f0 + 8 ,
.flags = IORESOURCE_IO,
},
[1] = {
.start = 0x1f0 + 0x206,
.end = 0x1f0 +8 + 0x206 + 8,
.flags = IORESOURCE_IO,
},
[2] = {
.start = IRQ_CF0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
};
static struct platform_device *lboxre2_devices[] __initdata = {
&cf_ide_device,
};
static int __init lboxre2_devices_setup(void)
{
u32 cf0_io_base; /* Boot CF base address */
pgprot_t prot;
unsigned long paddrbase, psize;
/* open I/O area window */
paddrbase = virt_to_phys((void*)PA_AREA5_IO);
psize = PAGE_SIZE;
prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16);
cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot);
if (!cf0_io_base) {
printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ );
return -ENOMEM;
}
cf_ide_resources[0].start += cf0_io_base ;
cf_ide_resources[0].end += cf0_io_base ;
cf_ide_resources[1].start += cf0_io_base ;
cf_ide_resources[1].end += cf0_io_base ;
return platform_add_devices(lboxre2_devices,
ARRAY_SIZE(lboxre2_devices));
}
device_initcall(lboxre2_devices_setup);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_lboxre2 __initmv = {
.mv_name = "L-BOX RE2",
.mv_nr_irqs = 72,
.mv_init_irq = init_lboxre2_IRQ,
};
ALIAS_MV(lboxre2)

18
arch/sh/boards/renesas/r7780rp/Kconfig
View File

@ -1,14 +1,24 @@
if SH_R7780RP
if SH_HIGHLANDER
menu "R7780RP options"
choice
prompt "Highlander options"
default SH_R7780MP
config SH_R7780RP
bool "R7780RP-1 board support"
select CPU_SUBTYPE_SH7780
config SH_R7780MP
bool "R7780MP board support"
default y
select CPU_SUBTYPE_SH7780
help
Selecting this option will enable support for the mass-production
version of the R7780RP. If in doubt, say Y.
endmenu
config SH_R7785RP
bool "R7785RP board support"
select CPU_SUBTYPE_SH7785
endchoice
endif

6
arch/sh/boards/renesas/r7780rp/Makefile
View File

@ -1,7 +1,7 @@
#
# Makefile for the R7780RP-1 specific parts of the kernel
#
obj-y := setup.o irq.o
irqinit-y := irq-r7780rp.o
irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o
obj-$(CONFIG_PUSH_SWITCH) += psw.o
obj-y := setup.o irq.o $(irqinit-y)

21
arch/sh/boards/renesas/r7780rp/irq-r7780rp.c Normal file
View File

@ -0,0 +1,21 @@
/*
* Renesas Solutions Highlander R7780RP-1 Support.
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <asm/io.h>
#include <asm/r7780rp.h>
void __init highlander_init_irq(void)
{
int i;
for (i = 0; i < 15; i++)
make_r7780rp_irq(i);
}

29
arch/sh/boards/renesas/r7780rp/irq-r7785rp.c Normal file
View File

@ -0,0 +1,29 @@
/*
* Renesas Solutions Highlander R7780RP-1 Support.
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <asm/io.h>
#include <asm/r7780rp.h>
void __init highlander_init_irq(void)
{
ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
/* Setup the FPGA IRL */
ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */
ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */
ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */
ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */
ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */
ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */
make_r7780rp_irq(1); /* CF card */
make_r7780rp_irq(10); /* On-board ethernet */
}

25
arch/sh/boards/renesas/r7780rp/irq.c
View File

@ -14,10 +14,12 @@
#include <linux/io.h>
#include <asm/r7780rp.h>
#ifdef CONFIG_SH_R7780MP
static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
#else
#ifdef CONFIG_SH_R7780RP
static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0};
#elif defined(CONFIG_SH_R7780MP)
static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
#elif defined(CONFIG_SH_R7785RP)
static int mask_pos[] = {2, 11, 2, 2, 2, 2, 9, 8, 7, 5, 10, 2, 2, 2, 2, 2};
#endif
static void enable_r7780rp_irq(unsigned int irq)
@ -40,17 +42,10 @@ static struct irq_chip r7780rp_irq_chip __read_mostly = {
.mask_ack = disable_r7780rp_irq,
};
/*
* Initialize IRQ setting
*/
void __init init_r7780rp_IRQ(void)
void make_r7780rp_irq(unsigned int irq)
{
int i;
for (i = 0; i < 15; i++) {
disable_irq_nosync(i);
set_irq_chip_and_handler_name(i, &r7780rp_irq_chip,
handle_level_irq, "level");
enable_r7780rp_irq(i);
}
disable_irq_nosync(irq);
set_irq_chip_and_handler_name(irq, &r7780rp_irq_chip,
handle_level_irq, "level");
enable_r7780rp_irq(irq);
}

78
arch/sh/boards/renesas/r7780rp/setup.c
View File

@ -1,10 +1,13 @@
/*
* arch/sh/boards/renesas/r7780rp/setup.c
*
* Renesas Solutions Highlander Support.
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2005 - 2007 Paul Mundt
*
* Renesas Solutions Highlander R7780RP-1 Support.
* This contains support for the R7780RP-1, R7780MP, and R7785RP
* Highlander modules.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -18,32 +21,6 @@
#include <asm/clock.h>
#include <asm/io.h>
extern void init_r7780rp_IRQ(void);
static struct resource m66596_usb_host_resources[] = {
[0] = {
.start = 0xa4800000,
.end = 0xa4ffffff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 6, /* irq number */
.end = 6,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device m66596_usb_host_device = {
.name = "m66596-hcd",
.id = 0,
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(m66596_usb_host_resources),
.resource = m66596_usb_host_resources,
};
static struct resource cf_ide_resources[] = {
[0] = {
.start = PA_AREA5_IO + 0x1000,
@ -56,10 +33,10 @@ static struct resource cf_ide_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
#ifdef CONFIG_SH_R7780MP
.start = 1,
#else
#ifdef CONFIG_SH_R7780RP
.start = 4,
#else
.start = 1,
#endif
.flags = IORESOURCE_IRQ,
},
@ -92,15 +69,18 @@ static struct resource heartbeat_resources[] = {
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
/* R7785RP has a slightly more sensible FPGA.. */
#ifndef CONFIG_SH_R7785RP
.dev = {
.platform_data = heartbeat_bit_pos,
},
#endif
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *r7780rp_devices[] __initdata = {
&m66596_usb_host_device,
&cf_ide_device,
&heartbeat_device,
};
@ -110,18 +90,19 @@ static int __init r7780rp_devices_setup(void)
return platform_add_devices(r7780rp_devices,
ARRAY_SIZE(r7780rp_devices));
}
device_initcall(r7780rp_devices_setup);
/*
* Platform specific clocks
*/
static void ivdr_clk_enable(struct clk *clk)
{
ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << 8), PA_IVDRCTL);
ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL);
}
static void ivdr_clk_disable(struct clk *clk)
{
ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << 8), PA_IVDRCTL);
ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL);
}
static struct clk_ops ivdr_clk_ops = {
@ -140,22 +121,22 @@ static struct clk *r7780rp_clocks[] = {
static void r7780rp_power_off(void)
{
#ifdef CONFIG_SH_R7780MP
ctrl_outw(0x0001, PA_POFF);
#endif
if (mach_is_r7780mp() || mach_is_r7785rp())
ctrl_outw(0x0001, PA_POFF);
}
/*
* Initialize the board
*/
static void __init r7780rp_setup(char **cmdline_p)
static void __init highlander_setup(char **cmdline_p)
{
u16 ver = ctrl_inw(PA_VERREG);
int i;
device_initcall(r7780rp_devices_setup);
printk(KERN_INFO "Renesas Solutions Highlander R7780RP-1 support.\n");
printk(KERN_INFO "Renesas Solutions Highlander %s support.\n",
mach_is_r7780rp() ? "R7780RP-1" :
mach_is_r7780mp() ? "R7780MP" :
"R7785RP");
printk(KERN_INFO "Board version: %d (revision %d), "
"FPGA version: %d (revision %d)\n",
@ -173,9 +154,10 @@ static void __init r7780rp_setup(char **cmdline_p)
}
ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */
#ifndef CONFIG_SH_R7780MP
ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */
#endif
if (mach_is_r7780rp())
ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */
ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */
pm_power_off = r7780rp_power_off;
@ -184,10 +166,10 @@ static void __init r7780rp_setup(char **cmdline_p)
/*
* The Machine Vector
*/
struct sh_machine_vector mv_r7780rp __initmv = {
.mv_name = "Highlander R7780RP-1",
.mv_setup = r7780rp_setup,
struct sh_machine_vector mv_highlander __initmv = {
.mv_name = "Highlander",
.mv_nr_irqs = 109,
.mv_init_irq = init_r7780rp_IRQ,
.mv_setup = highlander_setup,
.mv_init_irq = highlander_init_irq,
};
ALIAS_MV(r7780rp)
ALIAS_MV(highlander)

2
arch/sh/boards/se/770x/io.c
View File

@ -27,6 +27,8 @@ int sh_pcic_io_dummy;
static inline volatile __u16 *
port2adr(unsigned int port)
{
if (port & 0xff000000)
return ( volatile __u16 *) port;
if (port >= 0x2000)
return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
else if (port >= 0x1000)

57
arch/sh/boards/se/770x/irq.c
View File

@ -55,23 +55,34 @@ void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs)
}
static struct ipr_data se770x_ipr_map[] = {
/*
* Super I/O (Just mimic PC):
* 1: keyboard
* 3: serial 0
* 4: serial 1
* 5: printer
* 6: floppy
* 8: rtc
* 12: mouse
* 14: ide0
*/
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
/* This is default value */
{ 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA},
{ 0xf-0xa, 0, 4, 0xa , BCR_ILCRA},
{ 0xf-0x5, 0, 0, 0x5 , BCR_ILCRB},
{ 0xf-0x8, 0, 4, 0x8 , BCR_ILCRC},
{ 0xf-0xc, 0, 0, 0xc , BCR_ILCRC},
{ 0xf-0xe, 0, 12, 0xe , BCR_ILCRD},
{ 0xf-0x3, 0, 4, 0x3 , BCR_ILCRD}, /* LAN */
{ 0xf-0xd, 0, 8, 0xd , BCR_ILCRE},
{ 0xf-0x9, 0, 4, 0x9 , BCR_ILCRE},
{ 0xf-0x1, 0, 0, 0x1 , BCR_ILCRE},
{ 0xf-0xf, 0, 12, 0xf , BCR_ILCRF},
{ 0xf-0xb, 0, 4, 0xb , BCR_ILCRF},
{ 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG},
{ 0xf-0x6, 0, 8, 0x6 , BCR_ILCRG},
{ 0xf-0x4, 0, 4, 0x4 , BCR_ILCRG},
{ 13, 0, 8, 0x0f-13 ,BCR_ILCRA},
{ 5 , 0, 4, 0x0f- 5 ,BCR_ILCRA},
{ 10, 0, 0, 0x0f-10, BCR_ILCRB},
{ 7 , 0, 4, 0x0f- 7, BCR_ILCRC},
{ 3 , 0, 0, 0x0f- 3, BCR_ILCRC},
{ 1 , 0, 12, 0x0f- 1, BCR_ILCRD},
{ 12, 0, 4, 0x0f-12, BCR_ILCRD}, /* LAN */
{ 2 , 0, 8, 0x0f- 2, BCR_ILCRE}, /* PCIRQ2 */
{ 6 , 0, 4, 0x0f- 6, BCR_ILCRE}, /* PCIRQ1 */
{ 14, 0, 0, 0x0f-14, BCR_ILCRE}, /* PCIRQ0 */
{ 0 , 0, 12, 0x0f , BCR_ILCRF},
{ 4 , 0, 4, 0x0f- 4, BCR_ILCRF},
{ 8 , 0, 12, 0x0f- 8, BCR_ILCRG},
{ 9 , 0, 8, 0x0f- 9, BCR_ILCRG},
{ 11, 0, 4, 0x0f-11, BCR_ILCRG},
#else
{ 14, 0, 8, 0x0f-14 ,BCR_ILCRA},
{ 12, 0, 4, 0x0f-12 ,BCR_ILCRA},
@ -81,8 +92,10 @@ static struct ipr_data se770x_ipr_map[] = {
{ 4, 0, 4, 0x0f- 4 ,BCR_ILCRC},
{ 3, 0, 0, 0x0f- 3 ,BCR_ILCRC},
{ 1, 0, 12, 0x0f- 1 ,BCR_ILCRD},
#if defined(CONFIG_STNIC)
/* ST NIC */
{ 10, 0, 4, 0x0f-10 ,BCR_ILCRD}, /* LAN */
#endif
/* MRSHPC IRQs setting */
{ 0, 0, 12, 0x0f- 0 ,BCR_ILCRE}, /* PCIRQ3 */
{ 11, 0, 8, 0x0f-11 ,BCR_ILCRE}, /* PCIRQ2 */
@ -100,18 +113,6 @@ static struct ipr_data se770x_ipr_map[] = {
*/
void __init init_se_IRQ(void)
{
/*
* Super I/O (Just mimic PC):
* 1: keyboard
* 3: serial 0
* 4: serial 1
* 5: printer
* 6: floppy
* 8: rtc
* 12: mouse
* 14: ide0
*/
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
/* Disable all interrupts */
ctrl_outw(0, BCR_ILCRA);
ctrl_outw(0, BCR_ILCRB);
@ -120,6 +121,6 @@ void __init init_se_IRQ(void)
ctrl_outw(0, BCR_ILCRE);
ctrl_outw(0, BCR_ILCRF);
ctrl_outw(0, BCR_ILCRG);
#endif
make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map));
}

30
arch/sh/boards/se/770x/setup.c
View File

@ -63,6 +63,31 @@ static void __init smsc_setup(char **cmdline_p)
outb_p(CONFIG_EXIT, CONFIG_PORT);
}
static struct resource cf_ide_resources[] = {
[0] = {
.start = PA_MRSHPC_IO + 0x1f0,
.end = PA_MRSHPC_IO + 0x1f0 + 8,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
.end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_CFCARD,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
};
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct resource heartbeat_resources[] = {
@ -85,13 +110,14 @@ static struct platform_device heartbeat_device = {
static struct platform_device *se_devices[] __initdata = {
&heartbeat_device,
&cf_ide_device,
};
static int __init se_devices_setup(void)
{
return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
}
__initcall(se_devices_setup);
device_initcall(se_devices_setup);
/*
* The Machine Vector
@ -107,6 +133,8 @@ struct sh_machine_vector mv_se __initmv = {
.mv_nr_irqs = 61,
#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
.mv_nr_irqs = 86,
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
.mv_nr_irqs = 104,
#endif
.mv_inb = se_inb,

10
arch/sh/boards/se/7722/Makefile Normal file
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@ -0,0 +1,10 @@
#
# Makefile for the HITACHI UL SolutionEngine 7722 specific parts of the kernel
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
#
obj-y := setup.o irq.o

101
arch/sh/boards/se/7722/irq.c Normal file
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@ -0,0 +1,101 @@
/*
* linux/arch/sh/boards/se/7722/irq.c
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* Hitachi UL SolutionEngine 7722 Support.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/se7722.h>
#define INTC_INTMSK0 0xFFD00044
#define INTC_INTMSKCLR0 0xFFD00064
static void disable_se7722_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
ctrl_outw( ctrl_inw( p->addr ) | p->priority , p->addr );
}
static void enable_se7722_irq(unsigned int irq)
{
struct ipr_data *p = get_irq_chip_data(irq);
ctrl_outw( ctrl_inw( p->addr ) & ~p->priority , p->addr );
}
static struct irq_chip se7722_irq_chip __read_mostly = {
.name = "SE7722",
.mask = disable_se7722_irq,
.unmask = enable_se7722_irq,
.mask_ack = disable_se7722_irq,
};
static struct ipr_data ipr_irq_table[] = {
/* irq ,idx,sft, priority , addr */
{ MRSHPC_IRQ0 , 0 , 0 , MRSHPC_BIT0 , IRQ01_MASK } ,
{ MRSHPC_IRQ1 , 0 , 0 , MRSHPC_BIT1 , IRQ01_MASK } ,
{ MRSHPC_IRQ2 , 0 , 0 , MRSHPC_BIT2 , IRQ01_MASK } ,
{ MRSHPC_IRQ3 , 0 , 0 , MRSHPC_BIT3 , IRQ01_MASK } ,
{ SMC_IRQ , 0 , 0 , SMC_BIT , IRQ01_MASK } ,
{ EXT_IRQ , 0 , 0 , EXT_BIT , IRQ01_MASK } ,
};
int se7722_irq_demux(int irq)
{
if ((irq == IRQ0_IRQ)||(irq == IRQ1_IRQ)) {
volatile unsigned short intv =
*(volatile unsigned short *)IRQ01_STS;
if (irq == IRQ0_IRQ){
if(intv & SMC_BIT ) {
return SMC_IRQ;
} else if(intv & USB_BIT) {
return USB_IRQ;
} else {
printk("intv =%04x\n", intv);
return SMC_IRQ;
}
} else if(irq == IRQ1_IRQ){
if(intv & MRSHPC_BIT0) {
return MRSHPC_IRQ0;
} else if(intv & MRSHPC_BIT1) {
return MRSHPC_IRQ1;
} else if(intv & MRSHPC_BIT2) {
return MRSHPC_IRQ2;
} else if(intv & MRSHPC_BIT3) {
return MRSHPC_IRQ3;
} else {
printk("BIT_EXTENTION =%04x\n", intv);
return EXT_IRQ;
}
}
}
return irq;
}
/*
* Initialize IRQ setting
*/
void __init init_se7722_IRQ(void)
{
int i = 0;
ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
ctrl_outl((3 << ((7 - 0) * 4))|(3 << ((7 - 1) * 4)), INTC_INTPRI0); /* irq0 pri=3,irq1,pri=3 */
ctrl_outw((2 << ((7 - 0) * 2))|(2 << ((7 - 1) * 2)), INTC_ICR1); /* irq0,1 low-level irq */
for (i = 0; i < ARRAY_SIZE(ipr_irq_table); i++) {
disable_irq_nosync(ipr_irq_table[i].irq);
set_irq_chip_and_handler_name( ipr_irq_table[i].irq, &se7722_irq_chip,
handle_level_irq, "level");
set_irq_chip_data( ipr_irq_table[i].irq, &ipr_irq_table[i] );
disable_se7722_irq(ipr_irq_table[i].irq);
}
}

148
arch/sh/boards/se/7722/setup.c Normal file
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@ -0,0 +1,148 @@
/*
* linux/arch/sh/boards/se/7722/setup.c
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* Hitachi UL SolutionEngine 7722 Support.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pata_platform.h>
#include <asm/machvec.h>
#include <asm/se7722.h>
#include <asm/io.h>
/* Heartbeat */
static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
/* SMC91x */
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "smc91x-regs" ,
.start = PA_LAN + 0x300,
.end = PA_LAN + 0x300 + 0x10 ,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SMC_IRQ,
.end = SMC_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device smc91x_eth_device = {
.name = "smc91x",
.id = 0,
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
};
static struct resource cf_ide_resources[] = {
[0] = {
.start = PA_MRSHPC_IO + 0x1f0,
.end = PA_MRSHPC_IO + 0x1f0 + 8 ,
.flags = IORESOURCE_IO,
},
[1] = {
.start = PA_MRSHPC_IO + 0x1f0 + 0x206,
.end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8,
.flags = IORESOURCE_IO,
},
[2] = {
.start = MRSHPC_IRQ0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
};
static struct platform_device *se7722_devices[] __initdata = {
&heartbeat_device,
&smc91x_eth_device,
&cf_ide_device,
};
static int __init se7722_devices_setup(void)
{
return platform_add_devices(se7722_devices,
ARRAY_SIZE(se7722_devices));
}
device_initcall(se7722_devices_setup);
static void __init se7722_setup(char **cmdline_p)
{
ctrl_outw(0x010D, FPGA_OUT); /* FPGA */
ctrl_outl(0x00051001, MSTPCR0);
ctrl_outl(0x00000000, MSTPCR1);
/* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC */
ctrl_outl(0xffffbfC0, MSTPCR2);
ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
/* LCDC I/O */
ctrl_outw(0x0020, PORT_PSELD);
/* SIOF1*/
ctrl_outw(0x0003, PORT_PSELB);
ctrl_outw(0xe000, PORT_PSELC);
ctrl_outw(0x0000, PORT_PKCR);
/* LCDC */
ctrl_outw(0x4020, PORT_PHCR);
ctrl_outw(0x0000, PORT_PLCR);
ctrl_outw(0x0000, PORT_PMCR);
ctrl_outw(0x0002, PORT_PRCR);
ctrl_outw(0x0000, PORT_PXCR); /* LCDC,CS6A */
/* KEYSC */
ctrl_outw(0x0A10, PORT_PSELA); /* BS,SHHID2 */
ctrl_outw(0x0000, PORT_PYCR);
ctrl_outw(0x0000, PORT_PZCR);
}
/*
* The Machine Vector
*/
struct sh_machine_vector mv_se7722 __initmv = {
.mv_name = "Solution Engine 7722" ,
.mv_setup = se7722_setup ,
.mv_nr_irqs = 109 ,
.mv_init_irq = init_se7722_IRQ,
.mv_irq_demux = se7722_irq_demux,
};
ALIAS_MV(se7722)

148
arch/sh/boards/se/7751/setup.c
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@ -14,153 +14,6 @@
#include <asm/se7751.h>
#include <asm/io.h>
void init_7751se_IRQ(void);
#ifdef CONFIG_SH_KGDB
#include <asm/kgdb.h>
static int kgdb_uart_setup(void);
static struct kgdb_sermap kgdb_uart_sermap =
{ "ttyS", 0, kgdb_uart_setup, NULL };
#endif
/*
* Initialize the board
*/
static void __init sh7751se_setup(char **cmdline_p)
{
/* Call init_smsc() replacement to set up SuperIO. */
/* XXX: RTC setting comes here */
#ifdef CONFIG_SH_KGDB
kgdb_register_sermap(&kgdb_uart_sermap);
#endif
}
/*********************************************************************
* Currently a hack (e.g. does not interact well w/serial.c, lots of *
* hardcoded stuff) but may be useful if SCI/F needs debugging. *
* Mostly copied from x86 code (see files asm-i386/kgdb_local.h and *
* arch/i386/lib/kgdb_serial.c). *
*********************************************************************/
#ifdef CONFIG_SH_KGDB
#include <linux/types.h>
#include <linux/serial.h>
#include <linux/serialP.h>
#include <linux/serial_reg.h>
#define COM1_PORT 0x3f8 /* Base I/O address */
#define COM1_IRQ 4 /* IRQ not used yet */
#define COM2_PORT 0x2f8 /* Base I/O address */
#define COM2_IRQ 3 /* IRQ not used yet */
#define SB_CLOCK 1843200 /* Serial baud clock */
#define SB_BASE (SB_CLOCK/16)
#define SB_MCR UART_MCR_OUT2 | UART_MCR_DTR | UART_MCR_RTS
struct uart_port {
int base;
};
#define UART_NPORTS 2
struct uart_port uart_ports[] = {
{ COM1_PORT },
{ COM2_PORT },
};
struct uart_port *kgdb_uart_port;
#define UART_IN(reg) inb_p(kgdb_uart_port->base + reg)
#define UART_OUT(reg,v) outb_p((v), kgdb_uart_port->base + reg)
/* Basic read/write functions for the UART */
#define UART_LSR_RXCERR (UART_LSR_BI | UART_LSR_FE | UART_LSR_PE)
static int kgdb_uart_getchar(void)
{
int lsr;
int c = -1;
while (c == -1) {
lsr = UART_IN(UART_LSR);
if (lsr & UART_LSR_DR)
c = UART_IN(UART_RX);
if ((lsr & UART_LSR_RXCERR))
c = -1;
}
return c;
}
static void kgdb_uart_putchar(int c)
{
while ((UART_IN(UART_LSR) & UART_LSR_THRE) == 0)
;
UART_OUT(UART_TX, c);
}
/*
* Initialize UART to configured/requested values.
* (But we don't interrupts yet, or interact w/serial.c)
*/
static int kgdb_uart_setup(void)
{
int port;
int lcr = 0;
int bdiv = 0;
if (kgdb_portnum >= UART_NPORTS) {
KGDB_PRINTK("uart port %d invalid.\n", kgdb_portnum);
return -1;
}
kgdb_uart_port = &uart_ports[kgdb_portnum];
/* Init sequence from gdb_hook_interrupt */
UART_IN(UART_RX);
UART_OUT(UART_IER, 0);
UART_IN(UART_RX); /* Serial driver comments say */
UART_IN(UART_IIR); /* this clears interrupt regs */
UART_IN(UART_MSR);
/* Figure basic LCR values */
switch (kgdb_bits) {
case '7':
lcr |= UART_LCR_WLEN7;
break;
default: case '8':
lcr |= UART_LCR_WLEN8;
break;
}
switch (kgdb_parity) {
case 'O':
lcr |= UART_LCR_PARITY;
break;
case 'E':
lcr |= (UART_LCR_PARITY | UART_LCR_EPAR);
break;
default: break;
}
/* Figure the baud rate divisor */
bdiv = (SB_BASE/kgdb_baud);
/* Set the baud rate and LCR values */
UART_OUT(UART_LCR, (lcr | UART_LCR_DLAB));
UART_OUT(UART_DLL, (bdiv & 0xff));
UART_OUT(UART_DLM, ((bdiv >> 8) & 0xff));
UART_OUT(UART_LCR, lcr);
/* Set the MCR */
UART_OUT(UART_MCR, SB_MCR);
/* Turn off FIFOs for now */
UART_OUT(UART_FCR, 0);
/* Setup complete: initialize function pointers */
kgdb_getchar = kgdb_uart_getchar;
kgdb_putchar = kgdb_uart_putchar;
return 0;
}
#endif /* CONFIG_SH_KGDB */
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct resource heartbeat_resources[] = {
@ -197,7 +50,6 @@ __initcall(se7751_devices_setup);
*/
struct sh_machine_vector mv_7751se __initmv = {
.mv_name = "7751 SolutionEngine",
.mv_setup = sh7751se_setup,
.mv_nr_irqs = 72,
.mv_inb = sh7751se_inb,

10
arch/sh/boards/se/7780/Makefile Normal file
View File

@ -0,0 +1,10 @@
#
# Makefile for the HITACHI UL SolutionEngine 7780 specific parts of the kernel
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
#
obj-y := setup.o irq.o

89
arch/sh/boards/se/7780/irq.c Normal file
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@ -0,0 +1,89 @@
/*
* linux/arch/sh/boards/se/7780/irq.c
*
* Copyright (C) 2006,2007 Nobuhiro Iwamatsu
*
* Hitachi UL SolutionEngine 7780 Support.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/se7780.h>
#define INTC_INTMSK0 0xFFD00044
#define INTC_INTMSKCLR0 0xFFD00064
static void disable_se7780_irq(unsigned int irq)
{
struct intc2_data *p = get_irq_chip_data(irq);
ctrl_outl(1 << p->msk_shift, INTC_INTMSK0 + p->msk_offset);
}
static void enable_se7780_irq(unsigned int irq)
{
struct intc2_data *p = get_irq_chip_data(irq);
ctrl_outl(1 << p->msk_shift, INTC_INTMSKCLR0 + p->msk_offset);
}
static struct irq_chip se7780_irq_chip __read_mostly = {
.name = "SE7780",
.mask = disable_se7780_irq,
.unmask = enable_se7780_irq,
.mask_ack = disable_se7780_irq,
};
static struct intc2_data intc2_irq_table[] = {
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
{ 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
{ 6, 0, 29, 0, 29, 3 }, /* daughter board EXTINT3 */
{ 8, 0, 28, 0, 28, 3 }, /* SMC 91C111 (LAN) */
{ 10, 0, 27, 0, 27, 3 }, /* daughter board EXTINT4 */
{ 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT5 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT6 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT7 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT8 */
{ 0 , 0, 24, 0, 24, 3 }, /* SM501 */
};
/*
* Initialize IRQ setting
*/
void __init init_se7780_IRQ(void)
{
int i ;
/* enable all interrupt at FPGA */
ctrl_outw(0, FPGA_INTMSK1);
/* mask SM501 interrupt */
ctrl_outw((ctrl_inw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1);
/* enable all interrupt at FPGA */
ctrl_outw(0, FPGA_INTMSK2);
/* set FPGA INTSEL register */
/* FPGA + 0x06 */
ctrl_outw( ((IRQPIN_SM501 << IRQPOS_SM501) |
(IRQPIN_SMC91CX << IRQPOS_SMC91CX)), FPGA_INTSEL1);
/* FPGA + 0x08 */
ctrl_outw(((IRQPIN_EXTINT4 << IRQPOS_EXTINT4) |
(IRQPIN_EXTINT3 << IRQPOS_EXTINT3) |
(IRQPIN_EXTINT2 << IRQPOS_EXTINT2) |
(IRQPIN_EXTINT1 << IRQPOS_EXTINT1)), FPGA_INTSEL2);
/* FPGA + 0x0A */
ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
for (i = 0; i < ARRAY_SIZE(intc2_irq_table); i++) {
disable_irq_nosync(intc2_irq_table[i].irq);
set_irq_chip_and_handler_name( intc2_irq_table[i].irq, &se7780_irq_chip,
handle_level_irq, "level");
set_irq_chip_data( intc2_irq_table[i].irq, &intc2_irq_table[i] );
disable_se7780_irq(intc2_irq_table[i].irq);
}
}

122
arch/sh/boards/se/7780/setup.c Normal file
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@ -0,0 +1,122 @@
/*
* linux/arch/sh/boards/se/7780/setup.c
*
* Copyright (C) 2006,2007 Nobuhiro Iwamatsu
*
* Hitachi UL SolutionEngine 7780 Support.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/se7780.h>
#include <asm/io.h>
/* Heartbeat */
static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
/* SMC91x */
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "smc91x-regs" ,
.start = PA_LAN + 0x300,
.end = PA_LAN + 0x300 + 0x10 ,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = SMC_IRQ,
.end = SMC_IRQ,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device smc91x_eth_device = {
.name = "smc91x",
.id = 0,
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
};
static struct platform_device *se7780_devices[] __initdata = {
&heartbeat_device,
&smc91x_eth_device,
};
static int __init se7780_devices_setup(void)
{
return platform_add_devices(se7780_devices,
ARRAY_SIZE(se7780_devices));
}
device_initcall(se7780_devices_setup);
#define GPIO_PHCR 0xFFEA000E
#define GPIO_PMSELR 0xFFEA0080
#define GPIO_PECR 0xFFEA0008
static void __init se7780_setup(char **cmdline_p)
{
/* "SH-Linux" on LED Display */
ctrl_outw( 'S' , PA_LED_DISP + (DISP_SEL0_ADDR << 1) );
ctrl_outw( 'H' , PA_LED_DISP + (DISP_SEL1_ADDR << 1) );
ctrl_outw( '-' , PA_LED_DISP + (DISP_SEL2_ADDR << 1) );
ctrl_outw( 'L' , PA_LED_DISP + (DISP_SEL3_ADDR << 1) );
ctrl_outw( 'i' , PA_LED_DISP + (DISP_SEL4_ADDR << 1) );
ctrl_outw( 'n' , PA_LED_DISP + (DISP_SEL5_ADDR << 1) );
ctrl_outw( 'u' , PA_LED_DISP + (DISP_SEL6_ADDR << 1) );
ctrl_outw( 'x' , PA_LED_DISP + (DISP_SEL7_ADDR << 1) );
printk(KERN_INFO "Hitachi UL Solutions Engine 7780SE03 support.\n");
/*
* PCI REQ/GNT setting
* REQ0/GNT0 -> USB
* REQ1/GNT1 -> PC Card
* REQ2/GNT2 -> Serial ATA
* REQ3/GNT3 -> PCI slot
*/
ctrl_outw(0x0213, FPGA_REQSEL);
/* GPIO setting */
ctrl_outw(0x0000, GPIO_PECR);
ctrl_outw(ctrl_inw(GPIO_PHCR)&0xfff3, GPIO_PHCR);
ctrl_outw(0x0c00, GPIO_PMSELR);
/* iVDR Power ON */
ctrl_outw(0x0001, FPGA_IVDRPW);
}
/*
* The Machine Vector
*/
struct sh_machine_vector mv_se7780 __initmv = {
.mv_name = "Solution Engine 7780" ,
.mv_setup = se7780_setup ,
.mv_nr_irqs = 111 ,
.mv_init_irq = init_se7780_IRQ,
};
ALIAS_MV(se7780)

1271
arch/sh/configs/lboxre2_defconfig Normal file
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File diff suppressed because it is too large Load Diff

108
arch/sh/configs/r7780rp_defconfig
View File

@ -1,10 +1,11 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.19
# Wed Dec 6 11:59:38 2006
# Linux kernel version: 2.6.21-rc7
# Tue May 1 12:28:39 2007
#
CONFIG_SUPERH=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
@ -13,6 +14,8 @@ CONFIG_GENERIC_CALIBRATE_DELAY=y
# CONFIG_GENERIC_TIME is not set
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
@ -31,6 +34,7 @@ CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
@ -41,7 +45,7 @@ CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
@ -99,23 +103,23 @@ CONFIG_DEFAULT_IOSCHED="noop"
# System type
#
# CONFIG_SH_SOLUTION_ENGINE is not set
# CONFIG_SH_7722_SOLUTION_ENGINE is not set
# CONFIG_SH_7751_SOLUTION_ENGINE is not set
# CONFIG_SH_7780_SOLUTION_ENGINE is not set
# CONFIG_SH_7300_SOLUTION_ENGINE is not set
# CONFIG_SH_7343_SOLUTION_ENGINE is not set
# CONFIG_SH_73180_SOLUTION_ENGINE is not set
# CONFIG_SH_7751_SYSTEMH is not set
# CONFIG_SH_HP6XX is not set
# CONFIG_SH_EC3104 is not set
# CONFIG_SH_SATURN is not set
# CONFIG_SH_DREAMCAST is not set
# CONFIG_SH_BIGSUR is not set
# CONFIG_SH_MPC1211 is not set
# CONFIG_SH_SH03 is not set
# CONFIG_SH_SECUREEDGE5410 is not set
# CONFIG_SH_HS7751RVOIP is not set
# CONFIG_SH_7710VOIPGW is not set
# CONFIG_SH_RTS7751R2D is not set
CONFIG_SH_R7780RP=y
CONFIG_SH_HIGHLANDER=y
# CONFIG_SH_EDOSK7705 is not set
# CONFIG_SH_SH4202_MICRODEV is not set
# CONFIG_SH_LANDISK is not set
@ -123,7 +127,11 @@ CONFIG_SH_R7780RP=y
# CONFIG_SH_SHMIN is not set
# CONFIG_SH_7206_SOLUTION_ENGINE is not set
# CONFIG_SH_7619_SOLUTION_ENGINE is not set
# CONFIG_SH_LBOX_RE2 is not set
# CONFIG_SH_UNKNOWN is not set
CONFIG_SH_R7780RP=y
# CONFIG_SH_R7780MP is not set
# CONFIG_SH_R7785RP is not set
#
# Processor selection
@ -152,6 +160,7 @@ CONFIG_CPU_SH4A=y
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
#
# SH-4 Processor Support
@ -183,6 +192,7 @@ CONFIG_CPU_SUBTYPE_SH7780=y
#
# CONFIG_CPU_SUBTYPE_SH73180 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
#
# Memory management options
@ -193,6 +203,8 @@ CONFIG_MEMORY_START=0x08000000
CONFIG_MEMORY_SIZE=0x08000000
# CONFIG_32BIT is not set
CONFIG_VSYSCALL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
@ -210,6 +222,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
#
# Cache configuration
@ -226,20 +239,15 @@ CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_SH_FPU=y
# CONFIG_SH_DSP is not set
CONFIG_SH_STORE_QUEUES=y
CONFIG_SPECULATIVE_EXECUTION=y
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_INTC2_IRQ=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_PTEA=y
#
# Timer support
# Timer and clock configuration
#
CONFIG_SH_TMU=y
#
# R7780RP options
#
CONFIG_SH_R7780MP=y
CONFIG_SH_TIMER_IRQ=28
CONFIG_NO_IDLE_HZ=y
CONFIG_SH_PCLK_FREQ=32000000
@ -262,6 +270,7 @@ CONFIG_SH_PCLK_FREQ=32000000
#
# Additional SuperH Device Drivers
#
# CONFIG_HEARTBEAT is not set
CONFIG_PUSH_SWITCH=y
#
@ -269,9 +278,11 @@ CONFIG_PUSH_SWITCH=y
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_KEXEC=y
# CONFIG_CRASH_DUMP is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
@ -294,7 +305,6 @@ CONFIG_PCI=y
CONFIG_SH_PCIDMA_NONCOHERENT=y
CONFIG_PCI_AUTO=y
CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
# CONFIG_PCI_MULTITHREAD_PROBE is not set
# CONFIG_PCI_DEBUG is not set
#
@ -334,6 +344,7 @@ CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
@ -425,6 +436,7 @@ CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=m
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
#
@ -445,6 +457,7 @@ CONFIG_FW_LOADER=m
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
@ -461,7 +474,6 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
@ -481,6 +493,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
#
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
@ -500,6 +513,7 @@ CONFIG_CHR_DEV_SG=m
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
@ -544,11 +558,13 @@ CONFIG_CHR_DEV_SG=m
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_NSP32 is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_SRP is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
# CONFIG_SATA_AHCI is not set
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
@ -564,6 +580,7 @@ CONFIG_SATA_SIL=y
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
# CONFIG_SATA_VITESSE is not set
# CONFIG_SATA_INIC162X is not set
# CONFIG_PATA_ALI is not set
# CONFIG_PATA_AMD is not set
# CONFIG_PATA_ARTOP is not set
@ -579,6 +596,7 @@ CONFIG_SATA_SIL=y
# CONFIG_PATA_HPT3X2N is not set
# CONFIG_PATA_HPT3X3 is not set
# CONFIG_PATA_IT821X is not set
# CONFIG_PATA_IT8213 is not set
# CONFIG_PATA_JMICRON is not set
# CONFIG_PATA_TRIFLEX is not set
# CONFIG_PATA_MARVELL is not set
@ -685,6 +703,7 @@ CONFIG_8139TOO_8129=y
CONFIG_VIA_RHINE=m
CONFIG_VIA_RHINE_MMIO=y
# CONFIG_VIA_RHINE_NAPI is not set
# CONFIG_SC92031 is not set
#
# Ethernet (1000 Mbit)
@ -707,11 +726,13 @@ CONFIG_R8169=y
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
# CONFIG_QLA3XXX is not set
# CONFIG_ATL1 is not set
#
# Ethernet (10000 Mbit)
#
# CONFIG_CHELSIO_T1 is not set
# CONFIG_CHELSIO_T3 is not set
# CONFIG_IXGB is not set
# CONFIG_S2IO is not set
# CONFIG_MYRI10GE is not set
@ -889,9 +910,15 @@ CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
@ -905,9 +932,8 @@ CONFIG_HWMON=y
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_FB is not set
#
# Sound
@ -923,15 +949,20 @@ CONFIG_SOUND=m
# Open Sound System
#
CONFIG_SOUND_PRIME=m
# CONFIG_OSS_OBSOLETE_DRIVER is not set
# CONFIG_OBSOLETE_OSS is not set
# CONFIG_SOUND_BT878 is not set
# CONFIG_SOUND_ES1371 is not set
# CONFIG_SOUND_ICH is not set
# CONFIG_SOUND_TRIDENT is not set
# CONFIG_SOUND_MSNDCLAS is not set
# CONFIG_SOUND_MSNDPIN is not set
# CONFIG_SOUND_VIA82CXXX is not set
#
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
#
@ -1016,6 +1047,14 @@ CONFIG_RTC_DRV_SH=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
#
# File systems
#
@ -1174,6 +1213,11 @@ CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# Profiling support
#
@ -1184,19 +1228,22 @@ CONFIG_OPROFILE=m
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_PRINTK_TIME=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_MAGIC_SYSRQ=y
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
CONFIG_LOG_BUF_SHIFT=14
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_MUTEXES is not set
# CONFIG_DEBUG_RWSEMS is not set
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
@ -1204,19 +1251,19 @@ CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_FS=y
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_LIST is not set
CONFIG_FRAME_POINTER=y
# CONFIG_FRAME_POINTER is not set
CONFIG_FORCED_INLINING=y
# CONFIG_HEADERS_CHECK is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_SH_STANDARD_BIOS=y
# CONFIG_EARLY_SCIF_CONSOLE is not set
CONFIG_EARLY_PRINTK=y
CONFIG_DEBUG_STACKOVERFLOW=y
# CONFIG_DEBUG_STACK_USAGE is not set
# CONFIG_4KSTACKS is not set
# CONFIG_KGDB is not set
# CONFIG_SH_KGDB is not set
#
# Security options
@ -1233,6 +1280,7 @@ CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
@ -1241,9 +1289,13 @@ CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_GF128MUL is not set
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_SERPENT is not set
@ -1257,6 +1309,7 @@ CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_TEST is not set
#
@ -1266,7 +1319,10 @@ CONFIG_CRYPTO_DES=y
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y

1334
arch/sh/configs/r7785rp_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

106
arch/sh/configs/se7705_defconfig
View File

@ -1,15 +1,21 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.18
# Tue Oct 3 12:03:04 2006
# Linux kernel version: 2.6.21-rc5
# Thu Apr 26 09:16:31 2007
#
CONFIG_SUPERH=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
# CONFIG_GENERIC_TIME is not set
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
@ -33,7 +39,9 @@ CONFIG_LOCALVERSION_AUTO=y
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_SYSCTL=y
@ -91,27 +99,30 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_SOLUTION_ENGINE=y
CONFIG_SH_SOLUTION_ENGINE=y
# CONFIG_SH_7751_SOLUTION_ENGINE is not set
# CONFIG_SH_7780_SOLUTION_ENGINE is not set
# CONFIG_SH_7300_SOLUTION_ENGINE is not set
# CONFIG_SH_7343_SOLUTION_ENGINE is not set
# CONFIG_SH_73180_SOLUTION_ENGINE is not set
# CONFIG_SH_7722_SOLUTION_ENGINE is not set
# CONFIG_SH_7751_SYSTEMH is not set
# CONFIG_SH_HP6XX is not set
# CONFIG_SH_EC3104 is not set
# CONFIG_SH_SATURN is not set
# CONFIG_SH_DREAMCAST is not set
# CONFIG_SH_BIGSUR is not set
# CONFIG_SH_MPC1211 is not set
# CONFIG_SH_SH03 is not set
# CONFIG_SH_SECUREEDGE5410 is not set
# CONFIG_SH_HS7751RVOIP is not set
# CONFIG_SH_7710VOIPGW is not set
# CONFIG_SH_RTS7751R2D is not set
# CONFIG_SH_R7780RP is not set
# CONFIG_SH_HIGHLANDER is not set
# CONFIG_SH_EDOSK7705 is not set
# CONFIG_SH_SH4202_MICRODEV is not set
# CONFIG_SH_LANDISK is not set
# CONFIG_SH_TITAN is not set
# CONFIG_SH_SHMIN is not set
# CONFIG_SH_7206_SOLUTION_ENGINE is not set
# CONFIG_SH_7619_SOLUTION_ENGINE is not set
# CONFIG_SH_LBOX_RE2 is not set
# CONFIG_SH_UNKNOWN is not set
#
@ -123,6 +134,12 @@ CONFIG_CPU_SH3=y
# SH-2 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7604 is not set
# CONFIG_CPU_SUBTYPE_SH7619 is not set
#
# SH-2A Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7206 is not set
#
# SH-3 Processor Support
@ -134,6 +151,7 @@ CONFIG_CPU_SUBTYPE_SH7705=y
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
#
# SH-4 Processor Support
@ -158,12 +176,14 @@ CONFIG_CPU_SUBTYPE_SH7705=y
#
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
#
# SH4AL-DSP Processor Support
#
# CONFIG_CPU_SUBTYPE_SH73180 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
#
# Memory management options
@ -173,6 +193,11 @@ CONFIG_PAGE_OFFSET=0x80000000
CONFIG_MEMORY_START=0x0c000000
CONFIG_MEMORY_SIZE=0x02000000
CONFIG_VSYSCALL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
@ -182,6 +207,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
#
# Cache configuration
@ -190,23 +216,31 @@ CONFIG_SH7705_CACHE_32KB=y
# CONFIG_SH_DIRECT_MAPPED is not set
# CONFIG_SH_WRITETHROUGH is not set
# CONFIG_SH_OCRAM is not set
# CONFIG_CF_ENABLER is not set
CONFIG_CF_ENABLER=y
# CONFIG_CF_AREA5 is not set
CONFIG_CF_AREA6=y
# CONFIG_CF_AREA4 is not set
CONFIG_CF_BASE_ADDR=0xb8000000
#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_SH_FPU_EMU is not set
# CONFIG_SH_DSP is not set
# CONFIG_SH_ADC is not set
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_PINT_IRQ=y
CONFIG_CPU_HAS_IPR_IRQ=y
CONFIG_CPU_HAS_SR_RB=y
#
# Timer support
# Timer and clock configuration
#
CONFIG_SH_TMU=y
CONFIG_SH_TIMER_IRQ=16
# CONFIG_NO_IDLE_HZ is not set
CONFIG_SH_PCLK_FREQ=33333333
#
@ -223,13 +257,19 @@ CONFIG_SH_PCLK_FREQ=33333333
# Companion Chips
#
# CONFIG_HD6446X_SERIES is not set
#
# Additional SuperH Device Drivers
#
CONFIG_HEARTBEAT=y
# CONFIG_PUSH_SWITCH is not set
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_KEXEC is not set
@ -287,6 +327,7 @@ CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
@ -307,11 +348,13 @@ CONFIG_IP_PNP_RARP=y
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
@ -388,6 +431,7 @@ CONFIG_MTD_PARTITIONS=y
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
@ -461,6 +505,7 @@ CONFIG_MTD_CFI_UTIL=y
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
@ -472,10 +517,13 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
#
# ATA/ATAPI/MFM/RLL support
#
@ -649,17 +697,12 @@ CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set
#
# I2C support
@ -675,6 +718,7 @@ CONFIG_HW_RANDOM=y
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
@ -683,18 +727,19 @@ CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Misc devices
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
CONFIG_VIDEO_V4L2=y
#
# Digital Video Broadcasting Devices
@ -704,7 +749,7 @@ CONFIG_VIDEO_V4L2=y
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_FB is not set
#
@ -712,6 +757,12 @@ CONFIG_FIRMWARE_EDID=y
#
# CONFIG_SOUND is not set
#
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
#
@ -772,6 +823,14 @@ CONFIG_FIRMWARE_EDID=y
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
#
# File systems
#
@ -779,10 +838,12 @@ CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
@ -828,7 +889,6 @@ CONFIG_RAMFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
@ -877,6 +937,10 @@ CONFIG_MSDOS_PARTITION=y
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
#
# Profiling support
#
@ -885,15 +949,18 @@ CONFIG_MSDOS_PARTITION=y
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_KGDB is not set
# CONFIG_EARLY_SCIF_CONSOLE is not set
# CONFIG_SH_KGDB is not set
#
# Security options
@ -908,6 +975,7 @@ CONFIG_LOG_BUF_SHIFT=14
#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_CRC_CCITT=y
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
@ -915,3 +983,5 @@ CONFIG_CRC32=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y

1088
arch/sh/configs/se7712_defconfig Normal file
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File diff suppressed because it is too large Load Diff

980
arch/sh/configs/se7722_defconfig Normal file
View File

@ -0,0 +1,980 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.21-rc7
# Fri Apr 27 16:30:30 2007
#
CONFIG_SUPERH=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
# CONFIG_GENERIC_TIME is not set
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
# CONFIG_SYSFS_DEPRECATED is not set
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
CONFIG_DEFAULT_NOOP=y
CONFIG_DEFAULT_IOSCHED="noop"
#
# System type
#
CONFIG_SOLUTION_ENGINE=y
# CONFIG_SH_SOLUTION_ENGINE is not set
CONFIG_SH_7722_SOLUTION_ENGINE=y
# CONFIG_SH_7751_SOLUTION_ENGINE is not set
# CONFIG_SH_7780_SOLUTION_ENGINE is not set
# CONFIG_SH_7300_SOLUTION_ENGINE is not set
# CONFIG_SH_7343_SOLUTION_ENGINE is not set
# CONFIG_SH_73180_SOLUTION_ENGINE is not set
# CONFIG_SH_7751_SYSTEMH is not set
# CONFIG_SH_HP6XX is not set
# CONFIG_SH_SATURN is not set
# CONFIG_SH_DREAMCAST is not set
# CONFIG_SH_MPC1211 is not set
# CONFIG_SH_SH03 is not set
# CONFIG_SH_SECUREEDGE5410 is not set
# CONFIG_SH_HS7751RVOIP is not set
# CONFIG_SH_7710VOIPGW is not set
# CONFIG_SH_RTS7751R2D is not set
# CONFIG_SH_HIGHLANDER is not set
# CONFIG_SH_EDOSK7705 is not set
# CONFIG_SH_SH4202_MICRODEV is not set
# CONFIG_SH_LANDISK is not set
# CONFIG_SH_TITAN is not set
# CONFIG_SH_SHMIN is not set
# CONFIG_SH_7206_SOLUTION_ENGINE is not set
# CONFIG_SH_7619_SOLUTION_ENGINE is not set
# CONFIG_SH_LBOX_RE2 is not set
# CONFIG_SH_UNKNOWN is not set
#
# Processor selection
#
CONFIG_CPU_SH4=y
CONFIG_CPU_SH4A=y
CONFIG_CPU_SH4AL_DSP=y
CONFIG_CPU_SHX2=y
#
# SH-2 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7604 is not set
# CONFIG_CPU_SUBTYPE_SH7619 is not set
#
# SH-2A Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7206 is not set
#
# SH-3 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7300 is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
#
# SH-4 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7750 is not set
# CONFIG_CPU_SUBTYPE_SH7091 is not set
# CONFIG_CPU_SUBTYPE_SH7750R is not set
# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
# CONFIG_CPU_SUBTYPE_SH7751R is not set
# CONFIG_CPU_SUBTYPE_SH7760 is not set
# CONFIG_CPU_SUBTYPE_SH4_202 is not set
#
# ST40 Processor Support
#
# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
#
# SH-4A Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
#
# SH4AL-DSP Processor Support
#
# CONFIG_CPU_SUBTYPE_SH73180 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
CONFIG_CPU_SUBTYPE_SH7722=y
#
# Memory management options
#
CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_MEMORY_START=0x0c000000
CONFIG_MEMORY_SIZE=0x04000000
# CONFIG_32BIT is not set
# CONFIG_X2TLB is not set
CONFIG_VSYSCALL=y
CONFIG_ARCH_FLATMEM_ENABLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PAGE_SIZE_64KB is not set
CONFIG_HUGETLB_PAGE_SIZE_64K=y
# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
#
# Cache configuration
#
# CONFIG_SH_DIRECT_MAPPED is not set
# CONFIG_SH_WRITETHROUGH is not set
# CONFIG_SH_OCRAM is not set
CONFIG_CF_ENABLER=y
# CONFIG_CF_AREA5 is not set
CONFIG_CF_AREA6=y
CONFIG_CF_BASE_ADDR=0xb8000000
#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_SH_FPU is not set
# CONFIG_SH_FPU_EMU is not set
CONFIG_SH_DSP=y
CONFIG_SH_STORE_QUEUES=y
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_IPR_IRQ=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_PTEA=y
#
# Timer and clock configuration
#
CONFIG_SH_TMU=y
CONFIG_SH_TIMER_IRQ=16
CONFIG_NO_IDLE_HZ=y
CONFIG_SH_PCLK_FREQ=33333333
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
#
# DMA support
#
# CONFIG_SH_DMA is not set
#
# Companion Chips
#
# CONFIG_HD6446X_SERIES is not set
#
# Additional SuperH Device Drivers
#
CONFIG_HEARTBEAT=y
# CONFIG_PUSH_SWITCH is not set
#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
CONFIG_KEXEC=y
# CONFIG_CRASH_DUMP is not set
# CONFIG_SMP is not set
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_PREEMPT_BKL=y
#
# Boot options
#
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
# CONFIG_UBC_WAKEUP is not set
# CONFIG_CMDLINE_BOOL is not set
#
# Bus options
#
# CONFIG_PCI is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PCI Hotplug Support
#
#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_FLAT is not set
# CONFIG_BINFMT_MISC is not set
#
# Power management options (EXPERIMENTAL)
#
# CONFIG_PM is not set
#
# Networking
#
CONFIG_NET=y
#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
CONFIG_INET_XFRM_MODE_BEET=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
#
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
#
# SCSI low-level drivers
#
# CONFIG_ISCSI_TCP is not set
# CONFIG_SCSI_DEBUG is not set
#
# Serial ATA (prod) and Parallel ATA (experimental) drivers
#
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
CONFIG_PATA_PLATFORM=y
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
#
# PHY device support
#
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_STNIC is not set
CONFIG_SMC91X=y
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
#
# Userland interfaces
#
CONFIG_INPUT_MOUSEDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set
#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_SERPORT is not set
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=2
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
CONFIG_HW_RANDOM=y
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Hardware Monitoring support
#
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_ABITUGURU is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_PC87427 is not set
# CONFIG_SENSORS_VT1211 is not set
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# HID Devices
#
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
#
# Real Time Clock
#
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set
#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
#
# RTC drivers
#
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_M48T86 is not set
CONFIG_RTC_DRV_SH=y
# CONFIG_RTC_DRV_TEST is not set
# CONFIG_RTC_DRV_V3020 is not set
#
# DMA Engine support
#
# CONFIG_DMA_ENGINE is not set
#
# DMA Clients
#
#
# DMA Devices
#
#
# Auxiliary Display support
#
#
# Virtualization
#
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
CONFIG_EXT3_FS_XATTR=y
# CONFIG_EXT3_FS_POSIX_ACL is not set
# CONFIG_EXT3_FS_SECURITY is not set
# CONFIG_EXT4DEV_FS is not set
CONFIG_JBD=y
# CONFIG_JBD_DEBUG is not set
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_PROC_SYSCTL=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
# CONFIG_NLS is not set
#
# Distributed Lock Manager
#
# CONFIG_DLM is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
# CONFIG_PRINTK_TIME is not set
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_EARLY_SCIF_CONSOLE is not set
# CONFIG_SH_KGDB is not set
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y

1309
arch/sh/configs/se7780_defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

10
arch/sh/drivers/Kconfig
View File

@ -1,5 +1,15 @@
source "arch/sh/drivers/dma/Kconfig"
source "arch/sh/cchips/Kconfig"
menu "Additional SuperH Device Drivers"
config HEARTBEAT
bool "Heartbeat LED"
help
Use the power-on LED on your machine as a load meter. The exact
behavior is platform-dependent, but normally the flash frequency is
a hyperbolic function of the 5-minute load average.
config PUSH_SWITCH
tristate "Push switch support"
help

13
arch/sh/drivers/heartbeat.c
View File

@ -40,16 +40,9 @@ static void heartbeat_timer(unsigned long data)
static unsigned bit = 0, up = 1;
ctrl_outw(1 << hd->bit_pos[bit], (unsigned long)hd->base);
if (up)
if (bit == (ARRAY_SIZE(hd->bit_pos) - 1)) {
bit--;
up = 0;
} else
bit++;
else if (bit == 0)
up = 1;
else
bit--;
bit += up;
if ((bit == 0) || (bit == ARRAY_SIZE(hd->bit_pos)-1))
up = -up;
mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) /
((avenrun[0] / 5) + (3 << FSHIFT)))));

5
arch/sh/drivers/pci/Makefile
View File

@ -8,12 +8,15 @@ obj-$(CONFIG_PCI_AUTO) += pci-auto.o
obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) += pci-st40.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o
obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
dma-dreamcast.o
obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
obj-$(CONFIG_SH_R7780RP) += ops-r7780rp.o fixups-r7780rp.o
obj-$(CONFIG_SH_HIGHLANDER) += ops-r7780rp.o fixups-r7780rp.o
obj-$(CONFIG_SH_TITAN) += ops-titan.o
obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o
obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o

41
arch/sh/drivers/pci/fixups-lboxre2.c Normal file
View File

@ -0,0 +1,41 @@
/*
* arch/sh/drivers/pci/fixups-lboxre2.c
*
* L-BOX RE2 PCI fixups
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include "pci-sh4.h"
#define PCIMCR_MRSET_OFF 0xBFFFFFFF
#define PCIMCR_RFSH_OFF 0xFFFFFFFB
int pci_fixup_pcic(void)
{
unsigned long bcr1, mcr;
bcr1 = inl(SH7751_BCR1);
bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
pci_write_reg(bcr1, SH4_PCIBCR1);
/* Enable all interrupts, so we known what to fix */
pci_write_reg(0x0000c3ff, SH4_PCIINTM);
pci_write_reg(0x0000380f, SH4_PCIAINTM);
pci_write_reg(0xfb900047, SH7751_PCICONF1);
pci_write_reg(0xab000001, SH7751_PCICONF4);
mcr = inl(SH7751_MCR);
mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
pci_write_reg(mcr, SH4_PCIMCR);
pci_write_reg(0x0c000000, SH7751_PCICONF5);
pci_write_reg(0xd0000000, SH7751_PCICONF6);
pci_write_reg(0x0c000000, SH4_PCILAR0);
pci_write_reg(0x00000000, SH4_PCILAR1);
return 0;
}

60
arch/sh/drivers/pci/fixups-se7780.c Normal file
View File

@ -0,0 +1,60 @@
/*
* arch/sh/drivers/pci/fixups-se7780.c
*
* HITACHI UL Solution Engine 7780 PCI fixups
*
* Copyright (C) 2003 Lineo uSolutions, Inc.
* Copyright (C) 2004 - 2006 Paul Mundt
* Copyright (C) 2006 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/pci.h>
#include "pci-sh4.h"
#include <asm/io.h>
int pci_fixup_pcic(void)
{
ctrl_outl(0x00000001, SH7780_PCI_VCR2);
/* Enable all interrupts, so we know what to fix */
pci_write_reg(0x0000C3FF, SH7780_PCIIMR);
pci_write_reg(0x0000380F, SH7780_PCIAINTM);
/* Set up standard PCI config registers */
ctrl_outw(0xFB00, PCI_REG(SH7780_PCISTATUS));
ctrl_outw(0x0047, PCI_REG(SH7780_PCICMD));
ctrl_outb( 0x00, PCI_REG(SH7780_PCIPIF));
ctrl_outb( 0x00, PCI_REG(SH7780_PCISUB));
ctrl_outb( 0x06, PCI_REG(SH7780_PCIBCC));
ctrl_outw(0x1912, PCI_REG(SH7780_PCISVID));
ctrl_outw(0x0001, PCI_REG(SH7780_PCISID));
pci_write_reg(0x08000000, SH7780_PCIMBAR0); /* PCI */
pci_write_reg(0x08000000, SH7780_PCILAR0); /* SHwy */
pci_write_reg(0x07F00001, SH7780_PCILSR); /* size 128M w/ MBAR */
pci_write_reg(0x00000000, SH7780_PCIMBAR1);
pci_write_reg(0x00000000, SH7780_PCILAR1);
pci_write_reg(0x00000000, SH7780_PCILSR1);
pci_write_reg(0xAB000801, SH7780_PCIIBAR);
/*
* Set the MBR so PCI address is one-to-one with window,
* meaning all calls go straight through... use ifdef to
* catch erroneous assumption.
*/
pci_write_reg(0xFD000000 , SH7780_PCIMBR0);
pci_write_reg(0x00FC0000 , SH7780_PCIMBMR0); /* 16M */
/* Set IOBR for window containing area specified in pci.h */
pci_write_reg(PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), SH7780_PCIIOBR);
pci_write_reg((SH7780_PCI_IO_SIZE-1) & (7 << 18), SH7780_PCIIOBMR);
pci_write_reg(0xA5000C01, SH7780_PCICR);
return 0;
}

4
arch/sh/drivers/pci/ops-landisk.c
View File

@ -17,8 +17,8 @@
static struct resource sh7751_io_resource = {
.name = "SH7751 IO",
.start = 0x4000,
.end = 0x4000 + SH7751_PCI_IO_SIZE - 1,
.start = SH7751_PCI_IO_BASE,
.end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};

63
arch/sh/drivers/pci/ops-lboxre2.c Normal file
View File

@ -0,0 +1,63 @@
/*
* linux/arch/sh/drivers/pci/ops-lboxre2.c
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* PCI initialization for the NTT COMWARE L-BOX RE2
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <asm/lboxre2.h>
#include "pci-sh4.h"
static char lboxre2_irq_tab[] __initdata = {
IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD,
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
return lboxre2_irq_tab[slot];
}
static struct resource sh7751_io_resource = {
.name = "SH7751_IO",
.start = SH7751_PCI_IO_BASE ,
.end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sh7751_mem_resource = {
.name = "SH7751_mem",
.start = SH7751_PCI_MEMORY_BASE,
.end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
extern struct pci_ops sh7751_pci_ops;
struct pci_channel board_pci_channels[] = {
{ &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
EXPORT_SYMBOL(board_pci_channels);
static struct sh4_pci_address_map sh7751_pci_map = {
.window0 = {
.base = SH7751_CS3_BASE_ADDR,
.size = 0x04000000,
},
.window1 = {
.base = 0x00000000, /* Unused */
.size = 0x00000000, /* Unused */
},
.flags = SH4_PCIC_NO_RESET,
};
int __init pcibios_init_platform(void)
{
return sh7751_pcic_init(&sh7751_pci_map);
}

27
arch/sh/drivers/pci/ops-r7780rp.c
View File

@ -17,18 +17,25 @@
#include <asm/io.h>
#include "pci-sh4.h"
static char r7780rp_irq_tab[] __initdata = {
0, 1, 2, 3,
};
static char r7780mp_irq_tab[] __initdata = {
65, 66, 67, 68,
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
switch (slot) {
case 0: return IRQ_PCISLOT1; /* PCI Interrupt #1 */
case 1: return IRQ_PCISLOT2; /* PCI Interrupt #2 */
case 2: return IRQ_PCISLOT3; /* PCI Interrupt #3 */
case 3: return IRQ_PCISLOT4; /* PCI Interrupt E4 */
default:
printk(KERN_ERR "PCI: Bad IRQ mapping "
"request for slot %d, func %d\n", slot, pin-1);
return -1;
}
if (mach_is_r7780rp())
return r7780rp_irq_tab[slot];
if (mach_is_r7780mp() || mach_is_r7785rp())
return r7780mp_irq_tab[slot];
printk(KERN_ERR "PCI: Bad IRQ mapping "
"request for slot %d, func %d\n", slot, pin-1);
return -1;
}
static struct resource sh7780_io_resource = {

96
arch/sh/drivers/pci/ops-se7780.c Normal file
View File

@ -0,0 +1,96 @@
/*
* linux/arch/sh/drivers/pci/ops-se7780.c
*
* Copyright (C) 2006 Nobuhiro Iwamatsu
*
* PCI initialization for the Hitachi UL Solution Engine 7780SE03
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/se7780.h>
#include <asm/io.h>
#include "pci-sh4.h"
/*
* IDSEL = AD16 PCI slot
* IDSEL = AD17 PCI slot
* IDSEL = AD18 Serial ATA Controller (Silicon Image SiL3512A)
* IDSEL = AD19 USB Host Controller (NEC uPD7210100A)
*/
/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
static char se7780_irq_tab[4][16] __initdata = {
/* INTA */
{ 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTB */
{ 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTC */
{ 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTD */
{ 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
return se7780_irq_tab[pin-1][slot];
}
static struct resource se7780_io_resource = {
.name = "SH7780_IO",
.start = 0x2000,
.end = 0x2000 + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource se7780_mem_resource = {
.name = "SH7780_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
extern struct pci_ops se7780_pci_ops;
struct pci_channel board_pci_channels[] = {
{ &sh4_pci_ops, &se7780_io_resource, &se7780_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
EXPORT_SYMBOL(board_pci_channels);
static struct sh4_pci_address_map se7780_pci_map = {
.window0 = {
.base = SH7780_CS2_BASE_ADDR,
.size = 0x04000000,
},
.flags = SH4_PCIC_NO_RESET,
};
int __init pcibios_init_platform(void)
{
printk("SH7780 PCI: Finished initialization of the PCI controller\n");
/*
* FPGA PCISEL register initialize
*
* CPU || SLOT1 | SLOT2 | S-ATA | USB
* -------------------------------------
* INTA || INTA | INTD | -- | INTB
* -------------------------------------
* INTB || INTB | INTA | -- | INTC
* -------------------------------------
* INTC || INTC | INTB | INTA | --
* -------------------------------------
* INTD || INTD | INTC | -- | INTA
* -------------------------------------
*/
ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
return sh7780_pcic_init(&se7780_pci_map);
}

6
arch/sh/drivers/pci/ops-sh4.c
View File

@ -162,3 +162,9 @@ char * __init pcibios_setup(char *str)
return str;
}
int __attribute__((weak)) pci_fixup_pcic(void)
{
/* Nothing to do. */
return 0;
}

2
arch/sh/drivers/pci/pci-sh4.h
View File

@ -1,7 +1,7 @@
#ifndef __PCI_SH4_H
#define __PCI_SH4_H
#ifdef CONFIG_CPU_SUBTYPE_SH7780
#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
#include "pci-sh7780.h"
#else
#include "pci-sh7751.h"

15
arch/sh/drivers/pci/pci-sh7751.c
View File

@ -12,7 +12,6 @@
* License. See linux/COPYING for more information.
*
*/
#undef DEBUG
#include <linux/init.h>
@ -28,7 +27,7 @@
* Initialization. Try all known PCI access methods. Note that we support
* using both PCI BIOS and direct access: in such cases, we use I/O ports
* to access config space.
*
*
* Note that the platform specific initialization (BSC registers, and memory
* space mapping) will be called via the platform defined function
* pcibios_init_platform().
@ -115,7 +114,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
* Wait Cycle Control + Parity Enable + Bus Master +
* Mem space enable
*/
word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |
word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |
SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES;
pci_write_reg(word, SH7751_PCICONF1);
@ -123,10 +122,10 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
word = PCI_BASE_CLASS_BRIDGE << 24;
pci_write_reg(word, SH7751_PCICONF2);
/* Set IO and Mem windows to local address
* Make PCI and local address the same for easy 1 to 1 mapping
/* Set IO and Mem windows to local address
* Make PCI and local address the same for easy 1 to 1 mapping
* Window0 = map->window0.size @ non-cached area base = SDRAM
* Window1 = map->window1.size @ cached area base = SDRAM
* Window1 = map->window1.size @ cached area base = SDRAM
*/
word = map->window0.size - 1;
pci_write_reg(word, SH4_PCILSR0);
@ -175,7 +174,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(5); break;
case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(6); break;
}
if (!word)
return 0;
@ -194,9 +193,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
* DMA interrupts...
*/
#ifdef CONFIG_SH_RTS7751R2D
pci_fixup_pcic();
#endif
/* SH7751 init done, set central function init complete */
/* use round robin mode to stop a device starving/overruning */

45
arch/sh/drivers/pci/pci-sh7780.c
View File

@ -48,7 +48,7 @@
static int __init sh7780_pci_init(void)
{
unsigned int id;
int ret;
int ret, match = 0;
pr_debug("PCI: Starting intialization.\n");
@ -56,19 +56,43 @@ static int __init sh7780_pci_init(void)
/* check for SH7780/SH7780R hardware */
id = pci_read_reg(SH7780_PCIVID);
if ((id != ((SH7780_DEVICE_ID << 16) | SH7780_VENDOR_ID)) &&
(id != ((SH7781_DEVICE_ID << 16) | SH7780_VENDOR_ID))) {
if ((id & 0xffff) == SH7780_VENDOR_ID) {
switch ((id >> 16) & 0xffff) {
case SH7780_DEVICE_ID:
case SH7781_DEVICE_ID:
case SH7785_DEVICE_ID:
match = 1;
break;
}
}
if (unlikely(!match)) {
printk(KERN_ERR "PCI: This is not an SH7780 (%x)\n", id);
return -ENODEV;
}
/* Setup the INTC */
ctrl_outl(0x00200000, INTC_ICR0); /* INTC SH-4 Mode */
ctrl_outl(0x00078000, INTC_INT2MSKCR); /* enable PCIINTA - PCIINTD */
ctrl_outl(0x40000000, INTC_INTMSK1); /* disable IRL4-7 Interrupt */
ctrl_outl(0x0000fffe, INTC_INTMSK2); /* disable IRL4-7 Interrupt */
ctrl_outl(0x80000000, INTC_INTMSKCLR1); /* enable IRL0-3 Interrupt */
ctrl_outl(0xfffe0000, INTC_INTMSKCLR2); /* enable IRL0-3 Interrupt */
if (mach_is_7780se()) {
/* ICR0: IRL=use separately */
ctrl_outl(0x00C00020, INTC_ICR0);
/* ICR1: detect low level(for 2ndcut) */
ctrl_outl(0xAAAA0000, INTC_ICR1);
/* INTPRI: priority=3(all) */
ctrl_outl(0x33333333, INTC_INTPRI);
} else {
/* INTC SH-4 Mode */
ctrl_outl(0x00200000, INTC_ICR0);
/* enable PCIINTA - PCIINTD */
ctrl_outl(0x00078000, INTC_INT2MSKCR);
/* disable IRL4-7 Interrupt */
ctrl_outl(0x40000000, INTC_INTMSK1);
/* disable IRL4-7 Interrupt */
ctrl_outl(0x0000fffe, INTC_INTMSK2);
/* enable IRL0-3 Interrupt */
ctrl_outl(0x80000000, INTC_INTMSKCLR1);
/* enable IRL0-3 Interrupt */
ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
}
if ((ret = sh4_pci_check_direct()) != 0)
return ret;
@ -138,9 +162,8 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
* DMA interrupts...
*/
#ifdef CONFIG_SH_R7780RP
/* Apply any last-minute PCIC fixups */
pci_fixup_pcic();
#endif
/* SH7780 init done, set central function init complete */
/* use round robin mode to stop a device starving/overruning */

19
arch/sh/drivers/pci/pci-sh7780.h
View File

@ -14,8 +14,9 @@
/* Platform Specific Values */
#define SH7780_VENDOR_ID 0x1912
#define SH7780_DEVICE_ID 0x0002
#define SH7781_DEVICE_ID 0x0001
#define SH7780_DEVICE_ID 0x0002
#define SH7785_DEVICE_ID 0x0007
/* SH7780 Control Registers */
#define SH7780_PCI_VCR0 0xFE000000
@ -65,6 +66,22 @@
#define SH7780_PCIPMCSR_BSE 0x046
#define SH7780_PCICDD 0x047
#define SH7780_PCICR 0x100 /* PCI Control Register */
#define SH7780_PCILSR 0x104 /* PCI Local Space Register0 */
#define SH7780_PCILSR1 0x108 /* PCI Local Space Register1 */
#define SH7780_PCILAR0 0x10C /* PCI Local Address Register1 */
#define SH7780_PCILAR1 0x110 /* PCI Local Address Register1 */
#define SH7780_PCIIR 0x114 /* PCI Interrupt Register */
#define SH7780_PCIIMR 0x118 /* PCI Interrupt Mask Register */
#define SH7780_PCIAIR 0x11C /* Error Address Register */
#define SH7780_PCICIR 0x120 /* Error Command/Data Register */
#define SH7780_PCIAINT 0x130 /* Arbiter Interrupt Register */
#define SH7780_PCIAINTM 0x134 /* Arbiter Int. Mask Register */
#define SH7780_PCIBMIR 0x138 /* Error Bus Master Register */
#define SH7780_PCIPAR 0x1C0 /* PIO Address Register */
#define SH7780_PCIPINT 0x1CC /* Power Mgmnt Int. Register */
#define SH7780_PCIPINTM 0x1D0 /* Power Mgmnt Mask Register */
#define SH7780_PCIMBR0 0x1E0
#define SH7780_PCIMBMR0 0x1E4
#define SH7780_PCIMBR2 0x1F0

1
arch/sh/kernel/Makefile
View File

@ -20,5 +20,6 @@ obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_MODULES) += module.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o

28
arch/sh/kernel/cf-enabler.c
View File

@ -29,7 +29,7 @@
* 0xB8001000 : Common Memory
* 0xBA000000 : I/O
*/
#if defined(CONFIG_IDE) && defined(CONFIG_CPU_SH4)
#if defined(CONFIG_CPU_SH4)
/* SH4 can't access PCMCIA interface through P2 area.
* we must remap it with appropreate attribute bit of the page set.
* this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
@ -71,7 +71,7 @@ static int __init cf_init_default(void)
/* You must have enabled the card, and set the level interrupt
* before reaching this point. Possibly in boot ROM or boot loader.
*/
#if defined(CONFIG_IDE) && defined(CONFIG_CPU_SH4)
#if defined(CONFIG_CPU_SH4)
allocate_cf_area();
#endif
#if defined(CONFIG_SH_UNKNOWN)
@ -84,15 +84,25 @@ static int __init cf_init_default(void)
#if defined(CONFIG_SH_SOLUTION_ENGINE)
#include <asm/se.h>
#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
#include <asm/se7722.h>
#endif
/*
* SolutionEngine
* SolutionEngine Seriese
*
* about MS770xSE
* 0xB8400000 : Common Memory
* 0xB8500000 : Attribute
* 0xB8600000 : I/O
*
* about MS7722SE
* 0xB0400000 : Common Memory
* 0xB0500000 : Attribute
* 0xB0600000 : I/O
*/
#if defined(CONFIG_SH_SOLUTION_ENGINE) || defined(CONFIG_SH_7722_SOLUTION_ENGINE)
static int __init cf_init_se(void)
{
if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
@ -109,7 +119,7 @@ static int __init cf_init_se(void)
* flag == COMMON/ATTRIBUTE/IO
*/
/* common window open */
ctrl_outw(0x8a84, MRSHPC_MW0CR1);/* window 0xb8400000 */
ctrl_outw(0x8a84, MRSHPC_MW0CR1);
if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
/* common mode & bus width 16bit SWAP = 1*/
ctrl_outw(0x0b00, MRSHPC_MW0CR2);
@ -118,7 +128,7 @@ static int __init cf_init_se(void)
ctrl_outw(0x0300, MRSHPC_MW0CR2);
/* attribute window open */
ctrl_outw(0x8a85, MRSHPC_MW1CR1);/* window 0xb8500000 */
ctrl_outw(0x8a85, MRSHPC_MW1CR1);
if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
/* attribute mode & bus width 16bit SWAP = 1*/
ctrl_outw(0x0a00, MRSHPC_MW1CR2);
@ -127,7 +137,7 @@ static int __init cf_init_se(void)
ctrl_outw(0x0200, MRSHPC_MW1CR2);
/* I/O window open */
ctrl_outw(0x8a86, MRSHPC_IOWCR1);/* I/O window 0xb8600000 */
ctrl_outw(0x8a86, MRSHPC_IOWCR1);
ctrl_outw(0x0008, MRSHPC_CDCR); /* I/O card mode */
if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
@ -143,10 +153,10 @@ static int __init cf_init_se(void)
int __init cf_init(void)
{
#if defined(CONFIG_SH_SOLUTION_ENGINE)
if (MACH_SE)
if( mach_is_se() || mach_is_7722se() ){
return cf_init_se();
#endif
}
return cf_init_default();
}

102
arch/sh/kernel/cpu/clock.c
View File

@ -1,7 +1,7 @@
/*
* arch/sh/kernel/cpu/clock.c - SuperH clock framework
*
* Copyright (C) 2005, 2006 Paul Mundt
* Copyright (C) 2005, 2006, 2007 Paul Mundt
*
* This clock framework is derived from the OMAP version by:
*
@ -23,6 +23,7 @@
#include <linux/seq_file.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/proc_fs.h>
#include <asm/clock.h>
#include <asm/timer.h>
@ -98,15 +99,17 @@ int __clk_enable(struct clk *clk)
if (clk->ops && clk->ops->init)
clk->ops->init(clk);
kref_get(&clk->kref);
if (clk->flags & CLK_ALWAYS_ENABLED)
return 0;
if (likely(clk->ops && clk->ops->enable))
clk->ops->enable(clk);
kref_get(&clk->kref);
return 0;
}
EXPORT_SYMBOL_GPL(__clk_enable);
int clk_enable(struct clk *clk)
{
@ -119,6 +122,7 @@ int clk_enable(struct clk *clk)
return ret;
}
EXPORT_SYMBOL_GPL(clk_enable);
static void clk_kref_release(struct kref *kref)
{
@ -127,11 +131,17 @@ static void clk_kref_release(struct kref *kref)
void __clk_disable(struct clk *clk)
{
int count = kref_put(&clk->kref, clk_kref_release);
if (clk->flags & CLK_ALWAYS_ENABLED)
return;
kref_put(&clk->kref, clk_kref_release);
if (!count) { /* count reaches zero, disable the clock */
if (likely(clk->ops && clk->ops->disable))
clk->ops->disable(clk);
}
}
EXPORT_SYMBOL_GPL(__clk_disable);
void clk_disable(struct clk *clk)
{
@ -141,6 +151,7 @@ void clk_disable(struct clk *clk)
__clk_disable(clk);
spin_unlock_irqrestore(&clock_lock, flags);
}
EXPORT_SYMBOL_GPL(clk_disable);
int clk_register(struct clk *clk)
{
@ -151,8 +162,18 @@ int clk_register(struct clk *clk)
mutex_unlock(&clock_list_sem);
if (clk->flags & CLK_ALWAYS_ENABLED) {
pr_debug( "Clock '%s' is ALWAYS_ENABLED\n", clk->name);
if (clk->ops && clk->ops->init)
clk->ops->init(clk);
if (clk->ops && clk->ops->enable)
clk->ops->enable(clk);
pr_debug( "Enabled.");
}
return 0;
}
EXPORT_SYMBOL_GPL(clk_register);
void clk_unregister(struct clk *clk)
{
@ -160,13 +181,21 @@ void clk_unregister(struct clk *clk)
list_del(&clk->node);
mutex_unlock(&clock_list_sem);
}
EXPORT_SYMBOL_GPL(clk_unregister);
inline unsigned long clk_get_rate(struct clk *clk)
unsigned long clk_get_rate(struct clk *clk)
{
return clk->rate;
}
EXPORT_SYMBOL_GPL(clk_get_rate);
int clk_set_rate(struct clk *clk, unsigned long rate)
{
return clk_set_rate_ex(clk, rate, 0);
}
EXPORT_SYMBOL_GPL(clk_set_rate);
int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
{
int ret = -EOPNOTSUPP;
@ -174,7 +203,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
unsigned long flags;
spin_lock_irqsave(&clock_lock, flags);
ret = clk->ops->set_rate(clk, rate);
ret = clk->ops->set_rate(clk, rate, algo_id);
spin_unlock_irqrestore(&clock_lock, flags);
}
@ -183,6 +212,7 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
return ret;
}
EXPORT_SYMBOL_GPL(clk_set_rate_ex);
void clk_recalc_rate(struct clk *clk)
{
@ -197,6 +227,7 @@ void clk_recalc_rate(struct clk *clk)
if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
propagate_rate(clk);
}
EXPORT_SYMBOL_GPL(clk_recalc_rate);
/*
* Returns a clock. Note that we first try to use device id on the bus
@ -233,18 +264,43 @@ found:
return clk;
}
EXPORT_SYMBOL_GPL(clk_get);
void clk_put(struct clk *clk)
{
if (clk && !IS_ERR(clk))
module_put(clk->owner);
}
EXPORT_SYMBOL_GPL(clk_put);
void __init __attribute__ ((weak))
arch_init_clk_ops(struct clk_ops **ops, int type)
{
}
static int show_clocks(char *buf, char **start, off_t off,
int len, int *eof, void *data)
{
struct clk *clk;
char *p = buf;
list_for_each_entry_reverse(clk, &clock_list, node) {
unsigned long rate = clk_get_rate(clk);
/*
* Don't bother listing dummy clocks with no ancestry
* that only support enable and disable ops.
*/
if (unlikely(!rate && !clk->parent))
continue;
p += sprintf(p, "%-12s\t: %ld.%02ldMHz\n", clk->name,
rate / 1000000, (rate % 1000000) / 10000);
}
return p - buf;
}
int __init clk_init(void)
{
int i, ret = 0;
@ -256,7 +312,6 @@ int __init clk_init(void)
arch_init_clk_ops(&clk->ops, i);
ret |= clk_register(clk);
clk_enable(clk);
}
/* Kick the child clocks.. */
@ -266,35 +321,14 @@ int __init clk_init(void)
return ret;
}
int show_clocks(struct seq_file *m)
static int __init clk_proc_init(void)
{
struct clk *clk;
list_for_each_entry_reverse(clk, &clock_list, node) {
unsigned long rate = clk_get_rate(clk);
/*
* Don't bother listing dummy clocks with no ancestry
* that only support enable and disable ops.
*/
if (unlikely(!rate && !clk->parent))
continue;
seq_printf(m, "%-12s\t: %ld.%02ldMHz\n", clk->name,
rate / 1000000, (rate % 1000000) / 10000);
}
struct proc_dir_entry *p;
p = create_proc_read_entry("clocks", S_IRUSR, NULL,
show_clocks, NULL);
if (unlikely(!p))
return -EINVAL;
return 0;
}
EXPORT_SYMBOL_GPL(clk_register);
EXPORT_SYMBOL_GPL(clk_unregister);
EXPORT_SYMBOL_GPL(clk_get);
EXPORT_SYMBOL_GPL(clk_put);
EXPORT_SYMBOL_GPL(clk_enable);
EXPORT_SYMBOL_GPL(clk_disable);
EXPORT_SYMBOL_GPL(__clk_enable);
EXPORT_SYMBOL_GPL(__clk_disable);
EXPORT_SYMBOL_GPL(clk_get_rate);
EXPORT_SYMBOL_GPL(clk_set_rate);
EXPORT_SYMBOL_GPL(clk_recalc_rate);
subsys_initcall(clk_proc_init);

19
arch/sh/kernel/cpu/init.c
View File

@ -41,6 +41,23 @@ __setup("no" __stringify(x), x##_setup);
onchip_setup(fpu);
onchip_setup(dsp);
#ifdef CONFIG_SPECULATIVE_EXECUTION
#define CPUOPM 0xff2f0000
#define CPUOPM_RABD (1 << 5)
static void __init speculative_execution_init(void)
{
/* Clear RABD */
ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
/* Flush the update */
(void)ctrl_inl(CPUOPM);
ctrl_barrier();
}
#else
#define speculative_execution_init() do { } while (0)
#endif
/*
* Generic first-level cache init
*/
@ -261,4 +278,6 @@ asmlinkage void __init sh_cpu_init(void)
*/
ubc_wakeup();
#endif
speculative_execution_init();
}

2
arch/sh/kernel/cpu/irq/Makefile
View File

@ -4,6 +4,6 @@
obj-y += imask.o
obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o
obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o
obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o
obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o

3
arch/sh/kernel/cpu/irq/intc2.c
View File

@ -18,7 +18,8 @@
#define INTC2_BASE 0xfe080000
#define INTC2_INTMSK (INTC2_BASE + 0x40)
#define INTC2_INTMSKCLR (INTC2_BASE + 0x60)
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785)
#define INTC2_BASE 0xffd40000
#define INTC2_INTMSK (INTC2_BASE + 0x38)
#define INTC2_INTMSKCLR (INTC2_BASE + 0x3c)

56
arch/sh/kernel/cpu/irq/pint.c
View File

@ -18,6 +18,58 @@
#include <asm/io.h>
#include <asm/machvec.h>
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
#define INTC_INTER 0xA4000014UL
#define INTC_IPRD 0xA4000018UL
#define INTC_ICR2 0xA4000012UL
/* PFC */
#define PORT_PACR 0xA4000100UL
#define PORT_PBCR 0xA4000102UL
#define PORT_PCCR 0xA4000104UL
#define PORT_PDCR 0xA4000106UL
#define PORT_PECR 0xA4000108UL
#define PORT_PFCR 0xA400010AUL
#define PORT_PGCR 0xA400010CUL
#define PORT_PHCR 0xA400010EUL
#define PORT_PJCR 0xA4000110UL
#define PORT_PKCR 0xA4000112UL
#define PORT_PLCR 0xA4000114UL
#define PORT_PMCR 0xA4000118UL
#define PORT_PNCR 0xA400011AUL
#define PORT_PECR2 0xA4050148UL
#define PORT_PFCR2 0xA405014AUL
#define PORT_PNCR2 0xA405015AUL
/* I/O port */
#define PORT_PADR 0xA4000120UL
#define PORT_PBDR 0xA4000122UL
#define PORT_PCDR 0xA4000124UL
#define PORT_PDDR 0xA4000126UL
#define PORT_PEDR 0xA4000128UL
#define PORT_PFDR 0xA400012AUL
#define PORT_PGDR 0xA400012CUL
#define PORT_PHDR 0xA400012EUL
#define PORT_PJDR 0xA4000130UL
#define PORT_PKDR 0xA4000132UL
#define PORT_PLDR 0xA4000134UL
#define PORT_PMDR 0xA4000138UL
#define PORT_PNDR 0xA400013AUL
#define PINT0_IRQ 40
#define PINT8_IRQ 41
#define PINT_IRQ_BASE 86
#define PINT0_IPR_ADDR INTC_IPRD
#define PINT0_IPR_POS 3
#define PINT0_PRIORITY 2
#define PINT8_IPR_ADDR INTC_IPRD
#define PINT8_IPR_POS 2
#define PINT8_PRIORITY 2
#endif /* CONFIG_CPU_SUBTYPE_SH7705 */
static unsigned char pint_map[256];
static unsigned long portcr_mask;
@ -126,7 +178,7 @@ int ipr_irq_demux(int irq)
unsigned long creg, dreg, d, sav;
if (irq == PINT0_IRQ) {
#if defined(CONFIG_CPU_SUBTYPE_SH7707)
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707)
creg = PORT_PACR;
dreg = PORT_PADR;
#else
@ -144,7 +196,7 @@ int ipr_irq_demux(int irq)
return PINT_IRQ_BASE + pint_map[d];
} else if (irq == PINT8_IRQ) {
#if defined(CONFIG_CPU_SUBTYPE_SH7707)
#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707)
creg = PORT_PBCR;
dreg = PORT_PBDR;
#else

1
arch/sh/kernel/cpu/sh3/Makefile
View File

@ -12,6 +12,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o
obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7300) += setup-sh7300.o
obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o
obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o
# Primary on-chip clocks (common)
clock-$(CONFIG_CPU_SH3) := clock-sh3.o

3
arch/sh/kernel/cpu/sh3/probe.c
View File

@ -78,6 +78,9 @@ int __init detect_cpu_and_cache_system(void)
#if defined(CONFIG_CPU_SUBTYPE_SH7710)
current_cpu_data.type = CPU_SH7710;
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7712)
current_cpu_data.type = CPU_SH7712;
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
current_cpu_data.type = CPU_SH7705;

58
arch/sh/kernel/cpu/sh3/setup-sh7705.c
View File

@ -2,6 +2,7 @@
* SH7705 Setup
*
* Copyright (C) 2006 Paul Mundt
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -14,15 +15,15 @@
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xa4400000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 52, 53, 55, 54 },
}, {
.mapbase = 0xa4410000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 56, 57, 59, 58 },
.irqs = { 56, 57, 59 },
}, {
.mapbase = 0xa4400000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 52, 53, 55 },
}, {
.flags = 0,
}
@ -46,3 +47,48 @@ static int __init sh7705_devices_setup(void)
ARRAY_SIZE(sh7705_devices));
}
__initcall(sh7705_devices_setup);
static struct ipr_data sh7705_ipr_map[] = {
/* IRQ, IPR-idx, shift, priority */
{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
{ 17, 0, 8, 2 }, /* TMU1 TUNI */
{ 18, 0, 4, 2 }, /* TMU2 TUNI */
{ 27, 1, 12, 2 }, /* WDT ITI */
{ 20, 0, 0, 2 }, /* RTC ATI (alarm) */
{ 21, 0, 0, 2 }, /* RTC PRI (period) */
{ 22, 0, 0, 2 }, /* RTC CUI (carry) */
{ 48, 4, 12, 7 }, /* DMAC DMTE0 */
{ 49, 4, 12, 7 }, /* DMAC DMTE1 */
{ 50, 4, 12, 7 }, /* DMAC DMTE2 */
{ 51, 4, 12, 7 }, /* DMAC DMTE3 */
{ 52, 4, 8, 3 }, /* SCIF0 ERI */
{ 53, 4, 8, 3 }, /* SCIF0 RXI */
{ 55, 4, 8, 3 }, /* SCIF0 TXI */
{ 56, 4, 4, 3 }, /* SCIF1 ERI */
{ 57, 4, 4, 3 }, /* SCIF1 RXI */
{ 59, 4, 4, 3 }, /* SCIF1 TXI */
};
static unsigned long ipr_offsets[] = {
0xFFFFFEE2 /* 0: IPRA */
, 0xFFFFFEE4 /* 1: IPRB */
, 0xA4000016 /* 2: IPRC */
, 0xA4000018 /* 3: IPRD */
, 0xA400001A /* 4: IPRE */
, 0xA4080000 /* 5: IPRF */
, 0xA4080002 /* 6: IPRG */
, 0xA4080004 /* 7: IPRH */
};
/* given the IPR index return the address of the IPR register */
unsigned int map_ipridx_to_addr(int idx)
{
if (idx >= ARRAY_SIZE(ipr_offsets))
return 0;
return ipr_offsets[idx];
}
void __init init_IRQ_ipr()
{
make_ipr_irq(sh7705_ipr_map, ARRAY_SIZE(sh7705_ipr_map));
}

29
arch/sh/kernel/cpu/sh3/setup-sh7709.c
View File

@ -48,24 +48,33 @@ static struct platform_device *sh7709_devices[] __initdata = {
static int __init sh7709_devices_setup(void)
{
return platform_add_devices(sh7709_devices,
ARRAY_SIZE(sh7709_devices));
ARRAY_SIZE(sh7709_devices));
}
__initcall(sh7709_devices_setup);
#define IPRx(A,N) .addr=A, .shift=0*N*-1
#define IPRx(A,N) .addr=A, .shift=N
#define IPRA(N) IPRx(0xfffffee2UL,N)
#define IPRB(N) IPRx(0xfffffee4UL,N)
#define IPRC(N) IPRx(0xa4000016UL,N)
#define IPRD(N) IPRx(0xa4000018UL,N)
#define IPRE(N) IPRx(0xa400001aUL,N)
static struct ipr_data sh7709_ipr_map[] = {
[16] = { IPRA(15-12), 2 }, /* TMU TUNI0 */
[17] = { IPRA(11-8), 4 }, /* TMU TUNI1 */
[22] = { IPRA(3-0), 2 }, /* RTC CUI */
[23 ... 26] = { IPRB(7-4), 3 }, /* SCI */
[27] = { IPRB(15-12), 2 }, /* WDT ITI */
[48 ... 51] = { IPRE(15-12), 7 }, /* DMA */
[52 ... 55] = { IPRE(11-8), 3 }, /* IRDA */
[56 ... 59] = { IPRE(7-4), 3 }, /* SCIF */
[16] = { IPRA(12), 2 }, /* TMU TUNI0 */
[17] = { IPRA(8), 4 }, /* TMU TUNI1 */
[18 ... 19] = { IPRA(4), 1 }, /* TMU TUNI1 */
[20 ... 22] = { IPRA(0), 2 }, /* RTC CUI */
[23 ... 26] = { IPRB(4), 3 }, /* SCI */
[27] = { IPRB(12), 2 }, /* WDT ITI */
[32] = { IPRC(0), 1 }, /* IRQ 0 */
[33] = { IPRC(4), 1 }, /* IRQ 1 */
[34] = { IPRC(8), 1 }, /* IRQ 2 APM */
[35] = { IPRC(12), 1 }, /* IRQ 3 TOUCHSCREEN */
[36] = { IPRD(0), 1 }, /* IRQ 4 */
[37] = { IPRD(4), 1 }, /* IRQ 5 */
[48 ... 51] = { IPRE(12), 7 }, /* DMA */
[52 ... 55] = { IPRE(8), 3 }, /* IRDA */
[56 ... 59] = { IPRE(4), 3 }, /* SCIF */
};
void __init init_IRQ_ipr()

60
arch/sh/kernel/cpu/sh3/setup-sh7710.c
View File

@ -2,6 +2,7 @@
* SH7710 Setup
*
* Copyright (C) 2006 Paul Mundt
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -19,6 +20,12 @@ static struct plat_sci_port sci_platform_data[] = {
.type = PORT_SCIF,
.irqs = { 52, 53, 55, 54 },
}, {
.mapbase = 0xa4420000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 56, 57, 59, 58 },
}, {
.flags = 0,
}
};
@ -41,3 +48,56 @@ static int __init sh7710_devices_setup(void)
ARRAY_SIZE(sh7710_devices));
}
__initcall(sh7710_devices_setup);
static struct ipr_data sh7710_ipr_map[] = {
/* IRQ, IPR-idx, shift, priority */
{ 16, 0, 12, 2 }, /* TMU0 TUNI*/
{ 17, 0, 8, 2 }, /* TMU1 TUNI */
{ 18, 0, 4, 2 }, /* TMU2 TUNI */
{ 27, 1, 12, 2 }, /* WDT ITI */
{ 20, 0, 0, 2 }, /* RTC ATI (alarm) */
{ 21, 0, 0, 2 }, /* RTC PRI (period) */
{ 22, 0, 0, 2 }, /* RTC CUI (carry) */
{ 48, 4, 12, 7 }, /* DMAC DMTE0 */
{ 49, 4, 12, 7 }, /* DMAC DMTE1 */
{ 50, 4, 12, 7 }, /* DMAC DMTE2 */
{ 51, 4, 12, 7 }, /* DMAC DMTE3 */
{ 52, 4, 8, 3 }, /* SCIF0 ERI */
{ 53, 4, 8, 3 }, /* SCIF0 RXI */
{ 54, 4, 8, 3 }, /* SCIF0 BRI */
{ 55, 4, 8, 3 }, /* SCIF0 TXI */
{ 56, 4, 4, 3 }, /* SCIF1 ERI */
{ 57, 4, 4, 3 }, /* SCIF1 RXI */
{ 58, 4, 4, 3 }, /* SCIF1 BRI */
{ 59, 4, 4, 3 }, /* SCIF1 TXI */
{ 76, 5, 8, 7 }, /* DMAC DMTE4 */
{ 77, 5, 8, 7 }, /* DMAC DMTE5 */
{ 80, 6, 12, 5 }, /* EDMAC EINT0 */
{ 81, 6, 8, 5 }, /* EDMAC EINT1 */
{ 82, 6, 4, 5 }, /* EDMAC EINT2 */
};
static unsigned long ipr_offsets[] = {
0xA414FEE2 /* 0: IPRA */
, 0xA414FEE4 /* 1: IPRB */
, 0xA4140016 /* 2: IPRC */
, 0xA4140018 /* 3: IPRD */
, 0xA414001A /* 4: IPRE */
, 0xA4080000 /* 5: IPRF */
, 0xA4080002 /* 6: IPRG */
, 0xA4080004 /* 7: IPRH */
, 0xA4080006 /* 8: IPRI */
};
/* given the IPR index return the address of the IPR register */
unsigned int map_ipridx_to_addr(int idx)
{
if (idx >= ARRAY_SIZE(ipr_offsets))
return 0;
return ipr_offsets[idx];
}
void __init init_IRQ_ipr()
{
make_ipr_irq(sh7710_ipr_map, ARRAY_SIZE(sh7710_ipr_map));
}

3
arch/sh/kernel/cpu/sh4/clock-sh4-202.c
View File

@ -82,7 +82,8 @@ static void shoc_clk_init(struct clk *clk)
for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) {
int divisor = frqcr3_divisors[i];
if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0)
if (clk->ops->set_rate(clk, clk->parent->rate /
divisor, 0) == 0)
break;
}

8
arch/sh/kernel/cpu/sh4/probe.c
View File

@ -124,6 +124,14 @@ int __init detect_cpu_and_cache_system(void)
current_cpu_data.dcache.ways = 4;
current_cpu_data.flags |= CPU_HAS_LLSC;
break;
case 0x3004:
case 0x3007:
current_cpu_data.type = CPU_SH7785;
current_cpu_data.icache.ways = 4;
current_cpu_data.dcache.ways = 4;
current_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
CPU_HAS_LLSC;
break;
case 0x3008:
if (prr == 0xa0) {
current_cpu_data.type = CPU_SH7722;

4
arch/sh/kernel/cpu/sh4a/Makefile
View File

@ -5,6 +5,7 @@
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o
obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o
obj-$(CONFIG_CPU_SUBTYPE_SH73180) += setup-sh73180.o
obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o
obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
@ -13,7 +14,8 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o
clock-$(CONFIG_CPU_SUBTYPE_SH73180) := clock-sh73180.o
clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7343.o
clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
obj-y += $(clock-y)

600
arch/sh/kernel/cpu/sh4a/clock-sh7722.c Normal file
View File

@ -0,0 +1,600 @@
/*
* arch/sh/kernel/cpu/sh4a/clock-sh7722.c
*
* SH7722 support for the clock framework
*
* Copyright (c) 2006-2007 Nomad Global Solutions Inc
* Based on code for sh7343 by Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/errno.h>
#include <asm/clock.h>
#include <asm/freq.h>
#define SH7722_PLL_FREQ (32000000/8)
#define N (-1)
#define NM (-2)
#define ROUND_NEAREST 0
#define ROUND_DOWN -1
#define ROUND_UP +1
static int adjust_algos[][3] = {
{}, /* NO_CHANGE */
{ NM, N, 1 }, /* N:1, N:1 */
{ 3, 2, 2 }, /* 3:2:2 */
{ 5, 2, 2 }, /* 5:2:2 */
{ N, 1, 1 }, /* N:1:1 */
{ N, 1 }, /* N:1 */
{ N, 1 }, /* N:1 */
{ 3, 2 },
{ 4, 3 },
{ 5, 4 },
{ N, 1 }
};
static unsigned long adjust_pair_of_clocks(unsigned long r1, unsigned long r2,
int m1, int m2, int round_flag)
{
unsigned long rem, div;
int the_one = 0;
pr_debug( "Actual values: r1 = %ld\n", r1);
pr_debug( "...............r2 = %ld\n", r2);
if (m1 == m2) {
r2 = r1;
pr_debug( "setting equal rates: r2 now %ld\n", r2);
} else if ((m2 == N && m1 == 1) ||
(m2 == NM && m1 == N)) { /* N:1 or NM:N */
pr_debug( "Setting rates as 1:N (N:N*M)\n");
rem = r2 % r1;
pr_debug( "...remainder = %ld\n", rem);
if (rem) {
div = r2 / r1;
pr_debug( "...div = %ld\n", div);
switch (round_flag) {
case ROUND_NEAREST:
the_one = rem >= r1/2 ? 1 : 0; break;
case ROUND_UP:
the_one = 1; break;
case ROUND_DOWN:
the_one = 0; break;
}
r2 = r1 * (div + the_one);
pr_debug( "...setting r2 to %ld\n", r2);
}
} else if ((m2 == 1 && m1 == N) ||
(m2 == N && m1 == NM)) { /* 1:N or N:NM */
pr_debug( "Setting rates as N:1 (N*M:N)\n");
rem = r1 % r2;
pr_debug( "...remainder = %ld\n", rem);
if (rem) {
div = r1 / r2;
pr_debug( "...div = %ld\n", div);
switch (round_flag) {
case ROUND_NEAREST:
the_one = rem > r2/2 ? 1 : 0; break;
case ROUND_UP:
the_one = 0; break;
case ROUND_DOWN:
the_one = 1; break;
}
r2 = r1 / (div + the_one);
pr_debug( "...setting r2 to %ld\n", r2);
}
} else { /* value:value */
pr_debug( "Setting rates as %d:%d\n", m1, m2);
div = r1 / m1;
r2 = div * m2;
pr_debug( "...div = %ld\n", div);
pr_debug( "...setting r2 to %ld\n", r2);
}
return r2;
}
static void adjust_clocks(int originate, int *l, unsigned long v[],
int n_in_line)
{
int x;
pr_debug( "Go down from %d...\n", originate);
/* go up recalculation clocks */
for (x = originate; x>0; x -- )
v[x-1] = adjust_pair_of_clocks(v[x], v[x-1],
l[x], l[x-1],
ROUND_UP);
pr_debug( "Go up from %d...\n", originate);
/* go down recalculation clocks */
for (x = originate; x<n_in_line - 1; x ++ )
v[x+1] = adjust_pair_of_clocks(v[x], v[x+1],
l[x], l[x+1],
ROUND_UP);
}
/*
* SH7722 uses a common set of multipliers and divisors, so this
* is quite simple..
*/
/*
* Instead of having two separate multipliers/divisors set, like this:
*
* static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
* static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
*
* I created the divisors2 array, which is used to calculate rate like
* rate = parent * 2 / divisors2[ divisor ];
*/
static int divisors2[] = { 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40 };
static void master_clk_init(struct clk *clk)
{
clk_set_rate(clk, clk_get_rate(clk));
}
static void master_clk_recalc(struct clk *clk)
{
unsigned long frqcr = ctrl_inl(FRQCR);
clk->rate = CONFIG_SH_PCLK_FREQ * (1 + (frqcr >> 24 & 0xF));
}
static int master_clk_setrate(struct clk *clk, unsigned long rate, int id)
{
int div = rate / SH7722_PLL_FREQ;
int master_divs[] = { 2, 3, 4, 6, 8, 16 };
int index;
unsigned long frqcr;
if (rate < SH7722_PLL_FREQ * 2)
return -EINVAL;
for (index = 1; index < ARRAY_SIZE(master_divs); index++)
if (div >= master_divs[index - 1] && div < master_divs[index])
break;
if (index >= ARRAY_SIZE(master_divs))
index = ARRAY_SIZE(master_divs);
div = master_divs[index - 1];
frqcr = ctrl_inl(FRQCR);
frqcr &= ~(0xF << 24);
frqcr |= ( (div-1) << 24);
ctrl_outl(frqcr, FRQCR);
return 0;
}
static struct clk_ops sh7722_master_clk_ops = {
.init = master_clk_init,
.recalc = master_clk_recalc,
.set_rate = master_clk_setrate,
};
struct frqcr_context {
unsigned mask;
unsigned shift;
};
struct frqcr_context sh7722_get_clk_context(const char *name)
{
struct frqcr_context ctx = { 0, };
if (!strcmp(name, "peripheral_clk")) {
ctx.shift = 0;
ctx.mask = 0xF;
} else if (!strcmp(name, "sdram_clk")) {
ctx.shift = 4;
ctx.mask = 0xF;
} else if (!strcmp(name, "bus_clk")) {
ctx.shift = 8;
ctx.mask = 0xF;
} else if (!strcmp(name, "sh_clk")) {
ctx.shift = 12;
ctx.mask = 0xF;
} else if (!strcmp(name, "umem_clk")) {
ctx.shift = 16;
ctx.mask = 0xF;
} else if (!strcmp(name, "cpu_clk")) {
ctx.shift = 20;
ctx.mask = 7;
}
return ctx;
}
/**
* sh7722_find_divisors - find divisor for setting rate
*
* All sh7722 clocks use the same set of multipliers/divisors. This function
* chooses correct divisor to set the rate of clock with parent clock that
* generates frequency of 'parent_rate'
*
* @parent_rate: rate of parent clock
* @rate: requested rate to be set
*/
static int sh7722_find_divisors(unsigned long parent_rate, unsigned rate)
{
unsigned div2 = parent_rate * 2 / rate;
int index;
if (rate > parent_rate)
return -EINVAL;
for (index = 1; index < ARRAY_SIZE(divisors2); index++) {
if (div2 > divisors2[index] && div2 <= divisors2[index])
break;
}
if (index >= ARRAY_SIZE(divisors2))
index = ARRAY_SIZE(divisors2) - 1;
return divisors2[index];
}
static void sh7722_frqcr_recalc(struct clk *clk)
{
struct frqcr_context ctx = sh7722_get_clk_context(clk->name);
unsigned long frqcr = ctrl_inl(FRQCR);
int index;
index = (frqcr >> ctx.shift) & ctx.mask;
clk->rate = clk->parent->rate * 2 / divisors2[index];
}
static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate,
int algo_id)
{
struct frqcr_context ctx = sh7722_get_clk_context(clk->name);
unsigned long parent_rate = clk->parent->rate;
int div;
unsigned long frqcr;
int err = 0;
/* pretty invalid */
if (parent_rate < rate)
return -EINVAL;
/* look for multiplier/divisor pair */
div = sh7722_find_divisors(parent_rate, rate);
if (div<0)
return div;
/* calculate new value of clock rate */
clk->rate = parent_rate * 2 / div;
frqcr = ctrl_inl(FRQCR);
/* FIXME: adjust as algo_id specifies */
if (algo_id != NO_CHANGE) {
int originator;
char *algo_group_1[] = { "cpu_clk", "umem_clk", "sh_clk" };
char *algo_group_2[] = { "sh_clk", "bus_clk" };
char *algo_group_3[] = { "sh_clk", "sdram_clk" };
char *algo_group_4[] = { "bus_clk", "peripheral_clk" };
char *algo_group_5[] = { "cpu_clk", "peripheral_clk" };
char **algo_current = NULL;
/* 3 is the maximum number of clocks in relation */
struct clk *ck[3];
unsigned long values[3]; /* the same comment as above */
int part_length = -1;
int i;
/*
* all the steps below only required if adjustion was
* requested
*/
if (algo_id == IUS_N1_N1 ||
algo_id == IUS_322 ||
algo_id == IUS_522 ||
algo_id == IUS_N11) {
algo_current = algo_group_1;
part_length = 3;
}
if (algo_id == SB_N1) {
algo_current = algo_group_2;
part_length = 2;
}
if (algo_id == SB3_N1 ||
algo_id == SB3_32 ||
algo_id == SB3_43 ||
algo_id == SB3_54) {
algo_current = algo_group_3;
part_length = 2;
}
if (algo_id == BP_N1) {
algo_current = algo_group_4;
part_length = 2;
}
if (algo_id == IP_N1) {
algo_current = algo_group_5;
part_length = 2;
}
if (!algo_current)
goto incorrect_algo_id;
originator = -1;
for (i = 0; i < part_length; i ++ ) {
if (originator >= 0 && !strcmp(clk->name,
algo_current[i]))
originator = i;
ck[i] = clk_get(NULL, algo_current[i]);
values[i] = clk_get_rate(ck[i]);
}
if (originator >= 0)
adjust_clocks(originator, adjust_algos[algo_id],
values, part_length);
for (i = 0; i < part_length; i ++ ) {
struct frqcr_context part_ctx;
int part_div;
if (likely(!err)) {
part_div = sh7722_find_divisors(parent_rate,
rate);
if (part_div > 0) {
part_ctx = sh7722_get_clk_context(
ck[i]->name);
frqcr &= ~(part_ctx.mask <<
part_ctx.shift);
frqcr |= part_div << part_ctx.shift;
} else
err = part_div;
}
ck[i]->ops->recalc(ck[i]);
clk_put(ck[i]);
}
}
/* was there any error during recalculation ? If so, bail out.. */
if (unlikely(err!=0))
goto out_err;
/* clear FRQCR bits */
frqcr &= ~(ctx.mask << ctx.shift);
frqcr |= div << ctx.shift;
/* ...and perform actual change */
ctrl_outl(frqcr, FRQCR);
return 0;
incorrect_algo_id:
return -EINVAL;
out_err:
return err;
}
static struct clk_ops sh7722_frqcr_clk_ops = {
.recalc = sh7722_frqcr_recalc,
.set_rate = sh7722_frqcr_set_rate,
};
/*
* clock ops methods for SIU A/B and IrDA clock
*
*/
static int sh7722_siu_which(struct clk *clk)
{
if (!strcmp(clk->name, "siu_a_clk"))
return 0;
if (!strcmp(clk->name, "siu_b_clk"))
return 1;
if (!strcmp(clk->name, "irda_clk"))
return 2;
return -EINVAL;
}
static unsigned long sh7722_siu_regs[] = {
[0] = SCLKACR,
[1] = SCLKBCR,
[2] = IrDACLKCR,
};
static int sh7722_siu_start_stop(struct clk *clk, int enable)
{
int siu = sh7722_siu_which(clk);
unsigned long r;
if (siu < 0)
return siu;
BUG_ON(siu > 2);
r = ctrl_inl(sh7722_siu_regs[siu]);
if (enable)
ctrl_outl(r & ~(1 << 8), sh7722_siu_regs[siu]);
else
ctrl_outl(r | (1 << 8), sh7722_siu_regs[siu]);
return 0;
}
static void sh7722_siu_enable(struct clk *clk)
{
sh7722_siu_start_stop(clk, 1);
}
static void sh7722_siu_disable(struct clk *clk)
{
sh7722_siu_start_stop(clk, 0);
}
static void sh7722_video_enable(struct clk *clk)
{
unsigned long r;
r = ctrl_inl(VCLKCR);
ctrl_outl( r & ~(1<<8), VCLKCR);
}
static void sh7722_video_disable(struct clk *clk)
{
unsigned long r;
r = ctrl_inl(VCLKCR);
ctrl_outl( r | (1<<8), VCLKCR);
}
static int sh7722_video_set_rate(struct clk *clk, unsigned long rate,
int algo_id)
{
unsigned long r;
r = ctrl_inl(VCLKCR);
r &= ~0x3F;
r |= ((clk->parent->rate / rate - 1) & 0x3F);
ctrl_outl(r, VCLKCR);
return 0;
}
static void sh7722_video_recalc(struct clk *clk)
{
unsigned long r;
r = ctrl_inl(VCLKCR);
clk->rate = clk->parent->rate / ((r & 0x3F) + 1);
}
static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
{
int siu = sh7722_siu_which(clk);
unsigned long r;
int div;
if (siu < 0)
return siu;
BUG_ON(siu > 2);
r = ctrl_inl(sh7722_siu_regs[siu]);
div = sh7722_find_divisors(clk->parent->rate, rate);
if (div < 0)
return div;
r = (r & ~0xF) | div;
ctrl_outl(r, sh7722_siu_regs[siu]);
return 0;
}
static void sh7722_siu_recalc(struct clk *clk)
{
int siu = sh7722_siu_which(clk);
unsigned long r;
if (siu < 0)
return /* siu */ ;
BUG_ON(siu > 1);
r = ctrl_inl(sh7722_siu_regs[siu]);
clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
}
static struct clk_ops sh7722_siu_clk_ops = {
.recalc = sh7722_siu_recalc,
.set_rate = sh7722_siu_set_rate,
.enable = sh7722_siu_enable,
.disable = sh7722_siu_disable,
};
static struct clk_ops sh7722_video_clk_ops = {
.recalc = sh7722_video_recalc,
.set_rate = sh7722_video_set_rate,
.enable = sh7722_video_enable,
.disable = sh7722_video_disable,
};
/*
* and at last, clock definitions themselves
*/
static struct clk sh7722_umem_clock = {
.name = "umem_clk",
.ops = &sh7722_frqcr_clk_ops,
};
static struct clk sh7722_sh_clock = {
.name = "sh_clk",
.ops = &sh7722_frqcr_clk_ops,
};
static struct clk sh7722_peripheral_clock = {
.name = "peripheral_clk",
.ops = &sh7722_frqcr_clk_ops,
};
static struct clk sh7722_sdram_clock = {
.name = "sdram_clk",
.ops = &sh7722_frqcr_clk_ops,
};
/*
* these three clocks - SIU A, SIU B, IrDA - share the same clk_ops
* methods of clk_ops determine which register they should access by
* examining clk->name field
*/
static struct clk sh7722_siu_a_clock = {
.name = "siu_a_clk",
.ops = &sh7722_siu_clk_ops,
};
static struct clk sh7722_siu_b_clock = {
.name = "siu_b_clk",
.ops = &sh7722_siu_clk_ops,
};
static struct clk sh7722_irda_clock = {
.name = "irda_clk",
.ops = &sh7722_siu_clk_ops,
};
static struct clk sh7722_video_clock = {
.name = "video_clk",
.ops = &sh7722_video_clk_ops,
};
static struct clk *sh7722_clocks[] = {
&sh7722_umem_clock,
&sh7722_sh_clock,
&sh7722_peripheral_clock,
&sh7722_sdram_clock,
&sh7722_siu_a_clock,
&sh7722_siu_b_clock,
&sh7722_irda_clock,
&sh7722_video_clock,
};
/*
* init in order: master, module, bus, cpu
*/
struct clk_ops *onchip_ops[] = {
&sh7722_master_clk_ops,
&sh7722_frqcr_clk_ops,
&sh7722_frqcr_clk_ops,
&sh7722_frqcr_clk_ops,
};
void __init
arch_init_clk_ops(struct clk_ops **ops, int type)
{
BUG_ON(type < 0 || type > ARRAY_SIZE(onchip_ops));
*ops = onchip_ops[type];
}
int __init sh7722_clock_init(void)
{
struct clk *master;
int i;
master = clk_get(NULL, "master_clk");
for (i = 0; i < ARRAY_SIZE(sh7722_clocks); i++) {
pr_debug( "Registering clock '%s'\n", sh7722_clocks[i]->name);
sh7722_clocks[i]->parent = master;
clk_register(sh7722_clocks[i]);
}
clk_put(master);
return 0;
}
arch_initcall(sh7722_clock_init);

162
arch/sh/kernel/cpu/sh4a/clock-sh7785.c Normal file
View File

@ -0,0 +1,162 @@
/*
* arch/sh/kernel/cpu/sh4a/clock-sh7785.c
*
* SH7785 support for the clock framework
*
* Copyright (C) 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <asm/clock.h>
#include <asm/freq.h>
#include <asm/io.h>
static int ifc_divisors[] = { 1, 2, 4, 6 };
static int ufc_divisors[] = { 1, 1, 4, 6 };
static int sfc_divisors[] = { 1, 1, 4, 6 };
static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 18,
24, 32, 36, 48, 1, 1, 1, 1 };
static int mfc_divisors[] = { 1, 1, 4, 6 };
static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 18,
24, 32, 36, 48, 1, 1, 1, 1 };
static void master_clk_init(struct clk *clk)
{
clk->rate *= 36;
}
static struct clk_ops sh7785_master_clk_ops = {
.init = master_clk_init,
};
static void module_clk_recalc(struct clk *clk)
{
int idx = (ctrl_inl(FRQMR1) & 0x000f);
clk->rate = clk->parent->rate / pfc_divisors[idx];
}
static struct clk_ops sh7785_module_clk_ops = {
.recalc = module_clk_recalc,
};
static void bus_clk_recalc(struct clk *clk)
{
int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
clk->rate = clk->parent->rate / bfc_divisors[idx];
}
static struct clk_ops sh7785_bus_clk_ops = {
.recalc = bus_clk_recalc,
};
static void cpu_clk_recalc(struct clk *clk)
{
int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
clk->rate = clk->parent->rate / ifc_divisors[idx];
}
static struct clk_ops sh7785_cpu_clk_ops = {
.recalc = cpu_clk_recalc,
};
static struct clk_ops *sh7785_clk_ops[] = {
&sh7785_master_clk_ops,
&sh7785_module_clk_ops,
&sh7785_bus_clk_ops,
&sh7785_cpu_clk_ops,
};
void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
{
if (idx < ARRAY_SIZE(sh7785_clk_ops))
*ops = sh7785_clk_ops[idx];
}
static void shyway_clk_recalc(struct clk *clk)
{
int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
clk->rate = clk->parent->rate / sfc_divisors[idx];
}
static struct clk_ops sh7785_shyway_clk_ops = {
.recalc = shyway_clk_recalc,
};
static struct clk sh7785_shyway_clk = {
.name = "shyway_clk",
.flags = CLK_ALWAYS_ENABLED,
.ops = &sh7785_shyway_clk_ops,
};
static void ddr_clk_recalc(struct clk *clk)
{
int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
clk->rate = clk->parent->rate / mfc_divisors[idx];
}
static struct clk_ops sh7785_ddr_clk_ops = {
.recalc = ddr_clk_recalc,
};
static struct clk sh7785_ddr_clk = {
.name = "ddr_clk",
.flags = CLK_ALWAYS_ENABLED,
.ops = &sh7785_ddr_clk_ops,
};
static void ram_clk_recalc(struct clk *clk)
{
int idx = ((ctrl_inl(FRQMR1) >> 24) & 0x0003);
clk->rate = clk->parent->rate / ufc_divisors[idx];
}
static struct clk_ops sh7785_ram_clk_ops = {
.recalc = ram_clk_recalc,
};
static struct clk sh7785_ram_clk = {
.name = "ram_clk",
.flags = CLK_ALWAYS_ENABLED,
.ops = &sh7785_ram_clk_ops,
};
/*
* Additional SH7785-specific on-chip clocks that aren't already part of the
* clock framework
*/
static struct clk *sh7785_onchip_clocks[] = {
&sh7785_shyway_clk,
&sh7785_ddr_clk,
&sh7785_ram_clk,
};
static int __init sh7785_clk_init(void)
{
struct clk *clk = clk_get(NULL, "master_clk");
int i;
for (i = 0; i < ARRAY_SIZE(sh7785_onchip_clocks); i++) {
struct clk *clkp = sh7785_onchip_clocks[i];
clkp->parent = clk;
clk_register(clkp);
clk_enable(clkp);
}
/*
* Now that we have the rest of the clocks registered, we need to
* force the parent clock to propagate so that these clocks will
* automatically figure out their rate. We cheat by handing the
* parent clock its current rate and forcing child propagation.
*/
clk_set_rate(clk, clk_get_rate(clk));
clk_put(clk);
return 0;
}
arch_initcall(sh7785_clk_init);

103
arch/sh/kernel/cpu/sh4a/setup-sh7785.c Normal file
View File

@ -0,0 +1,103 @@
/*
* SH7785 Setup
*
* Copyright (C) 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <asm/sci.h>
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xffea0000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 40, 41, 43, 42 },
}, {
.mapbase = 0xffeb0000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 44, 45, 47, 46 },
},
/*
* The rest of these all have multiplexed IRQs
*/
{
.mapbase = 0xffec0000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 60, 60, 60, 60 },
}, {
.mapbase = 0xffed0000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 61, 61, 61, 61 },
}, {
.mapbase = 0xffee0000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 62, 62, 62, 62 },
}, {
.mapbase = 0xffef0000,
.flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF,
.irqs = { 63, 63, 63, 63 },
}, {
.flags = 0,
}
};
static struct platform_device sci_device = {
.name = "sh-sci",
.id = -1,
.dev = {
.platform_data = sci_platform_data,
},
};
static struct platform_device *sh7785_devices[] __initdata = {
&sci_device,
};
static int __init sh7785_devices_setup(void)
{
return platform_add_devices(sh7785_devices,
ARRAY_SIZE(sh7785_devices));
}
__initcall(sh7785_devices_setup);
static struct intc2_data intc2_irq_table[] = {
{ 28, 0, 24, 0, 0, 2 }, /* TMU0 */
{ 40, 8, 24, 0, 2, 3 }, /* SCIF0 ERI */
{ 41, 8, 24, 0, 2, 3 }, /* SCIF0 RXI */
{ 42, 8, 24, 0, 2, 3 }, /* SCIF0 BRI */
{ 43, 8, 24, 0, 2, 3 }, /* SCIF0 TXI */
{ 44, 8, 16, 0, 3, 3 }, /* SCIF1 ERI */
{ 45, 8, 16, 0, 3, 3 }, /* SCIF1 RXI */
{ 46, 8, 16, 0, 3, 3 }, /* SCIF1 BRI */
{ 47, 8, 16, 0, 3, 3 }, /* SCIF1 TXI */
{ 64, 0x14, 8, 0, 14, 2 }, /* PCIC0 */
{ 65, 0x14, 0, 0, 15, 2 }, /* PCIC1 */
{ 66, 0x18, 24, 0, 16, 2 }, /* PCIC2 */
{ 67, 0x18, 16, 0, 17, 2 }, /* PCIC3 */
{ 68, 0x18, 8, 0, 18, 2 }, /* PCIC4 */
{ 60, 8, 8, 0, 4, 3 }, /* SCIF2 ERI, RXI, BRI, TXI */
{ 60, 8, 0, 0, 5, 3 }, /* SCIF3 ERI, RXI, BRI, TXI */
{ 60, 12, 24, 0, 6, 3 }, /* SCIF4 ERI, RXI, BRI, TXI */
{ 60, 12, 16, 0, 7, 3 }, /* SCIF5 ERI, RXI, BRI, TXI */
};
void __init init_IRQ_intc2(void)
{
make_intc2_irq(intc2_irq_table, ARRAY_SIZE(intc2_irq_table));
}

46
arch/sh/kernel/crash_dump.c Normal file
View File

@ -0,0 +1,46 @@
/*
* crash_dump.c - Memory preserving reboot related code.
*
* Created by: Hariprasad Nellitheertha (hari@in.ibm.com)
* Copyright (C) IBM Corporation, 2004. All rights reserved
*/
#include <linux/errno.h>
#include <linux/crash_dump.h>
#include <linux/io.h>
#include <asm/uaccess.h>
/**
* copy_oldmem_page - copy one page from "oldmem"
* @pfn: page frame number to be copied
* @buf: target memory address for the copy; this can be in kernel address
* space or user address space (see @userbuf)
* @csize: number of bytes to copy
* @offset: offset in bytes into the page (based on pfn) to begin the copy
* @userbuf: if set, @buf is in user address space, use copy_to_user(),
* otherwise @buf is in kernel address space, use memcpy().
*
* Copy a page from "oldmem". For this page, there is no pte mapped
* in the current kernel. We stitch up a pte, similar to kmap_atomic.
*/
ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
size_t csize, unsigned long offset, int userbuf)
{
void *vaddr;
if (!csize)
return 0;
vaddr = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
if (userbuf) {
if (copy_to_user(buf, (vaddr + offset), csize)) {
iounmap(vaddr);
return -EFAULT;
}
} else
memcpy(buf, (vaddr + offset), csize);
iounmap(vaddr);
return csize;
}

5
arch/sh/kernel/irq.c
View File

@ -13,6 +13,7 @@
#include <linux/seq_file.h>
#include <linux/irq.h>
#include <asm/processor.h>
#include <asm/machvec.h>
#include <asm/uaccess.h>
#include <asm/thread_info.h>
#include <asm/cpu/mmu_context.h>
@ -44,7 +45,7 @@ int show_interrupts(struct seq_file *p, void *v)
seq_putc(p, '\n');
}
if (i < NR_IRQS) {
if (i < sh_mv.mv_nr_irqs) {
spin_lock_irqsave(&irq_desc[i].lock, flags);
action = irq_desc[i].action;
if (!action)
@ -61,7 +62,7 @@ int show_interrupts(struct seq_file *p, void *v)
seq_putc(p, '\n');
unlock:
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
} else if (i == NR_IRQS)
} else if (i == sh_mv.mv_nr_irqs)
seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
return 0;

490
arch/sh/kernel/kgdb_stub.c
View File

@ -6,11 +6,11 @@
* David Grothe <dave@gcom.com>, Tigran Aivazian <tigran@sco.com>,
* Amit S. Kale <akale@veritas.com>, William Gatliff <bgat@open-widgets.com>,
* Ben Lee, Steve Chamberlain and Benoit Miller <fulg@iname.com>.
*
*
* This version by Henry Bell <henry.bell@st.com>
* Minor modifications by Jeremy Siegel <jsiegel@mvista.com>
*
* Contains low-level support for remote debug using GDB.
*
* Contains low-level support for remote debug using GDB.
*
* To enable debugger support, two things need to happen. A call to
* set_debug_traps() is necessary in order to allow any breakpoints
@ -48,7 +48,7 @@
* k kill (Detach GDB)
*
* d Toggle debug flag
* D Detach GDB
* D Detach GDB
*
* Hct Set thread t for operations, OK or ENN
* c = 'c' (step, cont), c = 'g' (other
@ -58,7 +58,7 @@
* qfThreadInfo Get list of current threads (first) m<id>
* qsThreadInfo " " " " " (subsequent)
* qOffsets Get section offsets Text=x;Data=y;Bss=z
*
*
* TXX Find if thread XX is alive OK or ENN
* ? What was the last sigval ? SNN (signal NN)
* O Output to GDB console
@ -74,7 +74,7 @@
* '$' or '#'. If <data> starts with two characters followed by
* ':', then the existing stubs interpret this as a sequence number.
*
* CSUM1 and CSUM2 are ascii hex representation of an 8-bit
* CSUM1 and CSUM2 are ascii hex representation of an 8-bit
* checksum of <data>, the most significant nibble is sent first.
* the hex digits 0-9,a-f are used.
*
@ -86,8 +86,8 @@
* Responses can be run-length encoded to save space. A '*' means that
* the next character is an ASCII encoding giving a repeat count which
* stands for that many repititions of the character preceding the '*'.
* The encoding is n+29, yielding a printable character where n >=3
* (which is where RLE starts to win). Don't use an n > 126.
* The encoding is n+29, yielding a printable character where n >=3
* (which is where RLE starts to win). Don't use an n > 126.
*
* So "0* " means the same as "0000".
*/
@ -100,12 +100,10 @@
#include <linux/delay.h>
#include <linux/linkage.h>
#include <linux/init.h>
#ifdef CONFIG_SH_KGDB_CONSOLE
#include <linux/console.h>
#endif
#include <linux/sysrq.h>
#include <asm/system.h>
#include <asm/cacheflush.h>
#include <asm/current.h>
#include <asm/signal.h>
#include <asm/pgtable.h>
@ -153,7 +151,6 @@ char kgdb_in_gdb_mode;
char in_nmi; /* Set during NMI to prevent reentry */
int kgdb_nofault; /* Boolean to ignore bus errs (i.e. in GDB) */
int kgdb_enabled = 1; /* Default to enabled, cmdline can disable */
int kgdb_halt;
/* Exposed for user access */
struct task_struct *kgdb_current;
@ -246,14 +243,6 @@ static char out_buffer[OUTBUFMAX];
static void kgdb_to_gdb(const char *s);
#ifdef CONFIG_KGDB_THREAD
static struct task_struct *trapped_thread;
static struct task_struct *current_thread;
typedef unsigned char threadref[8];
#define BUF_THREAD_ID_SIZE 16
#endif
/* Convert ch to hex */
static int hex(const char ch)
{
@ -328,7 +317,7 @@ static int hex_to_int(char **ptr, int *int_value)
}
/* Copy the binary array pointed to by buf into mem. Fix $, #,
and 0x7d escaped with 0x7d. Return a pointer to the character
and 0x7d escaped with 0x7d. Return a pointer to the character
after the last byte written. */
static char *ebin_to_mem(const char *buf, char *mem, int count)
{
@ -349,66 +338,6 @@ static char *pack_hex_byte(char *pkt, int byte)
return pkt;
}
#ifdef CONFIG_KGDB_THREAD
/* Pack a thread ID */
static char *pack_threadid(char *pkt, threadref * id)
{
char *limit;
unsigned char *altid;
altid = (unsigned char *) id;
limit = pkt + BUF_THREAD_ID_SIZE;
while (pkt < limit)
pkt = pack_hex_byte(pkt, *altid++);
return pkt;
}
/* Convert an integer into our threadref */
static void int_to_threadref(threadref * id, const int value)
{
unsigned char *scan = (unsigned char *) id;
int i = 4;
while (i--)
*scan++ = 0;
*scan++ = (value >> 24) & 0xff;
*scan++ = (value >> 16) & 0xff;
*scan++ = (value >> 8) & 0xff;
*scan++ = (value & 0xff);
}
/* Return a task structure ptr for a particular pid */
static struct task_struct *get_thread(int pid)
{
struct task_struct *thread;
/* Use PID_MAX w/gdb for pid 0 */
if (pid == PID_MAX) pid = 0;
/* First check via PID */
thread = find_task_by_pid(pid);
if (thread)
return thread;
/* Start at the start */
thread = init_tasks[0];
/* Walk along the linked list of tasks */
do {
if (thread->pid == pid)
return thread;
thread = thread->next_task;
} while (thread != init_tasks[0]);
return NULL;
}
#endif /* CONFIG_KGDB_THREAD */
/* Scan for the start char '$', read the packet and check the checksum */
static void get_packet(char *buffer, int buflen)
{
@ -452,7 +381,7 @@ static void get_packet(char *buffer, int buflen)
/* Ack successful transfer */
put_debug_char('+');
/* If a sequence char is present, reply
/* If a sequence char is present, reply
the sequence ID */
if (buffer[2] == ':') {
put_debug_char(buffer[0]);
@ -611,74 +540,6 @@ static void gdb_regs_to_kgdb_regs(const int *gdb_regs,
regs->vbr = gdb_regs[VBR];
}
#ifdef CONFIG_KGDB_THREAD
/* Make a local copy of registers from the specified thread */
asmlinkage void ret_from_fork(void);
static void thread_regs_to_gdb_regs(const struct task_struct *thread,
int *gdb_regs)
{
int regno;
int *tregs;
/* Initialize to zero */
for (regno = 0; regno < MAXREG; regno++)
gdb_regs[regno] = 0;
/* Just making sure... */
if (thread == NULL)
return;
/* A new fork has pt_regs on the stack from a fork() call */
if (thread->thread.pc == (unsigned long)ret_from_fork) {
int vbr_val;
struct pt_regs *kregs;
kregs = (struct pt_regs*)thread->thread.sp;
gdb_regs[R0] = kregs->regs[R0];
gdb_regs[R1] = kregs->regs[R1];
gdb_regs[R2] = kregs->regs[R2];
gdb_regs[R3] = kregs->regs[R3];
gdb_regs[R4] = kregs->regs[R4];
gdb_regs[R5] = kregs->regs[R5];
gdb_regs[R6] = kregs->regs[R6];
gdb_regs[R7] = kregs->regs[R7];
gdb_regs[R8] = kregs->regs[R8];
gdb_regs[R9] = kregs->regs[R9];
gdb_regs[R10] = kregs->regs[R10];
gdb_regs[R11] = kregs->regs[R11];
gdb_regs[R12] = kregs->regs[R12];
gdb_regs[R13] = kregs->regs[R13];
gdb_regs[R14] = kregs->regs[R14];
gdb_regs[R15] = kregs->regs[R15];
gdb_regs[PC] = kregs->pc;
gdb_regs[PR] = kregs->pr;
gdb_regs[GBR] = kregs->gbr;
gdb_regs[MACH] = kregs->mach;
gdb_regs[MACL] = kregs->macl;
gdb_regs[SR] = kregs->sr;
asm("stc vbr, %0":"=r"(vbr_val));
gdb_regs[VBR] = vbr_val;
return;
}
/* Otherwise, we have only some registers from switch_to() */
tregs = (int *)thread->thread.sp;
gdb_regs[R15] = (int)tregs;
gdb_regs[R14] = *tregs++;
gdb_regs[R13] = *tregs++;
gdb_regs[R12] = *tregs++;
gdb_regs[R11] = *tregs++;
gdb_regs[R10] = *tregs++;
gdb_regs[R9] = *tregs++;
gdb_regs[R8] = *tregs++;
gdb_regs[PR] = *tregs++;
gdb_regs[GBR] = *tregs++;
gdb_regs[PC] = thread->thread.pc;
}
#endif /* CONFIG_KGDB_THREAD */
/* Calculate the new address for after a step */
static short *get_step_address(void)
{
@ -759,7 +620,7 @@ static short *get_step_address(void)
return (short *) addr;
}
/* Set up a single-step. Replace the instruction immediately after the
/* Set up a single-step. Replace the instruction immediately after the
current instruction (i.e. next in the expected flow of control) with a
trap instruction, so that returning will cause only a single instruction
to be executed. Note that this model is slightly broken for instructions
@ -797,37 +658,11 @@ static void undo_single_step(void)
/* Send a signal message */
static void send_signal_msg(const int signum)
{
#ifndef CONFIG_KGDB_THREAD
out_buffer[0] = 'S';
out_buffer[1] = highhex(signum);
out_buffer[2] = lowhex(signum);
out_buffer[3] = 0;
put_packet(out_buffer);
#else /* CONFIG_KGDB_THREAD */
int threadid;
threadref thref;
char *out = out_buffer;
const char *tstring = "thread";
*out++ = 'T';
*out++ = highhex(signum);
*out++ = lowhex(signum);
while (*tstring) {
*out++ = *tstring++;
}
*out++ = ':';
threadid = trapped_thread->pid;
if (threadid == 0) threadid = PID_MAX;
int_to_threadref(&thref, threadid);
pack_threadid(out, &thref);
out += BUF_THREAD_ID_SIZE;
*out++ = ';';
*out = 0;
put_packet(out_buffer);
#endif /* CONFIG_KGDB_THREAD */
}
/* Reply that all was well */
@ -962,15 +797,7 @@ static void step_with_sig_msg(void)
/* Send register contents */
static void send_regs_msg(void)
{
#ifdef CONFIG_KGDB_THREAD
if (!current_thread)
kgdb_regs_to_gdb_regs(&trap_registers, registers);
else
thread_regs_to_gdb_regs(current_thread, registers);
#else
kgdb_regs_to_gdb_regs(&trap_registers, registers);
#endif
mem_to_hex((char *) registers, out_buffer, NUMREGBYTES);
put_packet(out_buffer);
}
@ -978,201 +805,13 @@ static void send_regs_msg(void)
/* Set register contents - currently can't set other thread's registers */
static void set_regs_msg(void)
{
#ifdef CONFIG_KGDB_THREAD
if (!current_thread) {
#endif
kgdb_regs_to_gdb_regs(&trap_registers, registers);
hex_to_mem(&in_buffer[1], (char *) registers, NUMREGBYTES);
gdb_regs_to_kgdb_regs(registers, &trap_registers);
send_ok_msg();
#ifdef CONFIG_KGDB_THREAD
} else
send_err_msg();
#endif
kgdb_regs_to_gdb_regs(&trap_registers, registers);
hex_to_mem(&in_buffer[1], (char *) registers, NUMREGBYTES);
gdb_regs_to_kgdb_regs(registers, &trap_registers);
send_ok_msg();
}
#ifdef CONFIG_KGDB_THREAD
/* Set the status for a thread */
void set_thread_msg(void)
{
int threadid;
struct task_struct *thread = NULL;
char *ptr;
switch (in_buffer[1]) {
/* To select which thread for gG etc messages, i.e. supported */
case 'g':
ptr = &in_buffer[2];
hex_to_int(&ptr, &threadid);
thread = get_thread(threadid);
/* If we haven't found it */
if (!thread) {
send_err_msg();
break;
}
/* Set current_thread (or not) */
if (thread == trapped_thread)
current_thread = NULL;
else
current_thread = thread;
send_ok_msg();
break;
/* To select which thread for cCsS messages, i.e. unsupported */
case 'c':
send_ok_msg();
break;
default:
send_empty_msg();
break;
}
}
/* Is a thread alive? */
static void thread_status_msg(void)
{
char *ptr;
int threadid;
struct task_struct *thread = NULL;
ptr = &in_buffer[1];
hex_to_int(&ptr, &threadid);
thread = get_thread(threadid);
if (thread)
send_ok_msg();
else
send_err_msg();
}
/* Send the current thread ID */
static void thread_id_msg(void)
{
int threadid;
threadref thref;
out_buffer[0] = 'Q';
out_buffer[1] = 'C';
if (current_thread)
threadid = current_thread->pid;
else if (trapped_thread)
threadid = trapped_thread->pid;
else /* Impossible, but just in case! */
{
send_err_msg();
return;
}
/* Translate pid 0 to PID_MAX for gdb */
if (threadid == 0) threadid = PID_MAX;
int_to_threadref(&thref, threadid);
pack_threadid(out_buffer + 2, &thref);
out_buffer[2 + BUF_THREAD_ID_SIZE] = '\0';
put_packet(out_buffer);
}
/* Send thread info */
static void thread_info_msg(void)
{
struct task_struct *thread = NULL;
int threadid;
char *pos;
threadref thref;
/* Start with 'm' */
out_buffer[0] = 'm';
pos = &out_buffer[1];
/* For all possible thread IDs - this will overrun if > 44 threads! */
/* Start at 1 and include PID_MAX (since GDB won't use pid 0...) */
for (threadid = 1; threadid <= PID_MAX; threadid++) {
read_lock(&tasklist_lock);
thread = get_thread(threadid);
read_unlock(&tasklist_lock);
/* If it's a valid thread */
if (thread) {
int_to_threadref(&thref, threadid);
pack_threadid(pos, &thref);
pos += BUF_THREAD_ID_SIZE;
*pos++ = ',';
}
}
*--pos = 0; /* Lose final comma */
put_packet(out_buffer);
}
/* Return printable info for gdb's 'info threads' command */
static void thread_extra_info_msg(void)
{
int threadid;
struct task_struct *thread = NULL;
char buffer[20], *ptr;
int i;
/* Extract thread ID */
ptr = &in_buffer[17];
hex_to_int(&ptr, &threadid);
thread = get_thread(threadid);
/* If we don't recognise it, say so */
if (thread == NULL)
strcpy(buffer, "(unknown)");
else
strcpy(buffer, thread->comm);
/* Construct packet */
for (i = 0, ptr = out_buffer; buffer[i]; i++)
ptr = pack_hex_byte(ptr, buffer[i]);
if (thread->thread.pc == (unsigned long)ret_from_fork) {
strcpy(buffer, "<new fork>");
for (i = 0; buffer[i]; i++)
ptr = pack_hex_byte(ptr, buffer[i]);
}
*ptr = '\0';
put_packet(out_buffer);
}
/* Handle all qFooBarBaz messages - have to use an if statement as
opposed to a switch because q messages can have > 1 char id. */
static void query_msg(void)
{
const char *q_start = &in_buffer[1];
/* qC = return current thread ID */
if (strncmp(q_start, "C", 1) == 0)
thread_id_msg();
/* qfThreadInfo = query all threads (first) */
else if (strncmp(q_start, "fThreadInfo", 11) == 0)
thread_info_msg();
/* qsThreadInfo = query all threads (subsequent). We know we have sent
them all after the qfThreadInfo message, so there are no to send */
else if (strncmp(q_start, "sThreadInfo", 11) == 0)
put_packet("l"); /* el = last */
/* qThreadExtraInfo = supply printable information per thread */
else if (strncmp(q_start, "ThreadExtraInfo", 15) == 0)
thread_extra_info_msg();
/* Unsupported - empty message as per spec */
else
send_empty_msg();
}
#endif /* CONFIG_KGDB_THREAD */
#ifdef CONFIG_SH_KGDB_CONSOLE
/*
* Bring up the ports..
*/
@ -1185,6 +824,9 @@ static int kgdb_serial_setup(void)
return 0;
}
#else
#define kgdb_serial_setup() 0
#endif
/* The command loop, read and act on requests */
static void kgdb_command_loop(const int excep_code, const int trapa_value)
@ -1193,7 +835,7 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
if (excep_code == NMI_VEC) {
#ifndef CONFIG_KGDB_NMI
KGDB_PRINTK("Ignoring unexpected NMI?\n");
printk(KERN_NOTICE "KGDB: Ignoring unexpected NMI?\n");
return;
#else /* CONFIG_KGDB_NMI */
if (!kgdb_enabled) {
@ -1207,19 +849,10 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
if (!kgdb_enabled)
return;
#ifdef CONFIG_KGDB_THREAD
/* Until GDB specifies a thread */
current_thread = NULL;
trapped_thread = current;
#endif
/* Enter GDB mode (e.g. after detach) */
if (!kgdb_in_gdb_mode) {
/* Do serial setup, notify user, issue preemptive ack */
kgdb_serial_setup();
KGDB_PRINTK("Waiting for GDB (on %s%d at %d baud)\n",
(kgdb_porttype ? kgdb_porttype->name : ""),
kgdb_portnum, kgdb_baud);
printk(KERN_NOTICE "KGDB: Waiting for GDB\n");
kgdb_in_gdb_mode = 1;
put_debug_char('+');
}
@ -1233,21 +866,18 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
will later be replaced by its original one. Do NOT do this for
trap 0xff, since that indicates a compiled-in breakpoint which
will not be replaced (and we would retake the trap forever) */
if ((excep_code == TRAP_VEC) && (trapa_value != (0xff << 2))) {
if ((excep_code == TRAP_VEC) && (trapa_value != (0x3c << 2)))
trap_registers.pc -= 2;
}
/* Undo any stepping we may have done */
undo_single_step();
while (1) {
out_buffer[0] = 0;
get_packet(in_buffer, BUFMAX);
/* Examine first char of buffer to see what we need to do */
switch (in_buffer[0]) {
case '?': /* Send which signal we've received */
send_signal_msg(sigval);
break;
@ -1291,21 +921,6 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
step_msg();
return;
#ifdef CONFIG_KGDB_THREAD
case 'H': /* Task related */
set_thread_msg();
break;
case 'T': /* Query thread status */
thread_status_msg();
break;
case 'q': /* Handle query - currently thread-related */
query_msg();
break;
#endif
case 'k': /* 'Kill the program' with a kernel ? */
break;
@ -1323,11 +938,8 @@ static void kgdb_command_loop(const int excep_code, const int trapa_value)
}
/* There has been an exception, most likely a breakpoint. */
asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs)
static void handle_exception(struct pt_regs *regs)
{
struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
int excep_code, vbr_val;
int count;
int trapa_value = ctrl_inl(TRA);
@ -1355,7 +967,7 @@ asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5,
kgdb_trapa_val = trapa_value;
/* Act on the exception */
kgdb_command_loop(excep_code >> 5, trapa_value);
kgdb_command_loop(excep_code, trapa_value);
kgdb_current = NULL;
@ -1373,14 +985,12 @@ asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5,
asm("ldc %0, vbr": :"r"(vbr_val));
}
/* Trigger a breakpoint by function */
void breakpoint(void)
asmlinkage void kgdb_handle_exception(unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7,
struct pt_regs __regs)
{
if (!kgdb_enabled) {
kgdb_enabled = 1;
kgdb_init();
}
BREAKPOINT();
struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
handle_exception(regs);
}
/* Initialise the KGDB data structures and serial configuration */
@ -1395,24 +1005,16 @@ int kgdb_init(void)
kgdb_in_gdb_mode = 0;
if (kgdb_serial_setup() != 0) {
KGDB_PRINTK("serial setup error\n");
printk(KERN_NOTICE "KGDB: serial setup error\n");
return -1;
}
/* Init ptr to exception handler */
kgdb_debug_hook = kgdb_handle_exception;
kgdb_debug_hook = handle_exception;
kgdb_bus_err_hook = kgdb_handle_bus_error;
/* Enter kgdb now if requested, or just report init done */
if (kgdb_halt) {
kgdb_in_gdb_mode = 1;
put_debug_char('+');
breakpoint();
}
else
{
KGDB_PRINTK("stub is initialized.\n");
}
printk(KERN_NOTICE "KGDB: stub is initialized.\n");
return 0;
}
@ -1437,7 +1039,7 @@ static void kgdb_msg_write(const char *s, unsigned count)
/* Calculate how many this time */
wcount = (count > MAXOUT) ? MAXOUT : count;
/* Pack in hex chars */
for (i = 0; i < wcount; i++)
bufptr = pack_hex_byte(bufptr, s[i]);
@ -1467,3 +1069,25 @@ void kgdb_console_write(struct console *co, const char *s, unsigned count)
kgdb_msg_write(s, count);
}
#endif
#ifdef CONFIG_KGDB_SYSRQ
static void sysrq_handle_gdb(int key, struct tty_struct *tty)
{
printk("Entering GDB stub\n");
breakpoint();
}
static struct sysrq_key_op sysrq_gdb_op = {
.handler = sysrq_handle_gdb,
.help_msg = "Gdb",
.action_msg = "GDB",
};
static int gdb_register_sysrq(void)
{
printk("Registering GDB sysrq handler\n");
register_sysrq_key('g', &sysrq_gdb_op);
return 0;
}
module_init(gdb_register_sysrq);
#endif

29
arch/sh/kernel/machine_kexec.c
View File

@ -59,13 +59,13 @@ static void kexec_info(struct kimage *image)
printk(" segment[%d]: 0x%08x - 0x%08x (0x%08x)\n",
i,
(unsigned int)image->segment[i].mem,
(unsigned int)image->segment[i].mem + image->segment[i].memsz,
(unsigned int)image->segment[i].mem +
image->segment[i].memsz,
(unsigned int)image->segment[i].memsz);
}
}
printk(" start : 0x%08x\n\n", (unsigned int)image->start);
}
/*
* Do not allocate memory (or fail in any way) in machine_kexec().
* We are past the point of no return, committed to rebooting now.
@ -101,6 +101,27 @@ NORET_TYPE void machine_kexec(struct kimage *image)
/* now call it */
rnk = (relocate_new_kernel_t) reboot_code_buffer;
(*rnk)(page_list, reboot_code_buffer, image->start, vbr_reg);
(*rnk)(page_list, reboot_code_buffer, image->start, vbr_reg);
}
/* crashkernel=size@addr specifies the location to reserve for
* a crash kernel. By reserving this memory we guarantee
* that linux never sets it up as a DMA target.
* Useful for holding code to do something appropriate
* after a kernel panic.
*/
static int __init parse_crashkernel(char *arg)
{
unsigned long size, base;
size = memparse(arg, &arg);
if (*arg == '@') {
base = memparse(arg+1, &arg);
/* FIXME: Do I want a sanity check
* to validate the memory range?
*/
crashk_res.start = base;
crashk_res.end = base + size - 1;
}
return 0;
}
early_param("crashkernel", parse_crashkernel);

14
arch/sh/kernel/process.c
View File

@ -7,7 +7,7 @@
*
* SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
* Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC
* Copyright (C) 2002 - 2006 Paul Mundt
* Copyright (C) 2002 - 2007 Paul Mundt
*/
#include <linux/module.h>
#include <linux/mm.h>
@ -15,6 +15,7 @@
#include <linux/pm.h>
#include <linux/kallsyms.h>
#include <linux/kexec.h>
#include <asm/kdebug.h>
#include <asm/uaccess.h>
#include <asm/mmu_context.h>
#include <asm/ubc.h>
@ -299,7 +300,8 @@ static void ubc_set_tracing(int asid, unsigned long pc)
ctrl_outl(0, UBC_BAMRA);
if (current_cpu_data.type == CPU_SH7729 ||
current_cpu_data.type == CPU_SH7710) {
current_cpu_data.type == CPU_SH7710 ||
current_cpu_data.type == CPU_SH7712) {
ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR);
} else {
@ -495,6 +497,10 @@ asmlinkage void debug_trap_handler(unsigned long r4, unsigned long r5,
/* Rewind */
regs->pc -= 2;
if (notify_die(DIE_TRAP, regs, regs->tra & 0xff,
SIGTRAP) == NOTIFY_STOP)
return;
force_sig(SIGTRAP, current);
}
@ -510,6 +516,10 @@ asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5,
/* Rewind */
regs->pc -= 2;
if (notify_die(DIE_TRAP, regs, TRAPA_BUG_OPCODE & 0xff,
SIGTRAP) == NOTIFY_STOP)
return;
#ifdef CONFIG_BUG
if (__kernel_text_address(instruction_pointer(regs))) {
u16 insn = *(u16 *)instruction_pointer(regs);

311
arch/sh/kernel/setup.c
View File

@ -4,7 +4,7 @@
* This file handles the architecture-dependent parts of initialization
*
* Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2002 - 2006 Paul Mundt
* Copyright (C) 2002 - 2007 Paul Mundt
*/
#include <linux/screen_info.h>
#include <linux/ioport.h>
@ -15,21 +15,22 @@
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/utsname.h>
#include <linux/nodemask.h>
#include <linux/cpu.h>
#include <linux/pfn.h>
#include <linux/fs.h>
#include <linux/mm.h>
#include <linux/kexec.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/sections.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/clock.h>
#include <asm/mmu_context.h>
#ifdef CONFIG_SH_KGDB
#include <asm/kgdb.h>
static int kgdb_parse_options(char *options);
#endif
extern void * __rd_start, * __rd_end;
/*
* Machine setup..
*/
@ -205,13 +206,117 @@ static int __init sh_mv_setup(char **cmdline_p)
return 0;
}
void __init setup_arch(char **cmdline_p)
/*
* Register fully available low RAM pages with the bootmem allocator.
*/
static void __init register_bootmem_low_pages(void)
{
unsigned long curr_pfn, last_pfn, pages;
/*
* We are rounding up the start address of usable memory:
*/
curr_pfn = PFN_UP(__MEMORY_START);
/*
* ... and at the end of the usable range downwards:
*/
last_pfn = PFN_DOWN(__pa(memory_end));
if (last_pfn > max_low_pfn)
last_pfn = max_low_pfn;
pages = last_pfn - curr_pfn;
free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(pages));
}
void __init setup_bootmem_allocator(unsigned long start_pfn)
{
unsigned long bootmap_size;
unsigned long start_pfn, max_pfn, max_low_pfn;
/*
* Find a proper area for the bootmem bitmap. After this
* bootstrap step all allocations (until the page allocator
* is intact) must be done via bootmem_alloc().
*/
bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
min_low_pfn, max_low_pfn);
register_bootmem_low_pages();
node_set_online(0);
/*
* Reserve the kernel text and
* Reserve the bootmem bitmap. We do this in two steps (first step
* was init_bootmem()), because this catches the (definitely buggy)
* case of us accidentally initializing the bootmem allocator with
* an invalid RAM area.
*/
reserve_bootmem(__MEMORY_START+PAGE_SIZE,
(PFN_PHYS(start_pfn)+bootmap_size+PAGE_SIZE-1)-__MEMORY_START);
/*
* reserve physical page 0 - it's a special BIOS page on many boxes,
* enabling clean reboots, SMP operation, laptop functions.
*/
reserve_bootmem(__MEMORY_START, PAGE_SIZE);
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
if (&__rd_start != &__rd_end) {
LOADER_TYPE = 1;
INITRD_START = PHYSADDR((unsigned long)&__rd_start) -
__MEMORY_START;
INITRD_SIZE = (unsigned long)&__rd_end -
(unsigned long)&__rd_start;
}
if (LOADER_TYPE && INITRD_START) {
if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
reserve_bootmem(INITRD_START + __MEMORY_START,
INITRD_SIZE);
initrd_start = INITRD_START + PAGE_OFFSET +
__MEMORY_START;
initrd_end = initrd_start + INITRD_SIZE;
} else {
printk("initrd extends beyond end of memory "
"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
INITRD_START + INITRD_SIZE,
max_low_pfn << PAGE_SHIFT);
initrd_start = 0;
}
}
#endif
#ifdef CONFIG_KEXEC
if (crashk_res.start != crashk_res.end)
reserve_bootmem(crashk_res.start,
crashk_res.end - crashk_res.start + 1);
#endif
}
#ifndef CONFIG_NEED_MULTIPLE_NODES
static void __init setup_memory(void)
{
unsigned long start_pfn;
/*
* Partially used pages are not usable - thus
* we are rounding upwards:
*/
start_pfn = PFN_UP(__pa(_end));
setup_bootmem_allocator(start_pfn);
}
#else
extern void __init setup_memory(void);
#endif
void __init setup_arch(char **cmdline_p)
{
enable_mmu();
#ifdef CONFIG_CMDLINE_BOOL
strcpy(COMMAND_LINE, CONFIG_CMDLINE);
strcpy(COMMAND_LINE, CONFIG_CMDLINE);
#endif
ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
@ -229,14 +334,15 @@ void __init setup_arch(char **cmdline_p)
init_mm.end_data = (unsigned long) _edata;
init_mm.brk = (unsigned long) _end;
code_resource.start = (unsigned long)virt_to_phys(_text);
code_resource.end = (unsigned long)virt_to_phys(_etext)-1;
data_resource.start = (unsigned long)virt_to_phys(_etext);
data_resource.end = (unsigned long)virt_to_phys(_edata)-1;
code_resource.start = virt_to_phys(_text);
code_resource.end = virt_to_phys(_etext)-1;
data_resource.start = virt_to_phys(_etext);
data_resource.end = virt_to_phys(_edata)-1;
parse_early_param();
sh_mv_setup(cmdline_p);
/*
* Find the highest page frame number we have available
*/
@ -246,87 +352,12 @@ void __init setup_arch(char **cmdline_p)
* Determine low and high memory ranges:
*/
max_low_pfn = max_pfn;
min_low_pfn = __MEMORY_START >> PAGE_SHIFT;
/*
* Partially used pages are not usable - thus
* we are rounding upwards:
*/
start_pfn = PFN_UP(__pa(_end));
/*
* Find a proper area for the bootmem bitmap. After this
* bootstrap step all allocations (until the page allocator
* is intact) must be done via bootmem_alloc().
*/
bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
__MEMORY_START>>PAGE_SHIFT,
max_low_pfn);
/*
* Register fully available low RAM pages with the bootmem allocator.
*/
{
unsigned long curr_pfn, last_pfn, pages;
/*
* We are rounding up the start address of usable memory:
*/
curr_pfn = PFN_UP(__MEMORY_START);
/*
* ... and at the end of the usable range downwards:
*/
last_pfn = PFN_DOWN(__pa(memory_end));
if (last_pfn > max_low_pfn)
last_pfn = max_low_pfn;
pages = last_pfn - curr_pfn;
free_bootmem_node(NODE_DATA(0), PFN_PHYS(curr_pfn),
PFN_PHYS(pages));
}
/*
* Reserve the kernel text and
* Reserve the bootmem bitmap. We do this in two steps (first step
* was init_bootmem()), because this catches the (definitely buggy)
* case of us accidentally initializing the bootmem allocator with
* an invalid RAM area.
*/
reserve_bootmem_node(NODE_DATA(0), __MEMORY_START+PAGE_SIZE,
(PFN_PHYS(start_pfn)+bootmap_size+PAGE_SIZE-1)-__MEMORY_START);
/*
* reserve physical page 0 - it's a special BIOS page on many boxes,
* enabling clean reboots, SMP operation, laptop functions.
*/
reserve_bootmem_node(NODE_DATA(0), __MEMORY_START, PAGE_SIZE);
#ifdef CONFIG_BLK_DEV_INITRD
ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
if (&__rd_start != &__rd_end) {
LOADER_TYPE = 1;
INITRD_START = PHYSADDR((unsigned long)&__rd_start) -
__MEMORY_START;
INITRD_SIZE = (unsigned long)&__rd_end -
(unsigned long)&__rd_start;
}
if (LOADER_TYPE && INITRD_START) {
if (INITRD_START + INITRD_SIZE <= (max_low_pfn << PAGE_SHIFT)) {
reserve_bootmem_node(NODE_DATA(0), INITRD_START +
__MEMORY_START, INITRD_SIZE);
initrd_start = INITRD_START + PAGE_OFFSET +
__MEMORY_START;
initrd_end = initrd_start + INITRD_SIZE;
} else {
printk("initrd extends beyond end of memory "
"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
INITRD_START + INITRD_SIZE,
max_low_pfn << PAGE_SHIFT);
initrd_start = 0;
}
}
#endif
nodes_clear(node_online_map);
setup_memory();
paging_init();
sparse_init();
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
@ -335,8 +366,6 @@ void __init setup_arch(char **cmdline_p)
/* Perform the machine specific initialisation */
if (likely(sh_mv.mv_setup))
sh_mv.mv_setup(cmdline_p);
paging_init();
}
struct sh_machine_vector* __init get_mv_byname(const char* name)
@ -380,6 +409,7 @@ static const char *cpu_name[] = {
[CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
[CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
[CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
[CPU_SH7712] = "SH7712",
[CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750",
[CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R",
[CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R",
@ -477,7 +507,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
c->loops_per_jiffy/(500000/HZ),
(c->loops_per_jiffy/(5000/HZ)) % 100);
return show_clocks(m);
return 0;
}
static void *c_start(struct seq_file *m, loff_t *pos)
@ -499,92 +529,3 @@ struct seq_operations cpuinfo_op = {
.show = show_cpuinfo,
};
#endif /* CONFIG_PROC_FS */
#ifdef CONFIG_SH_KGDB
/*
* Parse command-line kgdb options. By default KGDB is enabled,
* entered on error (or other action) using default serial info.
* The command-line option can include a serial port specification
* and an action to override default or configured behavior.
*/
struct kgdb_sermap kgdb_sci_sermap =
{ "ttySC", 5, kgdb_sci_setup, NULL };
struct kgdb_sermap *kgdb_serlist = &kgdb_sci_sermap;
struct kgdb_sermap *kgdb_porttype = &kgdb_sci_sermap;
void kgdb_register_sermap(struct kgdb_sermap *map)
{
struct kgdb_sermap *last;
for (last = kgdb_serlist; last->next; last = last->next)
;
last->next = map;
if (!map->namelen) {
map->namelen = strlen(map->name);
}
}
static int __init kgdb_parse_options(char *options)
{
char c;
int baud;
/* Check for port spec (or use default) */
/* Determine port type and instance */
if (!memcmp(options, "tty", 3)) {
struct kgdb_sermap *map = kgdb_serlist;
while (map && memcmp(options, map->name, map->namelen))
map = map->next;
if (!map) {
KGDB_PRINTK("unknown port spec in %s\n", options);
return -1;
}
kgdb_porttype = map;
kgdb_serial_setup = map->setup_fn;
kgdb_portnum = options[map->namelen] - '0';
options += map->namelen + 1;
options = (*options == ',') ? options+1 : options;
/* Read optional parameters (baud/parity/bits) */
baud = simple_strtoul(options, &options, 10);
if (baud != 0) {
kgdb_baud = baud;
c = toupper(*options);
if (c == 'E' || c == 'O' || c == 'N') {
kgdb_parity = c;
options++;
}
c = *options;
if (c == '7' || c == '8') {
kgdb_bits = c;
options++;
}
options = (*options == ',') ? options+1 : options;
}
}
/* Check for action specification */
if (!memcmp(options, "halt", 4)) {
kgdb_halt = 1;
options += 4;
} else if (!memcmp(options, "disabled", 8)) {
kgdb_enabled = 0;
options += 8;
}
if (*options) {
KGDB_PRINTK("ignored unknown options: %s\n", options);
return 0;
}
return 1;
}
__setup("kgdb=", kgdb_parse_options);
#endif /* CONFIG_SH_KGDB */

1
arch/sh/kernel/sh_ksyms.c
View File

@ -65,7 +65,6 @@ EXPORT_SYMBOL(__div64_32);
/* These symbols are generated by the compiler itself */
DECLARE_EXPORT(__udivsi3);
DECLARE_EXPORT(__udivdi3);
DECLARE_EXPORT(__sdivsi3);
DECLARE_EXPORT(__ashrdi3);
DECLARE_EXPORT(__ashldi3);

4
arch/sh/kernel/timers/timer-tmu.c
View File

@ -148,7 +148,9 @@ static int tmu_timer_init(void)
/* Start TMU0 */
tmu_timer_stop();
#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && !defined(CONFIG_CPU_SUBTYPE_SH7760)
#if !defined(CONFIG_CPU_SUBTYPE_SH7300) && \
!defined(CONFIG_CPU_SUBTYPE_SH7760) && \
!defined(CONFIG_CPU_SUBTYPE_SH7785)
ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
#endif

73
arch/sh/kernel/traps.c
View File

@ -5,7 +5,7 @@
* SuperH version: Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2000 Philipp Rumpf
* Copyright (C) 2000 David Howells
* Copyright (C) 2002 - 2006 Paul Mundt
* Copyright (C) 2002 - 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@ -18,10 +18,12 @@
#include <linux/module.h>
#include <linux/kallsyms.h>
#include <linux/io.h>
#include <linux/bug.h>
#include <linux/debug_locks.h>
#include <linux/limits.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/kdebug.h>
#ifdef CONFIG_SH_KGDB
#include <asm/kgdb.h>
@ -74,7 +76,21 @@ static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
}
}
DEFINE_SPINLOCK(die_lock);
ATOMIC_NOTIFIER_HEAD(shdie_chain);
int register_die_notifier(struct notifier_block *nb)
{
return atomic_notifier_chain_register(&shdie_chain, nb);
}
EXPORT_SYMBOL(register_die_notifier);
int unregister_die_notifier(struct notifier_block *nb)
{
return atomic_notifier_chain_unregister(&shdie_chain, nb);
}
EXPORT_SYMBOL(unregister_die_notifier);
static DEFINE_SPINLOCK(die_lock);
void die(const char * str, struct pt_regs * regs, long err)
{
@ -130,40 +146,6 @@ static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
return -EFAULT;
}
#ifdef CONFIG_BUG
#ifdef CONFIG_DEBUG_BUGVERBOSE
static inline void do_bug_verbose(struct pt_regs *regs)
{
struct bug_frame f;
long len;
if (__copy_from_user(&f, (const void __user *)regs->pc,
sizeof(struct bug_frame)))
return;
len = __strnlen_user(f.file, PATH_MAX) - 1;
if (unlikely(len < 0 || len >= PATH_MAX))
f.file = "<bad filename>";
len = __strnlen_user(f.func, PATH_MAX) - 1;
if (unlikely(len < 0 || len >= PATH_MAX))
f.func = "<bad function>";
printk(KERN_ALERT "kernel BUG in %s() at %s:%d!\n",
f.func, f.file, f.line);
}
#else
static inline void do_bug_verbose(struct pt_regs *regs)
{
}
#endif /* CONFIG_DEBUG_BUGVERBOSE */
void handle_BUG(struct pt_regs *regs)
{
do_bug_verbose(regs);
die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff);
}
#endif /* CONFIG_BUG */
/*
* handle an instruction that does an unaligned memory access by emulating the
* desired behaviour
@ -888,6 +870,25 @@ void __init trap_init(void)
per_cpu_trap_init();
}
#ifdef CONFIG_BUG
void handle_BUG(struct pt_regs *regs)
{
enum bug_trap_type tt;
tt = report_bug(regs->pc);
if (tt == BUG_TRAP_TYPE_WARN) {
regs->pc += 2;
return;
}
die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff);
}
int is_valid_bugaddr(unsigned long addr)
{
return addr >= PAGE_OFFSET;
}
#endif
void show_trace(struct task_struct *tsk, unsigned long *sp,
struct pt_regs *regs)
{

47
arch/sh/kernel/vmlinux.lds.S
View File

@ -34,9 +34,11 @@ SECTIONS
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
_etext = .; /* End of text section */
RODATA
_etext = .; /* End of text section */
BUG_TABLE
.data : { /* Data */
*(.data)
@ -53,6 +55,10 @@ SECTIONS
. = ALIGN(PAGE_SIZE);
.data.page_aligned : { *(.data.page_aligned) }
__nosave_begin = .;
.data_nosave : { *(.data.nosave) }
. = ALIGN(PAGE_SIZE);
__nosave_end = .;
. = ALIGN(PAGE_SIZE);
__per_cpu_start = .;
@ -110,43 +116,10 @@ SECTIONS
* it's a module.
*/
/DISCARD/ : {
*(.exit.text)
*(.exit.data)
*(.exitcall.exit)
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging section are relative to the beginning
of the section so we begin .debug at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* These must appear regardless of . */
STABS_DEBUG
DWARF_DEBUG
}

4
arch/sh/lib/Makefile
View File

@ -3,11 +3,9 @@
#
lib-y = delay.o memset.o memmove.o memchr.o \
checksum.o strlen.o div64.o udivdi3.o \
div64-generic.o
checksum.o strlen.o div64.o div64-generic.o
memcpy-y := memcpy.o
memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o
lib-y += $(memcpy-y)

16
arch/sh/lib/udivdi3.c
View File

@ -1,16 +0,0 @@
/*
* Simple __udivdi3 function which doesn't use FPU.
*/
#include <linux/types.h>
extern u64 __xdiv64_32(u64 n, u32 d);
extern void panic(const char * fmt, ...);
u64 __udivdi3(u64 n, u64 d)
{
if (d & ~0xffffffff)
panic("Need true 64-bit/64-bit division");
return __xdiv64_32(n, (u32)d);
}

20
arch/sh/mm/Kconfig
View File

@ -67,6 +67,7 @@ config CPU_SUBTYPE_SH7300
config CPU_SUBTYPE_SH7705
bool "Support SH7705 processor"
select CPU_SH3
select CPU_HAS_IPR_IRQ
select CPU_HAS_PINT_IRQ
config CPU_SUBTYPE_SH7706
@ -101,9 +102,17 @@ config CPU_SUBTYPE_SH7709
config CPU_SUBTYPE_SH7710
bool "Support SH7710 processor"
select CPU_SH3
select CPU_HAS_IPR_IRQ
help
Select SH7710 if you have a SH3-DSP SH7710 CPU.
config CPU_SUBTYPE_SH7712
bool "Support SH7712 processor"
select CPU_SH3
select CPU_HAS_IPR_IRQ
help
Select SH7712 if you have a SH3-DSP SH7712 CPU.
comment "SH-4 Processor Support"
config CPU_SUBTYPE_SH7750
@ -283,6 +292,17 @@ config VSYSCALL
For systems with an MMU that can afford to give up a page,
(the default value) say Y.
config NODES_SHIFT
int
default "1"
depends on NEED_MULTIPLE_NODES
config ARCH_FLATMEM_ENABLE
def_bool y
config ARCH_POPULATES_NODE_MAP
def_bool y
choice
prompt "Kernel page size"
default PAGE_SIZE_4KB

39
arch/sh/mm/fault.c
View File

@ -2,7 +2,7 @@
* Page fault handler for SH with an MMU.
*
* Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2003 Paul Mundt
* Copyright (C) 2003 - 2007 Paul Mundt
*
* Based on linux/arch/i386/mm/fault.c:
* Copyright (C) 1995 Linus Torvalds
@ -15,12 +15,42 @@
#include <linux/mm.h>
#include <linux/hardirq.h>
#include <linux/kprobes.h>
#include <asm/kdebug.h>
#include <asm/system.h>
#include <asm/mmu_context.h>
#include <asm/tlbflush.h>
#include <asm/kgdb.h>
extern void die(const char *,struct pt_regs *,long);
#ifdef CONFIG_KPROBES
ATOMIC_NOTIFIER_HEAD(notify_page_fault_chain);
/* Hook to register for page fault notifications */
int register_page_fault_notifier(struct notifier_block *nb)
{
return atomic_notifier_chain_register(&notify_page_fault_chain, nb);
}
int unregister_page_fault_notifier(struct notifier_block *nb)
{
return atomic_notifier_chain_unregister(&notify_page_fault_chain, nb);
}
static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
int trap, int sig)
{
struct die_args args = {
.regs = regs,
.trapnr = trap,
};
return atomic_notifier_call_chain(&notify_page_fault_chain, val, &args);
}
#else
static inline int notify_page_fault(enum die_val val, struct pt_regs *regs,
int trap, int sig)
{
return NOTIFY_DONE;
}
#endif
/*
* This routine handles page faults. It determines the address,
@ -39,6 +69,11 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
siginfo_t info;
trace_hardirqs_on();
if (notify_page_fault(DIE_PAGE_FAULT, regs,
writeaccess, SIGSEGV) == NOTIFY_STOP)
return;
local_irq_enable();
#ifdef CONFIG_SH_KGDB

197
arch/sh/mm/init.c
View File

@ -1,37 +1,20 @@
/* $Id: init.c,v 1.19 2004/02/21 04:42:16 kkojima Exp $
*
* linux/arch/sh/mm/init.c
/*
* linux/arch/sh/mm/init.c
*
* Copyright (C) 1999 Niibe Yutaka
* Copyright (C) 2002, 2004 Paul Mundt
* Copyright (C) 2002 - 2007 Paul Mundt
*
* Based on linux/arch/i386/mm/init.c:
* Copyright (C) 1995 Linus Torvalds
*/
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/mman.h>
#include <linux/mm.h>
#include <linux/swap.h>
#include <linux/smp.h>
#include <linux/init.h>
#include <linux/highmem.h>
#include <linux/bootmem.h>
#include <linux/pagemap.h>
#include <linux/proc_fs.h>
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <linux/percpu.h>
#include <linux/io.h>
#include <asm/mmu_context.h>
#include <asm/io.h>
#include <asm/tlb.h>
#include <asm/cacheflush.h>
#include <asm/cache.h>
@ -39,37 +22,51 @@
DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
pgd_t swapper_pg_dir[PTRS_PER_PGD];
#ifdef CONFIG_MMU
/* It'd be good if these lines were in the standard header file. */
#define START_PFN (NODE_DATA(0)->bdata->node_boot_start >> PAGE_SHIFT)
#define MAX_LOW_PFN (NODE_DATA(0)->bdata->node_low_pfn)
#endif
void (*copy_page)(void *from, void *to);
void (*clear_page)(void *to);
void show_mem(void)
{
int i, total = 0, reserved = 0;
int shared = 0, cached = 0;
int total = 0, reserved = 0, free = 0;
int shared = 0, cached = 0, slab = 0;
pg_data_t *pgdat;
printk("Mem-info:\n");
show_free_areas();
printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
i = max_mapnr;
while (i-- > 0) {
total++;
if (PageReserved(mem_map+i))
reserved++;
else if (PageSwapCache(mem_map+i))
cached++;
else if (page_count(mem_map+i))
shared += page_count(mem_map+i) - 1;
for_each_online_pgdat(pgdat) {
struct page *page, *end;
unsigned long flags;
pgdat_resize_lock(pgdat, &flags);
page = pgdat->node_mem_map;
end = page + pgdat->node_spanned_pages;
do {
total++;
if (PageReserved(page))
reserved++;
else if (PageSwapCache(page))
cached++;
else if (PageSlab(page))
slab++;
else if (!page_count(page))
free++;
else
shared += page_count(page) - 1;
page++;
} while (page < end);
pgdat_resize_unlock(pgdat, &flags);
}
printk("%d pages of RAM\n",total);
printk("%d reserved pages\n",reserved);
printk("%d pages shared\n",shared);
printk("%d pages swap cached\n",cached);
printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10));
printk("%d pages of RAM\n", total);
printk("%d free pages\n", free);
printk("%d reserved pages\n", reserved);
printk("%d slab pages\n", slab);
printk("%d pages shared\n", shared);
printk("%d pages swap cached\n", cached);
}
#ifdef CONFIG_MMU
@ -147,52 +144,38 @@ extern char __init_begin, __init_end;
*/
void __init paging_init(void)
{
unsigned long zones_size[MAX_NR_ZONES] = { 0, };
int nid;
/*
* Setup some defaults for the zone sizes.. these should be safe
* regardless of distcontiguous memory or MMU settings.
*/
zones_size[ZONE_NORMAL] = __MEMORY_SIZE >> PAGE_SHIFT;
#ifdef CONFIG_HIGHMEM
zones_size[ZONE_HIGHMEM] = 0 >> PAGE_SHIFT;
#endif
#ifdef CONFIG_MMU
/*
* If we have an MMU, and want to be using it .. we need to adjust
* the zone sizes accordingly, in addition to turning it on.
*/
{
/* We don't need to map the kernel through the TLB, as
* it is permanatly mapped using P1. So clear the
* entire pgd. */
memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));
/* Turn on the MMU */
enable_mmu();
zones_size[ZONE_NORMAL] = MAX_LOW_PFN - START_PFN;
}
/* We don't need to map the kernel through the TLB, as
* it is permanatly mapped using P1. So clear the
* entire pgd. */
memset(swapper_pg_dir, 0, sizeof(swapper_pg_dir));
/* Set an initial value for the MMU.TTB so we don't have to
* check for a null value. */
set_TTB(swapper_pg_dir);
#elif defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4)
/*
* If we don't have CONFIG_MMU set and the processor in question
* still has an MMU, care needs to be taken to make sure it doesn't
* stay on.. Since the boot loader could have potentially already
* turned it on, and we clearly don't want it, we simply turn it off.
*
* We don't need to do anything special for the zone sizes, since the
* default values that were already configured up above should be
* satisfactory.
*/
disable_mmu();
#endif
NODE_DATA(0)->node_mem_map = NULL;
free_area_init_node(0, NODE_DATA(0), zones_size, __MEMORY_START >> PAGE_SHIFT, 0);
for_each_online_node(nid) {
pg_data_t *pgdat = NODE_DATA(nid);
unsigned long max_zone_pfns[MAX_NR_ZONES];
unsigned long low, start_pfn;
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
start_pfn = pgdat->bdata->node_boot_start >> PAGE_SHIFT;
low = pgdat->bdata->node_low_pfn;
max_zone_pfns[ZONE_NORMAL] = low;
add_active_range(nid, start_pfn, low);
printk("Node %u: start_pfn = 0x%lx, low = 0x%lx\n",
nid, start_pfn, low);
free_area_init_nodes(max_zone_pfns);
printk("Node %u: mem_map starts at %p\n",
pgdat->node_id, pgdat->node_mem_map);
}
}
static struct kcore_list kcore_mem, kcore_vmalloc;
@ -200,18 +183,33 @@ static struct kcore_list kcore_mem, kcore_vmalloc;
void __init mem_init(void)
{
int codesize, reservedpages, datasize, initsize;
int tmp;
extern unsigned long memory_start;
int nid;
#ifdef CONFIG_MMU
high_memory = (void *)__va(MAX_LOW_PFN * PAGE_SIZE);
#else
extern unsigned long memory_end;
reservedpages = 0;
high_memory = (void *)(memory_end & PAGE_MASK);
#endif
for_each_online_node(nid) {
pg_data_t *pgdat = NODE_DATA(nid);
unsigned long node_pages = 0;
void *node_high_memory;
int i;
max_mapnr = num_physpages = MAP_NR(high_memory) - MAP_NR(memory_start);
num_physpages += pgdat->node_present_pages;
if (pgdat->node_spanned_pages)
node_pages = free_all_bootmem_node(pgdat);
totalram_pages += node_pages;
for (i = 0; i < node_pages; i++)
if (PageReserved(pgdat->node_mem_map + i))
reservedpages++;
node_high_memory = (void *)((pgdat->node_start_pfn +
pgdat->node_spanned_pages) <<
PAGE_SHIFT);
if (node_high_memory > high_memory)
high_memory = node_high_memory;
}
/* clear the zero-page */
memset(empty_zero_page, 0, PAGE_SIZE);
@ -229,16 +227,6 @@ void __init mem_init(void)
clear_page = clear_page_nommu;
#endif
/* this will put all low memory onto the freelists */
totalram_pages += free_all_bootmem_node(NODE_DATA(0));
reservedpages = 0;
for (tmp = 0; tmp < num_physpages; tmp++)
/*
* Only count reserved RAM pages
*/
if (PageReserved(mem_map+tmp))
reservedpages++;
codesize = (unsigned long) &_etext - (unsigned long) &_text;
datasize = (unsigned long) &_edata - (unsigned long) &_etext;
initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
@ -250,7 +238,7 @@ void __init mem_init(void)
printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, "
"%dk reserved, %dk data, %dk init)\n",
(unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
max_mapnr << (PAGE_SHIFT-10),
totalram_pages << (PAGE_SHIFT-10),
codesize >> 10,
reservedpages << (PAGE_SHIFT-10),
datasize >> 10,
@ -289,4 +277,3 @@ void free_initrd_mem(unsigned long start, unsigned long end)
printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
}
#endif

2
arch/sh/tools/mach-types
View File

@ -9,6 +9,7 @@ SE SH_SOLUTION_ENGINE
7751SE SH_7751_SOLUTION_ENGINE
7300SE SH_7300_SOLUTION_ENGINE
7343SE SH_7343_SOLUTION_ENGINE
7780SE SH_7780_SOLUTION_ENGINE
73180SE SH_73180_SOLUTION_ENGINE
7751SYSTEMH SH_7751_SYSTEMH
HP6XX SH_HP6XX
@ -26,6 +27,7 @@ SH03 SH_SH03
LANDISK SH_LANDISK
R7780RP SH_R7780RP
R7780MP SH_R7780MP
R7785RP SH_R7785RP
TITAN SH_TITAN
SHMIN SH_SHMIN
7710VOIPGW SH_7710VOIPGW

2
drivers/input/touchscreen/hp680_ts_input.c
View File

@ -21,7 +21,7 @@
static void do_softint(void *data);
static struct input_dev *hp680_ts_dev;
static DECLARE_WORK(work, do_softint, 0);
static DECLARE_WORK(work, do_softint);
static void do_softint(void *data)
{

113
drivers/serial/sh-sci.c
View File

@ -46,6 +46,7 @@
#endif
#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
#include <linux/ctype.h>
#include <asm/clock.h>
#include <asm/sh_bios.h>
#include <asm/kgdb.h>
@ -61,7 +62,7 @@ struct sci_port {
unsigned int type;
/* Port IRQs: ERI, RXI, TXI, BRI (optional) */
unsigned int irqs[SCIx_NR_IRQS];
unsigned int irqs[SCIx_NR_IRQS];
/* Port pin configuration */
void (*init_pins)(struct uart_port *port,
@ -76,6 +77,11 @@ struct sci_port {
/* Break timer */
struct timer_list break_timer;
int break_flag;
#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
/* Port clock */
struct clk *clk;
#endif
};
#ifdef CONFIG_SH_KGDB
@ -163,7 +169,7 @@ static void put_string(struct sci_port *sci_port, const char *buffer, int count)
usegdb |= sh_bios_in_gdb_mode();
#endif
#ifdef CONFIG_SH_KGDB
usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port));
usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
#endif
if (usegdb) {
@ -204,7 +210,7 @@ static int kgdb_sci_getchar(void)
int c;
/* Keep trying to read a character, this could be neater */
while ((c = get_char(kgdb_sci_port)) < 0)
while ((c = get_char(&kgdb_sci_port->port)) < 0)
cpu_relax();
return c;
@ -212,7 +218,7 @@ static int kgdb_sci_getchar(void)
static inline void kgdb_sci_putchar(int c)
{
put_char(kgdb_sci_port, c);
put_char(&kgdb_sci_port->port, c);
}
#endif /* CONFIG_SH_KGDB */
@ -283,12 +289,23 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
#endif
#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
#if defined(CONFIG_CPU_SUBTYPE_SH7300)
/* SH7300 doesn't use RTS/CTS */
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
{
sci_out(port, SCFCR, 0);
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
{
unsigned int fcr_val = 0;
set_sh771x_scif_pfc(port);
if (cflag & CRTSCTS) {
fcr_val |= SCFCR_MCE;
}
sci_out(port, SCFCR, fcr_val);
}
#elif defined(CONFIG_CPU_SH3)
/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
@ -350,7 +367,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
} else {
#ifdef CONFIG_CPU_SUBTYPE_SH7343
/* Nothing */
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
#else
ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
@ -360,7 +377,9 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
}
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785)
static inline int scif_txroom(struct uart_port *port)
{
return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
@ -735,12 +754,6 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr)
/* Handle BREAKs */
sci_handle_breaks(port);
#ifdef CONFIG_SH_KGDB
/* Break into the debugger if a break is detected */
BREAKPOINT();
#endif
sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
return IRQ_HANDLED;
@ -947,6 +960,10 @@ static int sci_startup(struct uart_port *port)
if (s->enable)
s->enable(port);
#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
s->clk = clk_get(NULL, "module_clk");
#endif
sci_request_irq(s);
sci_start_tx(port);
sci_start_rx(port, 1);
@ -964,6 +981,11 @@ static void sci_shutdown(struct uart_port *port)
if (s->disable)
s->disable(port);
#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
clk_put(s->clk);
s->clk = NULL;
#endif
}
static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
@ -971,7 +993,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
{
struct sci_port *s = &sci_ports[port->line];
unsigned int status, baud, smr_val;
unsigned long flags;
int t;
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
@ -983,18 +1004,14 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
default:
{
#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
struct clk *clk = clk_get(NULL, "module_clk");
t = SCBRR_VALUE(baud, clk_get_rate(clk));
clk_put(clk);
t = SCBRR_VALUE(baud, clk_get_rate(s->clk));
#else
t = SCBRR_VALUE(baud);
#endif
}
break;
}
}
spin_lock_irqsave(&port->lock, flags);
do {
status = sci_in(port, SCxSR);
} while (!(status & SCxSR_TEND(port)));
@ -1038,8 +1055,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
if ((termios->c_cflag & CREAD) != 0)
sci_start_rx(port,0);
spin_unlock_irqrestore(&port->lock, flags);
}
static const char *sci_type(struct uart_port *port)
@ -1220,10 +1235,13 @@ static int __init serial_console_setup(struct console *co, char *options)
if (!port->membase || !port->mapbase)
return -ENODEV;
spin_lock_init(&port->lock);
port->type = serial_console_port->type;
#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
if (!serial_console_port->clk)
serial_console_port->clk = clk_get(NULL, "module_clk");
#endif
if (port->flags & UPF_IOREMAP)
sci_config_port(port, 0);
@ -1247,7 +1265,7 @@ static struct console serial_console = {
.device = uart_console_device,
.write = serial_console_write,
.setup = serial_console_setup,
.flags = CON_PRINTBUFFER,
.flags = CON_PRINTBUFFER,
.index = -1,
.data = &sci_uart_driver,
};
@ -1292,11 +1310,23 @@ int __init kgdb_console_setup(struct console *co, char *options)
int parity = 'n';
int flow = 'n';
spin_lock_init(&port->lock);
if (co->index != kgdb_portnum)
co->index = kgdb_portnum;
kgdb_sci_port = &sci_ports[co->index];
port = &kgdb_sci_port->port;
/*
* Also need to check port->type, we don't actually have any
* UPIO_PORT ports, but uart_report_port() handily misreports
* it anyways if we don't have a port available by the time this is
* called.
*/
if (!port->type)
return -ENODEV;
if (!port->membase || !port->mapbase)
return -ENODEV;
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
else
@ -1311,11 +1341,12 @@ int __init kgdb_console_setup(struct console *co, char *options)
#ifdef CONFIG_SH_KGDB_CONSOLE
static struct console kgdb_console = {
.name = "ttySC",
.write = kgdb_console_write,
.setup = kgdb_console_setup,
.flags = CON_PRINTBUFFER | CON_ENABLED,
.index = -1,
.name = "ttySC",
.device = uart_console_device,
.write = kgdb_console_write,
.setup = kgdb_console_setup,
.flags = CON_PRINTBUFFER,
.index = -1,
.data = &sci_uart_driver,
};
@ -1361,9 +1392,19 @@ static int __devinit sci_probe(struct platform_device *dev)
struct plat_sci_port *p = dev->dev.platform_data;
int i;
for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
for (i = 0; p && p->flags != 0; p++, i++) {
struct sci_port *sciport = &sci_ports[i];
/* Sanity check */
if (unlikely(i == SCI_NPORTS)) {
dev_notice(&dev->dev, "Attempting to register port "
"%d when only %d are available.\n",
i+1, SCI_NPORTS);
dev_notice(&dev->dev, "Consider bumping "
"CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
break;
}
sciport->port.mapbase = p->mapbase;
/*
@ -1386,6 +1427,12 @@ static int __devinit sci_probe(struct platform_device *dev)
uart_add_one_port(&sci_uart_driver, &sciport->port);
}
#if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
kgdb_sci_port = &sci_ports[kgdb_portnum];
kgdb_getchar = kgdb_sci_getchar;
kgdb_putchar = kgdb_sci_putchar;
#endif
#ifdef CONFIG_CPU_FREQ
cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");

83
drivers/serial/sh-sci.h
View File

@ -73,9 +73,13 @@
# define SCPDR 0xA4050136 /* 16 bit SCIF */
# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
# define SCSPTR0 0xA4400000 /* 16 bit SCIF */
# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
# define SCI_NPORTS 2
# define SCIF_ORER 0x0001 /* overrun error bit */
# define PACR 0xa4050100
# define PBCR 0xa4050102
# define SCSCR_INIT(port) 0x3B
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
# define SCPDR 0xA4050138 /* 16 bit SCIF */
@ -140,6 +144,16 @@
# define SCIF_ORER 0x0001 /* Overrun error bit */
# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
# define SCSPTR0 0xffea0024 /* 16 bit SCIF */
# define SCSPTR1 0xffeb0024 /* 16 bit SCIF */
# define SCSPTR2 0xffec0024 /* 16 bit SCIF */
# define SCSPTR3 0xffed0024 /* 16 bit SCIF */
# define SCSPTR4 0xffee0024 /* 16 bit SCIF */
# define SCSPTR5 0xffef0024 /* 16 bit SCIF */
# define SCIF_OPER 0x0001 /* Overrun error bit */
# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
# define SCIF_ONLY
#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
@ -163,7 +177,10 @@
#define SCI_CTRL_FLAGS_RIE 0x40 /* all */
#define SCI_CTRL_FLAGS_TE 0x20 /* all */
#define SCI_CTRL_FLAGS_RE 0x10 /* all */
#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7780)
#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785)
#define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */
#else
#define SCI_CTRL_FLAGS_REIE 0
@ -333,9 +350,15 @@
}
#ifdef CONFIG_CPU_SH3
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7710)
#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
h8_sci_offset, h8_sci_size) \
CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size)
#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH7705)
#define SCIF_FNS(name, scif_offset, scif_size) \
CPU_SCIF_FNS(name, scif_offset, scif_size)
#else
@ -362,8 +385,8 @@
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7710)
defined(CONFIG_CPU_SUBTYPE_SH7705)
SCIF_FNS(SCSMR, 0x00, 16)
SCIF_FNS(SCBRR, 0x04, 8)
SCIF_FNS(SCSCR, 0x08, 16)
@ -385,7 +408,9 @@ SCIx_FNS(SCxTDR, 0x06, 8, 0x0c, 8, 0x06, 8, 0x0C, 8, 0x03, 8)
SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8)
SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785)
SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16)
SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16)
@ -471,13 +496,24 @@ static inline int sci_rxd_in(struct uart_port *port)
return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
return 1;
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
static inline int sci_rxd_in(struct uart_port *port)
{
if (port->mapbase == SCSPTR0)
return ctrl_inw(SCSPTR0 + 0x10) & 0x01 ? 1 : 0;
return 1;
return sci_in(port,SCxSR)&0x0010 ? 1 : 0;
}
static inline void set_sh771x_scif_pfc(struct uart_port *port)
{
if (port->mapbase == 0xA4400000){
ctrl_outw(ctrl_inw(PACR)&0xffc0,PACR);
ctrl_outw(ctrl_inw(PBCR)&0x0fff,PBCR);
return;
}
if (port->mapbase == 0xA4410000){
ctrl_outw(ctrl_inw(PBCR)&0xf003,PBCR);
return;
}
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_SH4_202)
@ -576,6 +612,23 @@ static inline int sci_rxd_in(struct uart_port *port)
return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
return 1;
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
static inline int sci_rxd_in(struct uart_port *port)
{
if (port->mapbase == 0xffea0000)
return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
if (port->mapbase == 0xffeb0000)
return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
if (port->mapbase == 0xffec0000)
return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
if (port->mapbase == 0xffed0000)
return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
if (port->mapbase == 0xffee0000)
return ctrl_inw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */
if (port->mapbase == 0xffef0000)
return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */
return 1;
}
#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
static inline int sci_rxd_in(struct uart_port *port)
{
@ -634,7 +687,9 @@ static inline int sci_rxd_in(struct uart_port *port)
* -- Mitch Davis - 15 Jul 2000
*/
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7780)
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785)
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)

92
include/asm-sh/bug.h
View File

@ -2,50 +2,80 @@
#define __ASM_SH_BUG_H
#ifdef CONFIG_BUG
struct bug_frame {
unsigned short opcode;
unsigned short line;
const char *file;
const char *func;
};
struct pt_regs;
extern void handle_BUG(struct pt_regs *);
#define HAVE_ARCH_BUG
#define HAVE_ARCH_WARN_ON
#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */
/**
* _EMIT_BUG_ENTRY
* %1 - __FILE__
* %2 - __LINE__
* %3 - trap type
* %4 - sizeof(struct bug_entry)
*
* The trapa opcode itself sits in %0.
* The %O notation is used to avoid # generation.
*
* The offending file and line are encoded in the __bug_table section.
*/
#ifdef CONFIG_DEBUG_BUGVERBOSE
#define _EMIT_BUG_ENTRY \
"\t.pushsection __bug_table,\"a\"\n" \
"2:\t.long 1b, %O1\n" \
"\t.short %O2, %O3\n" \
"\t.org 2b+%O4\n" \
"\t.popsection\n"
#else
#define _EMIT_BUG_ENTRY \
"\t.pushsection __bug_table,\"a\"\n" \
"2:\t.long 1b\n" \
"\t.short %O3\n" \
"\t.org 2b+%O4\n" \
"\t.popsection\n"
#endif
#define BUG() \
do { \
__asm__ __volatile__ ( \
".align 2\n\t" \
".short %O0\n\t" \
".short %O1\n\t" \
".long %O2\n\t" \
".long %O3\n\t" \
: \
: "n" (TRAPA_BUG_OPCODE), \
"i" (__LINE__), "X" (__FILE__), \
"X" (__FUNCTION__)); \
"1:\t.short %O0\n" \
_EMIT_BUG_ENTRY \
: \
: "n" (TRAPA_BUG_OPCODE), \
"i" (__FILE__), \
"i" (__LINE__), "i" (0), \
"i" (sizeof(struct bug_entry))); \
} while (0)
#else
#define BUG() \
do { \
__asm__ __volatile__ ( \
".align 2\n\t" \
".short %O0\n\t" \
: \
: "n" (TRAPA_BUG_OPCODE)); \
#define __WARN() \
do { \
__asm__ __volatile__ ( \
"1:\t.short %O0\n" \
_EMIT_BUG_ENTRY \
: \
: "n" (TRAPA_BUG_OPCODE), \
"i" (__FILE__), \
"i" (__LINE__), \
"i" (BUGFLAG_WARNING), \
"i" (sizeof(struct bug_entry))); \
} while (0)
#endif /* CONFIG_DEBUG_BUGVERBOSE */
#define WARN_ON(x) ({ \
typeof(x) __ret_warn_on = (x); \
if (__builtin_constant_p(__ret_warn_on)) { \
if (__ret_warn_on) \
__WARN(); \
} else { \
if (unlikely(__ret_warn_on)) \
__WARN(); \
} \
unlikely(__ret_warn_on); \
})
#define HAVE_ARCH_BUG
struct pt_regs;
/* arch/sh/kernel/traps.c */
void handle_BUG(struct pt_regs *);
#endif /* CONFIG_BUG */

32
include/asm-sh/clock.h
View File

@ -13,7 +13,7 @@ struct clk_ops {
void (*enable)(struct clk *clk);
void (*disable)(struct clk *clk);
void (*recalc)(struct clk *clk);
int (*set_rate)(struct clk *clk, unsigned long rate);
int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
};
struct clk {
@ -48,6 +48,34 @@ void clk_recalc_rate(struct clk *);
int clk_register(struct clk *);
void clk_unregister(struct clk *);
int show_clocks(struct seq_file *m);
/* the exported API, in addition to clk_set_rate */
/**
* clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
* @clk: clock source
* @rate: desired clock rate in Hz
* @algo_id: algorithm id to be passed down to ops->set_rate
*
* Returns success (0) or negative errno.
*/
int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
enum clk_sh_algo_id {
NO_CHANGE = 0,
IUS_N1_N1,
IUS_322,
IUS_522,
IUS_N11,
SB_N1,
SB3_N1,
SB3_32,
SB3_43,
SB3_54,
BP_N1,
IP_N1,
};
#endif /* __ASM_SH_CLOCK_H */

1
include/asm-sh/cpu-sh3/mmu_context.h
View File

@ -32,6 +32,7 @@
defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH7705) || \
defined(CONFIG_CPU_SUBTYPE_SH7712) || \
defined(CONFIG_CPU_SUBTYPE_SH7710)
#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */
#else

8
include/asm-sh/cpu-sh4/freq.h
View File

@ -12,8 +12,16 @@
#if defined(CONFIG_CPU_SUBTYPE_SH73180) || defined(CONFIG_CPU_SUBTYPE_SH7722)
#define FRQCR 0xa4150000
#define VCLKCR 0xa4150004
#define SCLKACR 0xa4150008
#define SCLKBCR 0xa415000c
#define IrDACLKCR 0xa4150010
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
#define FRQCR 0xffc80000
#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
#define FRQCR0 0xffc80000
#define FRQCR1 0xffc80004
#define FRQMR1 0xffc80014
#else
#define FRQCR 0xffc00000
#endif

91
include/asm-sh/irq.h
View File

@ -2,94 +2,13 @@
#define __ASM_SH_IRQ_H
#include <asm/machvec.h>
#include <asm/ptrace.h> /* for pt_regs */
/* NR_IRQS is made from three components:
* 1. ONCHIP_NR_IRQS - number of IRLS + on-chip peripherial modules
* 2. PINT_NR_IRQS - number of PINT interrupts
* 3. OFFCHIP_NR_IRQS - numbe of IRQs from off-chip peripherial modules
/*
* A sane default based on a reasonable vector table size, platforms are
* advised to cap this at the hard limit that they're interested in
* through the machvec.
*/
/* 1. ONCHIP_NR_IRQS */
#if defined(CONFIG_CPU_SUBTYPE_SH7604)
# define ONCHIP_NR_IRQS 24 // Actually 21
#elif defined(CONFIG_CPU_SUBTYPE_SH7707)
# define ONCHIP_NR_IRQS 64
# define PINT_NR_IRQS 16
#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
# define ONCHIP_NR_IRQS 32
#elif defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7706) || \
defined(CONFIG_CPU_SUBTYPE_SH7705)
# define ONCHIP_NR_IRQS 64 // Actually 61
# define PINT_NR_IRQS 16
#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
# define ONCHIP_NR_IRQS 104
#elif defined(CONFIG_CPU_SUBTYPE_SH7750)
# define ONCHIP_NR_IRQS 48 // Actually 44
#elif defined(CONFIG_CPU_SUBTYPE_SH7751)
# define ONCHIP_NR_IRQS 72
#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
# define ONCHIP_NR_IRQS 112 /* XXX */
#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
# define ONCHIP_NR_IRQS 72
#elif defined(CONFIG_CPU_SUBTYPE_ST40STB1)
# define ONCHIP_NR_IRQS 144
#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
defined(CONFIG_CPU_SUBTYPE_SH73180) || \
defined(CONFIG_CPU_SUBTYPE_SH7343) || \
defined(CONFIG_CPU_SUBTYPE_SH7722)
# define ONCHIP_NR_IRQS 109
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
# define ONCHIP_NR_IRQS 111
#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
# define ONCHIP_NR_IRQS 256
#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
# define ONCHIP_NR_IRQS 128
#elif defined(CONFIG_SH_UNKNOWN) /* Most be last */
# define ONCHIP_NR_IRQS 144
#endif
/* 2. PINT_NR_IRQS */
#ifdef CONFIG_SH_UNKNOWN
# define PINT_NR_IRQS 16
#else
# ifndef PINT_NR_IRQS
# define PINT_NR_IRQS 0
# endif
#endif
#if PINT_NR_IRQS > 0
# define PINT_IRQ_BASE ONCHIP_NR_IRQS
#endif
/* 3. OFFCHIP_NR_IRQS */
#if defined(CONFIG_HD64461)
# define OFFCHIP_NR_IRQS 18
#elif defined(CONFIG_HD64465)
# define OFFCHIP_NR_IRQS 16
#elif defined (CONFIG_SH_DREAMCAST)
# define OFFCHIP_NR_IRQS 96
#elif defined (CONFIG_SH_TITAN)
# define OFFCHIP_NR_IRQS 4
#elif defined(CONFIG_SH_R7780RP)
# define OFFCHIP_NR_IRQS 16
#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE)
# define OFFCHIP_NR_IRQS 12
#elif defined(CONFIG_SH_7722_SOLUTION_ENGINE)
# define OFFCHIP_NR_IRQS 14
#elif defined(CONFIG_SH_UNKNOWN)
# define OFFCHIP_NR_IRQS 16 /* Must also be last */
#else
# define OFFCHIP_NR_IRQS 0
#endif
#if OFFCHIP_NR_IRQS > 0
# define OFFCHIP_IRQ_BASE (ONCHIP_NR_IRQS + PINT_NR_IRQS)
#endif
/* NR_IRQS. 1+2+3 */
#define NR_IRQS (ONCHIP_NR_IRQS + PINT_NR_IRQS + OFFCHIP_NR_IRQS)
#define NR_IRQS 256
/*
* Convert back and forth between INTEVT and IRQ values.

35
include/asm-sh/kdebug.h Normal file
View File

@ -0,0 +1,35 @@
#ifndef __ASM_SH_KDEBUG_H
#define __ASM_SH_KDEBUG_H
#include <linux/notifier.h>
struct pt_regs;
struct die_args {
struct pt_regs *regs;
int trapnr;
};
int register_die_notifier(struct notifier_block *nb);
int unregister_die_notifier(struct notifier_block *nb);
int register_page_fault_notifier(struct notifier_block *nb);
int unregister_page_fault_notifier(struct notifier_block *nb);
extern struct atomic_notifier_head shdie_chain;
/* Grossly misnamed. */
enum die_val {
DIE_TRAP,
DIE_PAGE_FAULT,
};
static inline int notify_die(enum die_val val, struct pt_regs *regs,
int trap, int sig)
{
struct die_args args = {
.regs = regs,
.trapnr = trap,
};
return atomic_notifier_call_chain(&shdie_chain, val, &args);
}
#endif /* __ASM_SH_KDEBUG_H */

42
include/asm-sh/kexec.h
View File

@ -1,5 +1,8 @@
#ifndef _SH_KEXEC_H
#define _SH_KEXEC_H
#ifndef __ASM_SH_KEXEC_H
#define __ASM_SH_KEXEC_H
#include <asm/ptrace.h>
#include <asm/string.h>
/*
* KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return.
@ -25,8 +28,37 @@
#define MAX_NOTE_BYTES 1024
/* Provide a dummy definition to avoid build failures. */
static inline void crash_setup_regs(struct pt_regs *newregs,
struct pt_regs *oldregs) { }
struct pt_regs *oldregs)
{
if (oldregs)
memcpy(newregs, oldregs, sizeof(*newregs));
else {
__asm__ __volatile__ ("mov r0, %0" : "=r" (newregs->regs[0]));
__asm__ __volatile__ ("mov r1, %0" : "=r" (newregs->regs[1]));
__asm__ __volatile__ ("mov r2, %0" : "=r" (newregs->regs[2]));
__asm__ __volatile__ ("mov r3, %0" : "=r" (newregs->regs[3]));
__asm__ __volatile__ ("mov r4, %0" : "=r" (newregs->regs[4]));
__asm__ __volatile__ ("mov r5, %0" : "=r" (newregs->regs[5]));
__asm__ __volatile__ ("mov r6, %0" : "=r" (newregs->regs[6]));
__asm__ __volatile__ ("mov r7, %0" : "=r" (newregs->regs[7]));
__asm__ __volatile__ ("mov r8, %0" : "=r" (newregs->regs[8]));
__asm__ __volatile__ ("mov r9, %0" : "=r" (newregs->regs[9]));
__asm__ __volatile__ ("mov r10, %0" : "=r" (newregs->regs[10]));
__asm__ __volatile__ ("mov r11, %0" : "=r" (newregs->regs[11]));
__asm__ __volatile__ ("mov r12, %0" : "=r" (newregs->regs[12]));
__asm__ __volatile__ ("mov r13, %0" : "=r" (newregs->regs[13]));
__asm__ __volatile__ ("mov r14, %0" : "=r" (newregs->regs[14]));
__asm__ __volatile__ ("mov r15, %0" : "=r" (newregs->regs[15]));
#endif /* _SH_KEXEC_H */
__asm__ __volatile__ ("sts pr, %0" : "=r" (newregs->pr));
__asm__ __volatile__ ("sts macl, %0" : "=r" (newregs->macl));
__asm__ __volatile__ ("sts mach, %0" : "=r" (newregs->mach));
__asm__ __volatile__ ("stc gbr, %0" : "=r" (newregs->gbr));
__asm__ __volatile__ ("stc sr, %0" : "=r" (newregs->sr));
newregs->pc = (unsigned long)current_text_addr();
}
}
#endif /* __ASM_SH_KEXEC_H */

51
include/asm-sh/kgdb.h
View File

@ -17,6 +17,7 @@
#define __KGDB_H
#include <asm/ptrace.h>
#include <asm/cacheflush.h>
struct console;
@ -45,35 +46,21 @@ extern int kgdb_portnum;
extern int kgdb_baud;
extern char kgdb_parity;
extern char kgdb_bits;
extern int kgdb_console_setup(struct console *, char *);
/* Init and interface stuff */
extern int kgdb_init(void);
extern int (*kgdb_serial_setup)(void);
extern int (*kgdb_getchar)(void);
extern void (*kgdb_putchar)(int);
struct kgdb_sermap {
char *name;
int namelen;
int (*setup_fn)(struct console *, char *);
struct kgdb_sermap *next;
};
extern void kgdb_register_sermap(struct kgdb_sermap *map);
extern struct kgdb_sermap *kgdb_porttype;
/* Trap functions */
typedef void (kgdb_debug_hook_t)(struct pt_regs *regs);
typedef void (kgdb_debug_hook_t)(struct pt_regs *regs);
typedef void (kgdb_bus_error_hook_t)(void);
extern kgdb_debug_hook_t *kgdb_debug_hook;
extern kgdb_bus_error_hook_t *kgdb_bus_err_hook;
extern void breakpoint(void);
/* Console */
struct console;
void kgdb_console_write(struct console *co, const char *s, unsigned count);
void kgdb_console_init(void);
extern int kgdb_console_setup(struct console *, char *);
/* Prototypes for jmp fns */
#define _JBLEN 9
@ -81,11 +68,8 @@ typedef int jmp_buf[_JBLEN];
extern void longjmp(jmp_buf __jmpb, int __retval);
extern int setjmp(jmp_buf __jmpb);
/* Variadic macro to print our own message to the console */
#define KGDB_PRINTK(...) printk("KGDB: " __VA_ARGS__)
/* Forced breakpoint */
#define BREAKPOINT() \
#define breakpoint() \
do { \
if (kgdb_enabled) \
__asm__ __volatile__("trapa #0x3c"); \
@ -95,7 +79,6 @@ do { \
#if defined(CONFIG_CPU_SH4)
#define kgdb_flush_icache_range(start, end) \
{ \
extern void __flush_purge_region(void *, int); \
__flush_purge_region((void*)(start), (int)(end) - (int)(start));\
flush_icache_range((start), (end)); \
}
@ -103,31 +86,6 @@ do { \
#define kgdb_flush_icache_range(start, end) do { } while (0)
#endif
/* Kernel assert macros */
#ifdef CONFIG_KGDB_KERNEL_ASSERTS
/* Predefined conditions */
#define KA_VALID_ERRNO(errno) ((errno) > 0 && (errno) <= EMEDIUMTYPE)
#define KA_VALID_PTR_ERR(ptr) KA_VALID_ERRNO(-PTR_ERR(ptr))
#define KA_VALID_KPTR(ptr) (!(ptr) || \
((void *)(ptr) >= (void *)PAGE_OFFSET && \
(void *)(ptr) < ERR_PTR(-EMEDIUMTYPE)))
#define KA_VALID_PTRORERR(errptr) \
(KA_VALID_KPTR(errptr) || KA_VALID_PTR_ERR(errptr))
#define KA_HELD_GKL() (current->lock_depth >= 0)
/* The actual assert */
#define KGDB_ASSERT(condition, message) do { \
if (!(condition) && (kgdb_enabled)) { \
KGDB_PRINTK("Assertion failed at %s:%d: %s\n", \
__FILE__, __LINE__, message);\
BREAKPOINT(); \
} \
} while (0)
#else
#define KGDB_ASSERT(condition, message)
#endif
/* Taken from sh-stub.c of GDB 4.18 */
static const char hexchars[] = "0123456789abcdef";
@ -142,5 +100,4 @@ static inline char lowhex(const int x)
{
return hexchars[x & 0xf];
}
#endif

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