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arm64: dts: qcom: Add msm8916 USB configuration nodes
Add Host, Device and OTG configuration nodes. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
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c4da5a5616
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596008653f
@ -268,6 +268,45 @@
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status = "disabled";
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};
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usb_dev: usb@78d9000 {
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compatible = "qcom,ci-hdrc";
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reg = <0x78d9000 0x400>;
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dr_mode = "peripheral";
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interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
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usb-phy = <&usb_otg>;
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status = "disabled";
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};
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usb_host: ehci@78d9000 {
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compatible = "qcom,ehci-host";
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reg = <0x78d9000 0x400>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_NONE>;
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usb-phy = <&usb_otg>;
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status = "disabled";
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};
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usb_otg: phy@78d9000 {
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compatible = "qcom,usb-otg-snps";
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reg = <0x78d9000 0x400>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_EDGE_BOTH>,
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<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>;
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qcom,vdd-levels = <1 5 7>;
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qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
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dr_mode = "peripheral";
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qcom,otg-control = <2>; // PMIC
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clocks = <&gcc GCC_USB_HS_AHB_CLK>,
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<&gcc GCC_USB_HS_SYSTEM_CLK>,
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<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
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clock-names = "iface", "core", "sleep";
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resets = <&gcc GCC_USB2A_PHY_BCR>,
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<&gcc GCC_USB_HS_BCR>;
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reset-names = "phy", "link";
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status = "disabled";
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};
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intc: interrupt-controller@b000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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