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pinctrl: qcom: sm8450-lpass-lpi: correct swr_rx_data group
According to hardware programming guide, the swr_rx_data pin group has
only two pins (GPIO5 and GPIO6). This is also visible in "struct
sm8450_groups" in the driver - GPIO15 does not have swr_rx_data
function.
Fixes: ec1652fc4d
("pinctrl: qcom: Add sm8450 lpass lpi pinctrl driver")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230203165054.390762-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
606d4ef492
commit
5921b250f4
@ -105,7 +105,7 @@ static const struct pinctrl_pin_desc sm8450_lpi_pins[] = {
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static const char * const swr_tx_clk_groups[] = { "gpio0" };
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static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio14" };
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static const char * const swr_rx_clk_groups[] = { "gpio3" };
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static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5", "gpio15" };
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static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" };
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static const char * const dmic1_clk_groups[] = { "gpio6" };
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static const char * const dmic1_data_groups[] = { "gpio7" };
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static const char * const dmic2_clk_groups[] = { "gpio8" };
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